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| Started by | Andi Kleen <andi@firstfloor.org> |
|---|---|
| First post | 2016-05-05 19:30 +0200 |
| Last post | 2016-05-06 14:50 +0200 |
| Articles | 2 — 2 participants |
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[PATCH] x86: Report Intel platform_id in /proc/cpuinfo Andi Kleen <andi@firstfloor.org> - 2016-05-05 19:30 +0200
Re: [PATCH] x86: Report Intel platform_id in /proc/cpuinfo Henrique de Moraes Holschuh <hmh@hmh.eng.br> - 2016-05-06 14:50 +0200
| From | Andi Kleen <andi@firstfloor.org> |
|---|---|
| Date | 2016-05-05 19:30 +0200 |
| Subject | [PATCH] x86: Report Intel platform_id in /proc/cpuinfo |
| Message-ID | <rvvg8-42o-57@gated-at.bofh.it> |
From: Andi Kleen <ak@linux.intel.com>
We have a need to distinguish systems based on their platform ID.
For example this is useful to distinguish systems with L4 cache
versus ones without.
There is a 5 bit identifier (also called processor flags) in
the IA32_PLATFORM_ID MSR that can give a more fine grained
identification of the CPU than just the model number/stepping.
IA32_PLATFORM_ID is architectural.
The processor flags are already used in the microcode driver.
The MSR can be also accessed through /dev/cpu/*/msr, but that
requires root and is awkward.
This patch just exports the value retrieved by the microcode
driver in /proc/cpuinfo. If the microcode driver is disabled
it won't be shown, but that seems reasonable.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
arch/x86/include/asm/processor.h | 1 +
arch/x86/kernel/cpu/microcode/intel.c | 1 +
arch/x86/kernel/cpu/proc.c | 2 ++
3 files changed, 4 insertions(+)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 20c11d1..bc4b0ef 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -136,6 +136,7 @@ struct cpuinfo_x86 {
/* Index into per_cpu list: */
u16 cpu_index;
u32 microcode;
+ u32 platform_id;
};
#define X86_VENDOR_INTEL 0
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index ee81c54..6244a88 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -812,6 +812,7 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
/* get processor flags from MSR 0x17 */
rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
csig->pf = 1 << ((val[1] >> 18) & 7);
+ cpu_data(cpu_num).platform_id = (val[1] >> 18) & 7;
}
csig->rev = c->microcode;
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index 18ca99f..1c4e4f5 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -76,6 +76,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_puts(m, "stepping\t: unknown\n");
if (c->microcode)
seq_printf(m, "microcode\t: 0x%x\n", c->microcode);
+ if (c->platform_id)
+ seq_printf(m, "platform_id\t: %d\n", c->platform_id);
if (cpu_has(c, X86_FEATURE_TSC)) {
unsigned int freq = cpufreq_quick_get(cpu);
--
2.8.1
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| From | Henrique de Moraes Holschuh <hmh@hmh.eng.br> |
|---|---|
| Date | 2016-05-06 14:50 +0200 |
| Message-ID | <rvNmG-5ee-11@gated-at.bofh.it> |
| In reply to | #1395246 |
On Thu, May 5, 2016, at 07:12, Andi Kleen wrote: > We have a need to distinguish systems based on their platform ID. > For example this is useful to distinguish systems with L4 cache > versus ones without. Thank you for doing this, it will be useful. > There is a 5 bit identifier (also called processor flags) in > the IA32_PLATFORM_ID MSR that can give a more fine grained > identification of the CPU than just the model number/stepping. There's a relevant typo, there. Suggestion: "There is a 3-bit identifier (bits 52:50, also called processor flags) in..." > IA32_PLATFORM_ID is architectural. > > The processor flags are already used in the microcode driver. > The MSR can be also accessed through /dev/cpu/*/msr, but that > requires root and is awkward. The existence of /dev/cpu/*/msr is actively dangerous, except maybe inside a VM when the hypervisor does whitelisted-only filtering of MSR access. That thing should either die ASAP, or to grow a processor vendor-family-model-aware whitelist. That said, the microcode-related platform ID bits (in microcode processor flags mask format) are available in sysfs when the microcode driver is loaded, at: /sys/devices/system/cpu/cpu*/microcode/processor_flags However, there is real value in exporting these values in /proc/cpuinfo (it will show up in the typical debugging output, and it will all be in one single place), so I *do* agree that we should add platform_id to /proc/cpuinfo on Intel. Do note we are still missing the real microcode signature, which *cannot* be fully derived from /proc/cpuinfo contents right now, even when you have the platform_id bits from MSR 17h, because it is missing some bits from cpuid(1).EAX. The last time one of these cpuid bits was not zero was, AFAIK, for the "Pentium Overdrive Processors"... but we now have Intel x86 SoCs, and I have seen the two "type" bits from cpuid(1).EAX refered as "SoC type" in at least one recent Intel document (sorry, I can't remember which), which leads me to believe they might see some reuse sooner or later. So, might also want to add a "processor signature" field, which is the full contents of EAX for cpuid(1). This would also shown on AMD processors for completeness. Alternatively, we could add a "microcode id" or "microcode signature" field for Intel instead of the proposed "platform_id" field. The microcode id field would have both the contents of cpuid(1).eax *and* "1 << MSR 17h [52:50]", e.g. "microcode_id: 0x106a5, 0x02". > This patch just exports the value retrieved by the microcode > driver in /proc/cpuinfo. If the microcode driver is disabled > it won't be shown, but that seems reasonable. Agreed. -- "One disk to rule them all, One disk to find them. One disk to bring them all and in the darkness grind them. In the Land of Redmond where the shadows lie." -- The Silicon Valley Tarot Henrique Holschuh
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