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Re: [RFC][PATCH 3/3] locking,arm64: Introduce cmpwait()

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  Re: [RFC][PATCH 3/3] locking,arm64: Introduce cmpwait() Will Deacon <will.deacon@arm.com> - 2016-04-26 18:40 +0200
    Re: [RFC][PATCH 3/3] locking,arm64: Introduce cmpwait() Will Deacon <will.deacon@arm.com> - 2016-04-26 19:20 +0200
      Re: [RFC][PATCH 3/3] locking,arm64: Introduce cmpwait() Peter Zijlstra <peterz@infradead.org> - 2016-04-26 22:50 +0200

#1387704 — Re: [RFC][PATCH 3/3] locking,arm64: Introduce cmpwait()

On Wed, Apr 13, 2016 at 02:52:43PM +0200, Peter Zijlstra wrote:
> On Tue, Apr 12, 2016 at 05:59:41PM +0100, Will Deacon wrote:
> > Thanks for looking at this!
> 
> n/p, had to se what it would look like etc.. :-)
> 
> > > I've misplaced my arm64 compiler, so this is not even compile tested.
> > 
> > Guess what? ;)
> > 
> 
> > make: *** [init] Error 2
> > make: *** Waiting for unfinished jobs....
> > 
> > (and lot of similar errors).
> > 
> > Looks like you're just missing an #undef in cmpxchg.h.
> > 
> > FWIW, you can pick up arm64 toolchain binaries from:
> > 
> >   https://releases.linaro.org/components/toolchain/binaries/latest-5/
> 
> Ah, I usually build a whole set from sources; for some reason arm64
> didn't build in the latest run. I'll have to kick it.
> 
> > > +#define __CMPWAIT_GEN(w, sz, name)					\
> > > +void __cmpwait_case_##name(volatile void *ptr, unsigned long val)	\
> > > +{									\
> > > +	unsigned long tmp;						\
> > > +									\
> > > +	asm volatile(							\
> > > +	"	ldxr" #sz "\t%" #w "[tmp], %[v]\n"			\
> > > +	"	eor	%" #w "[tmp], %" #w "[tmp], %" #w "[val]\n"	\
> > > +	"	cbnz	%" #w "[tmp], 1f\n"				\
> > 
> > Shouldn't this be cbz? (i.e. branch over the wfe if the value is equal
> > to what we wanted?).
> 
> Indeed so.
> 
> > > +	"	wfe\n"							\
> > > +	"1:"								\
> > > +	: [tmp] "=&r" (tmp), [val] "=&r" (val),				\
> > 
> > We only read val, so it can be an input operand, no?
> 
> True.. :-)
> 
> > > +#define cmpwait(ptr, val) \
> > > +	__cmpwait((ptr), (unsigned long)(val), sizeof(*(ptr)))
> > 
> > We might want to call this cmpwait_relaxed, in case we decide to add
> > fenced versions in the future. Or just make it cmpwait_acquire and
> > remove the smp_rmb() from smp_cond_load_acquire(). Dunno.
> 
> This is something I'll very much leave up to you. I have no idea on the
> tradeoffs involved here.

FWIW, here's a fixup patch to get this patch building and running. I
also noticed some missing casts for the subword cases.

Will

--->8

From 5aa5750d5eeb6e3a42f5547f094dc803f89793bb Mon Sep 17 00:00:00 2001
From: Will Deacon <will.deacon@arm.com>
Date: Tue, 26 Apr 2016 17:31:53 +0100
Subject: [PATCH] fixup! locking,arm64: Introduce cmpwait()

Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/include/asm/cmpxchg.h | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
index cd7bff6ddedc..9b7113a3f0d7 100644
--- a/arch/arm64/include/asm/cmpxchg.h
+++ b/arch/arm64/include/asm/cmpxchg.h
@@ -225,18 +225,19 @@ __CMPXCHG_GEN(_mb)
 })
 
 #define __CMPWAIT_GEN(w, sz, name)					\
-void __cmpwait_case_##name(volatile void *ptr, unsigned long val)	\
+static inline void __cmpwait_case_##name(volatile void *ptr,		\
+					 unsigned long val)		\
 {									\
 	unsigned long tmp;						\
 									\
 	asm volatile(							\
 	"	ldxr" #sz "\t%" #w "[tmp], %[v]\n"			\
 	"	eor	%" #w "[tmp], %" #w "[tmp], %" #w "[val]\n"	\
-	"	cbnz	%" #w "[tmp], 1f\n"				\
+	"	cbz	%" #w "[tmp], 1f\n"				\
 	"	wfe\n"							\
 	"1:"								\
-	: [tmp] "=&r" (tmp), [val] "=&r" (val),				\
-	  [v] "+Q" (*(unsigned long *)ptr));				\
+	: [tmp] "=&r" (tmp), [v] "+Q" (*(unsigned long *)ptr)		\
+	: [val] "r" (val));						\
 }
 
 __CMPWAIT_GEN(w, b, 1);
@@ -244,11 +245,13 @@ __CMPWAIT_GEN(w, h, 2);
 __CMPWAIT_GEN(w,  , 4);
 __CMPWAIT_GEN( ,  , 8);
 
+#undef __CMPWAIT_GEN
+
 static inline void __cmpwait(volatile void *ptr, unsigned long val, int size)
 {
 	switch (size) {
-	case 1: return __cmpwait_case_1(ptr, val);
-	case 2: return __cmpwait_case_2(ptr, val);
+	case 1: return __cmpwait_case_1(ptr, (u8)val);
+	case 2: return __cmpwait_case_2(ptr, (u16)val);
 	case 4: return __cmpwait_case_4(ptr, val);
 	case 8: return __cmpwait_case_8(ptr, val);
 	default: BUILD_BUG();
-- 
2.1.4

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#1387730

On Tue, Apr 26, 2016 at 05:33:44PM +0100, Will Deacon wrote:
> From 5aa5750d5eeb6e3a42f5547f094dc803f89793bb Mon Sep 17 00:00:00 2001
> From: Will Deacon <will.deacon@arm.com>
> Date: Tue, 26 Apr 2016 17:31:53 +0100
> Subject: [PATCH] fixup! locking,arm64: Introduce cmpwait()
> 
> Signed-off-by: Will Deacon <will.deacon@arm.com>
> ---
>  arch/arm64/include/asm/cmpxchg.h | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
> index cd7bff6ddedc..9b7113a3f0d7 100644
> --- a/arch/arm64/include/asm/cmpxchg.h
> +++ b/arch/arm64/include/asm/cmpxchg.h
> @@ -225,18 +225,19 @@ __CMPXCHG_GEN(_mb)
>  })
>  
>  #define __CMPWAIT_GEN(w, sz, name)					\
> -void __cmpwait_case_##name(volatile void *ptr, unsigned long val)	\
> +static inline void __cmpwait_case_##name(volatile void *ptr,		\
> +					 unsigned long val)		\
>  {									\
>  	unsigned long tmp;						\
>  									\
>  	asm volatile(							\
>  	"	ldxr" #sz "\t%" #w "[tmp], %[v]\n"			\
>  	"	eor	%" #w "[tmp], %" #w "[tmp], %" #w "[val]\n"	\
> -	"	cbnz	%" #w "[tmp], 1f\n"				\
> +	"	cbz	%" #w "[tmp], 1f\n"				\

Actually, you're right with cbnz. I only noticed when I came to implement
my own version of smp_cond_load_acquire. *sigh*

I have fixups applied locally, so maybe the best thing is for me to send
you an arm64 series on top of whatever you post next?

Will

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#1388083

On Tue, Apr 26, 2016 at 06:15:43PM +0100, Will Deacon wrote:
> Actually, you're right with cbnz. I only noticed when I came to implement
> my own version of smp_cond_load_acquire. *sigh*
> 
> I have fixups applied locally, so maybe the best thing is for me to send
> you an arm64 series on top of whatever you post next?

Sure; lemme rip out all the AARGH64 bits so you can do whatever you
wants :-)

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