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| Started by | "H. Nikolaus Schaller" <hns@goldelico.com> |
|---|---|
| First post | 2016-04-18 20:30 +0200 |
| Last post | 2016-05-10 07:50 +0200 |
| Articles | 20 on this page of 21 — 4 participants |
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[PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer "H. Nikolaus Schaller" <hns@goldelico.com> - 2016-04-18 20:30 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Tony Lindgren <tony@atomide.com> - 2016-04-26 19:30 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer "H. Nikolaus Schaller" <hns@goldelico.com> - 2016-04-27 08:10 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Tero Kristo <t-kristo@ti.com> - 2016-04-27 14:40 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer "H. Nikolaus Schaller" <hns@goldelico.com> - 2016-04-27 15:20 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Tero Kristo <t-kristo@ti.com> - 2016-04-27 16:20 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Peter Ujfalusi <peter.ujfalusi@ti.com> - 2016-04-27 16:30 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer "H. Nikolaus Schaller" <hns@goldelico.com> - 2016-04-27 16:40 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Tero Kristo <t-kristo@ti.com> - 2016-04-28 10:10 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer "H. Nikolaus Schaller" <hns@goldelico.com> - 2016-04-28 11:20 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Tero Kristo <t-kristo@ti.com> - 2016-04-28 15:30 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer "H. Nikolaus Schaller" <hns@goldelico.com> - 2016-05-09 13:20 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Tero Kristo <t-kristo@ti.com> - 2016-05-09 14:00 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Peter Ujfalusi <peter.ujfalusi@ti.com> - 2016-05-09 14:20 +0200
Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Peter Ujfalusi <peter.ujfalusi@ti.com> - 2016-05-09 14:40 +0200
Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Peter Ujfalusi <peter.ujfalusi@ti.com> - 2016-05-09 14:50 +0200
Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Peter Ujfalusi <peter.ujfalusi@ti.com> - 2016-05-09 16:00 +0200
Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Tero Kristo <t-kristo@ti.com> - 2016-05-09 16:10 +0200
Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Peter Ujfalusi <peter.ujfalusi@ti.com> - 2016-05-09 17:40 +0200
Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer Peter Ujfalusi <peter.ujfalusi@ti.com> - 2016-05-09 21:50 +0200
Re: [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer "H. Nikolaus Schaller" <hns@goldelico.com> - 2016-05-10 07:50 +0200
Page 1 of 2 [1] 2 Next page →
| From | "H. Nikolaus Schaller" <hns@goldelico.com> |
|---|---|
| Date | 2016-04-18 20:30 +0200 |
| Subject | [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer |
| Message-ID | <rpm5Q-1zw-11@gated-at.bofh.it> |
OMAP5 has a register to control if the ckobuffer is enabled
and defines the polarity. ckobuffer is required to drive a twl6040
with the system clock. Hence, add the pinctrl,single to the
OMAP5 SoC description so that omap5-board-common can
set up the ckobuffer as required.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
arch/arm/boot/dts/omap5.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 120b6b8..1d9050f 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -277,6 +277,16 @@
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
+
+ omap5_control_ckobuffer: pinmux@cdb4 {
+ compatible = "ti,omap5-padconf",
+ "pinctrl-single";
+ reg = <0xcdb4 4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xf0000000>;
+ };
};
ocmcram: ocmcram@40300000 {
--
2.7.3
[toc] | [next] | [standalone]
| From | Tony Lindgren <tony@atomide.com> |
|---|---|
| Date | 2016-04-26 19:30 +0200 |
| Message-ID | <rseYa-34w-21@gated-at.bofh.it> |
| In reply to | #1381959 |
Tero,
* H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
> OMAP5 has a register to control if the ckobuffer is enabled
> and defines the polarity. ckobuffer is required to drive a twl6040
> with the system clock. Hence, add the pinctrl,single to the
> OMAP5 SoC description so that omap5-board-common can
> set up the ckobuffer as required.
Is this really a mux or should it be a mux clock?
Regards,
Tony
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> ---
> arch/arm/boot/dts/omap5.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 120b6b8..1d9050f 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -277,6 +277,16 @@
> pinctrl-single,register-width = <16>;
> pinctrl-single,function-mask = <0x7fff>;
> };
> +
> + omap5_control_ckobuffer: pinmux@cdb4 {
> + compatible = "ti,omap5-padconf",
> + "pinctrl-single";
> + reg = <0xcdb4 4>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <0xf0000000>;
> + };
> };
>
> ocmcram: ocmcram@40300000 {
> --
> 2.7.3
>
[toc] | [prev] | [next] | [standalone]
| From | "H. Nikolaus Schaller" <hns@goldelico.com> |
|---|---|
| Date | 2016-04-27 08:10 +0200 |
| Message-ID | <rsqPD-4BZ-1@gated-at.bofh.it> |
| In reply to | #1387742 |
> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>
> Tero,
>
> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>> OMAP5 has a register to control if the ckobuffer is enabled
>> and defines the polarity. ckobuffer is required to drive a twl6040
>> with the system clock. Hence, add the pinctrl,single to the
>> OMAP5 SoC description so that omap5-board-common can
>> set up the ckobuffer as required.
>
> Is this really a mux or should it be a mux clock?
It is a pinmux setting for the clock out buffer to choose what signal
(and polarity) is presented on the fref_xtal_clk pad.
The register is part of the CTRL_MODULE_WKUP.
The clock signal is the xtal master clock of the whole SoC.
Although there is a bit to choose an alternate clock, there is no
alternate in the OMAP5 silicon.
Therefore I would say it is about padconf and not clock or clock mux
related.
It just happens to be a clock signal which can be routed to this
pad.
BR,
Nikolaus
>
> Regards,
>
> Tony
>
>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>> ---
>> arch/arm/boot/dts/omap5.dtsi | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>> index 120b6b8..1d9050f 100644
>> --- a/arch/arm/boot/dts/omap5.dtsi
>> +++ b/arch/arm/boot/dts/omap5.dtsi
>> @@ -277,6 +277,16 @@
>> pinctrl-single,register-width = <16>;
>> pinctrl-single,function-mask = <0x7fff>;
>> };
>> +
>> + omap5_control_ckobuffer: pinmux@cdb4 {
>> + compatible = "ti,omap5-padconf",
>> + "pinctrl-single";
>> + reg = <0xcdb4 4>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + pinctrl-single,register-width = <32>;
>> + pinctrl-single,function-mask = <0xf0000000>;
>> + };
>> };
>>
>> ocmcram: ocmcram@40300000 {
>> --
>> 2.7.3
>>
[toc] | [prev] | [next] | [standalone]
| From | Tero Kristo <t-kristo@ti.com> |
|---|---|
| Date | 2016-04-27 14:40 +0200 |
| Message-ID | <rswV4-1g9-29@gated-at.bofh.it> |
| In reply to | #1388686 |
On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>
>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>
>> Tero,
>>
>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>> OMAP5 has a register to control if the ckobuffer is enabled
>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>> with the system clock. Hence, add the pinctrl,single to the
>>> OMAP5 SoC description so that omap5-board-common can
>>> set up the ckobuffer as required.
>>
>> Is this really a mux or should it be a mux clock?
>
> It is a pinmux setting for the clock out buffer to choose what signal
> (and polarity) is presented on the fref_xtal_clk pad.
>
> The register is part of the CTRL_MODULE_WKUP.
> The clock signal is the xtal master clock of the whole SoC.
>
> Although there is a bit to choose an alternate clock, there is no
> alternate in the OMAP5 silicon.
>
> Therefore I would say it is about padconf and not clock or clock mux
> related.
>
> It just happens to be a clock signal which can be routed to this
> pad.
The two could very well be implemented as clock nodes, a mux and a gate.
This would describe the hardware functionality better imo, if the
assumptions made here are correct. Implementing the control as pinctrl
hacks looks rather weird to me.
I could not find any documentation related to the ckobuffer usage
though, maybe Peter can provide some insight? I think you spent some
considerable time bringing up twl6040 a few years back...
-Tero
>
> BR,
> Nikolaus
>
>>
>> Regards,
>>
>> Tony
>>
>>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>>> ---
>>> arch/arm/boot/dts/omap5.dtsi | 10 ++++++++++
>>> 1 file changed, 10 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>> index 120b6b8..1d9050f 100644
>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>> @@ -277,6 +277,16 @@
>>> pinctrl-single,register-width = <16>;
>>> pinctrl-single,function-mask = <0x7fff>;
>>> };
>>> +
>>> + omap5_control_ckobuffer: pinmux@cdb4 {
>>> + compatible = "ti,omap5-padconf",
>>> + "pinctrl-single";
>>> + reg = <0xcdb4 4>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + pinctrl-single,register-width = <32>;
>>> + pinctrl-single,function-mask = <0xf0000000>;
>>> + };
>>> };
>>>
>>> ocmcram: ocmcram@40300000 {
>>> --
>>> 2.7.3
>>>
>
[toc] | [prev] | [next] | [standalone]
| From | "H. Nikolaus Schaller" <hns@goldelico.com> |
|---|---|
| Date | 2016-04-27 15:20 +0200 |
| Message-ID | <rsxxM-1Mu-11@gated-at.bofh.it> |
| In reply to | #1388986 |
> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>:
>
> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>
>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>>
>>> Tero,
>>>
>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>>> OMAP5 has a register to control if the ckobuffer is enabled
>>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>>> with the system clock. Hence, add the pinctrl,single to the
>>>> OMAP5 SoC description so that omap5-board-common can
>>>> set up the ckobuffer as required.
>>>
>>> Is this really a mux or should it be a mux clock?
>>
>> It is a pinmux setting for the clock out buffer to choose what signal
>> (and polarity) is presented on the fref_xtal_clk pad.
>>
>> The register is part of the CTRL_MODULE_WKUP.
>> The clock signal is the xtal master clock of the whole SoC.
>>
>> Although there is a bit to choose an alternate clock, there is no
>> alternate in the OMAP5 silicon.
>>
>> Therefore I would say it is about padconf and not clock or clock mux
>> related.
>>
>> It just happens to be a clock signal which can be routed to this
>> pad.
>
> The two could very well be implemented as clock nodes, a mux and a gate. This would describe the hardware functionality better imo, if the assumptions made here are correct. Implementing the control as pinctrl hacks looks rather weird to me.
Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100% proper use of pinctrl.
The control register for the clock output buffer is part of the CTRL_MODULE_WKUP, which includes the well known pin controls of gpio1_wk but also this ckobuffer control. So it is grouped with these in a single control register block of the SoC. See "19.6.5.1 CTRL_MODULE_WKUP_PAD" of the TRM.
And IMHO, the naming "buffer" indicates that it controls the pad buffer (like all pinmux) and not the clock.
Yes, of course if can be described differently, as you propose. And one might argue that the twl6040 might want to request its master clock input (19.2 MHz) which could turn on the buffer on demand.
The question it raises to me are:
* isn't it "overkill" to describe a static pinmux register setup (it does not need to be turned on/off during operation) as mux (without function in OMAP5 SoC) + gate?
* does it require new driver code to correctly write to the control register?
* does it work if the twl6040 is hooked up differently?
>
> I could not find any documentation related to the ckobuffer usage though,
On the EVM it is the FREF_XTAL_OUT (Ball L33) which goes as signal H_SYSCLK through a jumper (R87) and then as signal P_SYSCLK to the MCLK (Ball K7) of the twl6040.
Description of FREF_XTAL_OUT is in section 3.3.1 of the TRM.
> maybe Peter can provide some insight?
> I think you spent some considerable time bringing up twl6040 a few years back...
Yes, that would certainly help to decide how to proceed.
>
>
> -Tero
BR and thanks,
NIkolaus
>
>>
>> BR,
>> Nikolaus
>>
>>>
>>> Regards,
>>>
>>> Tony
>>>
>>>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>>>> ---
>>>> arch/arm/boot/dts/omap5.dtsi | 10 ++++++++++
>>>> 1 file changed, 10 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>>> index 120b6b8..1d9050f 100644
>>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>>> @@ -277,6 +277,16 @@
>>>> pinctrl-single,register-width = <16>;
>>>> pinctrl-single,function-mask = <0x7fff>;
>>>> };
>>>> +
>>>> + omap5_control_ckobuffer: pinmux@cdb4 {
>>>> + compatible = "ti,omap5-padconf",
>>>> + "pinctrl-single";
>>>> + reg = <0xcdb4 4>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + pinctrl-single,register-width = <32>;
>>>> + pinctrl-single,function-mask = <0xf0000000>;
>>>> + };
>>>> };
>>>>
>>>> ocmcram: ocmcram@40300000 {
>>>> --
>>>> 2.7.3
>>>>
>>
>
[toc] | [prev] | [next] | [standalone]
| From | Tero Kristo <t-kristo@ti.com> |
|---|---|
| Date | 2016-04-27 16:20 +0200 |
| Message-ID | <rsytQ-2zP-33@gated-at.bofh.it> |
| In reply to | #1389036 |
On 27/04/16 16:10, H. Nikolaus Schaller wrote:
>
>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>:
>>
>> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>>
>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>>>
>>>> Tero,
>>>>
>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>>>> OMAP5 has a register to control if the ckobuffer is enabled
>>>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>>>> with the system clock. Hence, add the pinctrl,single to the
>>>>> OMAP5 SoC description so that omap5-board-common can
>>>>> set up the ckobuffer as required.
>>>>
>>>> Is this really a mux or should it be a mux clock?
>>>
>>> It is a pinmux setting for the clock out buffer to choose what signal
>>> (and polarity) is presented on the fref_xtal_clk pad.
>>>
>>> The register is part of the CTRL_MODULE_WKUP.
>>> The clock signal is the xtal master clock of the whole SoC.
>>>
>>> Although there is a bit to choose an alternate clock, there is no
>>> alternate in the OMAP5 silicon.
>>>
>>> Therefore I would say it is about padconf and not clock or clock mux
>>> related.
>>>
>>> It just happens to be a clock signal which can be routed to this
>>> pad.
>>
>> The two could very well be implemented as clock nodes, a mux and a gate. This would describe the hardware functionality better imo, if the assumptions made here are correct. Implementing the control as pinctrl hacks looks rather weird to me.
>
> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100% proper use of pinctrl.
It is just the level of abstraction we are talking about here. If it is
a clock we are controlling, we should rather control it as a clock
(higher level abstraction), not a pin.
>
> The control register for the clock output buffer is part of the CTRL_MODULE_WKUP, which includes the well known pin controls of gpio1_wk but also this ckobuffer control. So it is grouped with these in a single control register block of the SoC. See "19.6.5.1 CTRL_MODULE_WKUP_PAD" of the TRM.
>
> And IMHO, the naming "buffer" indicates that it controls the pad buffer (like all pinmux) and not the clock.
>
> Yes, of course if can be described differently, as you propose. And one might argue that the twl6040 might want to request its master clock input (19.2 MHz) which could turn on the buffer on demand.
From logic point of view, it might be better to describe it as a clock
node, so TWL6040 driver can ask for a clock and ask it be enabled.
>
> The question it raises to me are:
> * isn't it "overkill" to describe a static pinmux register setup (it does not need to be turned on/off during operation) as mux (without function in OMAP5 SoC) + gate?
If the mux doesn't exist in hardware, no need to worry about it then.
> * does it require new driver code to correctly write to the control register?
No, we should just be able to add some beef in the DT to describe the
clock nodes.
> * does it work if the twl6040 is hooked up differently?
Define hooked up differently. Does the setup you propose work in that case?
>
>>
>> I could not find any documentation related to the ckobuffer usage though,
>
> On the EVM it is the FREF_XTAL_OUT (Ball L33) which goes as signal H_SYSCLK through a jumper (R87) and then as signal P_SYSCLK to the MCLK (Ball K7) of the twl6040.
>
> Description of FREF_XTAL_OUT is in section 3.3.1 of the TRM.
I was just looking for ckobuffer but the TRM indeed seems to talk about
this as FREF_XTAL_CLK. It looks like there is probably no mux in the
hardware. The bit of doc I am missing right now is the description of
the SCM register in relation to what hardware actually does. Namely,
some bits in the register are rather a mystery to me.
-Tero
>
>> maybe Peter can provide some insight?
>> I think you spent some considerable time bringing up twl6040 a few years back...
>
> Yes, that would certainly help to decide how to proceed.
>
>>
>
>>
>> -Tero
>
> BR and thanks,
> NIkolaus
>
>>
>>>
>>> BR,
>>> Nikolaus
>>>
>>>>
>>>> Regards,
>>>>
>>>> Tony
>>>>
>>>>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>>>>> ---
>>>>> arch/arm/boot/dts/omap5.dtsi | 10 ++++++++++
>>>>> 1 file changed, 10 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>>>> index 120b6b8..1d9050f 100644
>>>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>>>> @@ -277,6 +277,16 @@
>>>>> pinctrl-single,register-width = <16>;
>>>>> pinctrl-single,function-mask = <0x7fff>;
>>>>> };
>>>>> +
>>>>> + omap5_control_ckobuffer: pinmux@cdb4 {
>>>>> + compatible = "ti,omap5-padconf",
>>>>> + "pinctrl-single";
>>>>> + reg = <0xcdb4 4>;
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <0>;
>>>>> + pinctrl-single,register-width = <32>;
>>>>> + pinctrl-single,function-mask = <0xf0000000>;
>>>>> + };
>>>>> };
>>>>>
>>>>> ocmcram: ocmcram@40300000 {
>>>>> --
>>>>> 2.7.3
>>>>>
>>>
>>
>
> --
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>
[toc] | [prev] | [next] | [standalone]
| From | Peter Ujfalusi <peter.ujfalusi@ti.com> |
|---|---|
| Date | 2016-04-27 16:30 +0200 |
| Message-ID | <rsyDv-2GX-3@gated-at.bofh.it> |
| In reply to | #1389114 |
On 04/27/2016 05:10 PM, Tero Kristo wrote: > On 27/04/16 16:10, H. Nikolaus Schaller wrote: >> >>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>: >>> >>> On 27/04/16 09:04, H. Nikolaus Schaller wrote: >>>> >>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>: >>>>> >>>>> Tero, >>>>> >>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]: >>>>>> OMAP5 has a register to control if the ckobuffer is enabled >>>>>> and defines the polarity. ckobuffer is required to drive a twl6040 >>>>>> with the system clock. Hence, add the pinctrl,single to the >>>>>> OMAP5 SoC description so that omap5-board-common can >>>>>> set up the ckobuffer as required. >>>>> >>>>> Is this really a mux or should it be a mux clock? >>>> >>>> It is a pinmux setting for the clock out buffer to choose what signal >>>> (and polarity) is presented on the fref_xtal_clk pad. >>>> >>>> The register is part of the CTRL_MODULE_WKUP. >>>> The clock signal is the xtal master clock of the whole SoC. >>>> >>>> Although there is a bit to choose an alternate clock, there is no >>>> alternate in the OMAP5 silicon. >>>> >>>> Therefore I would say it is about padconf and not clock or clock mux >>>> related. >>>> >>>> It just happens to be a clock signal which can be routed to this >>>> pad. >>> >>> The two could very well be implemented as clock nodes, a mux and a gate. >>> This would describe the hardware functionality better imo, if the >>> assumptions made here are correct. Implementing the control as pinctrl >>> hacks looks rather weird to me. >> >> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100% >> proper use of pinctrl. > > It is just the level of abstraction we are talking about here. If it is a > clock we are controlling, we should rather control it as a clock (higher level > abstraction), not a pin. I second this. I think it is better to have a simple gate clock and handle only CONTROL_CKOBUFFER:CKOBUFFER_CLK_EN (bit 28) only as the other bits does not have real use. Then we can add clk API support for this. On most OMAP4 devices the clock is always on, so the board DTS file need to provide a dummy clock, or we can make the high precision clock also as optional (on panda both OMAP4 and twl6040 uses the same reference clock). -- Péter
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| From | "H. Nikolaus Schaller" <hns@goldelico.com> |
|---|---|
| Date | 2016-04-27 16:40 +0200 |
| Message-ID | <rsyNc-2L2-5@gated-at.bofh.it> |
| In reply to | #1389120 |
HI, > Am 27.04.2016 um 16:23 schrieb Peter Ujfalusi <peter.ujfalusi@ti.com>: > > On 04/27/2016 05:10 PM, Tero Kristo wrote: >> On 27/04/16 16:10, H. Nikolaus Schaller wrote: >>> >>>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>: >>>> >>>> On 27/04/16 09:04, H. Nikolaus Schaller wrote: >>>>> >>>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>: >>>>>> >>>>>> Tero, >>>>>> >>>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]: >>>>>>> OMAP5 has a register to control if the ckobuffer is enabled >>>>>>> and defines the polarity. ckobuffer is required to drive a twl6040 >>>>>>> with the system clock. Hence, add the pinctrl,single to the >>>>>>> OMAP5 SoC description so that omap5-board-common can >>>>>>> set up the ckobuffer as required. >>>>>> >>>>>> Is this really a mux or should it be a mux clock? >>>>> >>>>> It is a pinmux setting for the clock out buffer to choose what signal >>>>> (and polarity) is presented on the fref_xtal_clk pad. >>>>> >>>>> The register is part of the CTRL_MODULE_WKUP. >>>>> The clock signal is the xtal master clock of the whole SoC. >>>>> >>>>> Although there is a bit to choose an alternate clock, there is no >>>>> alternate in the OMAP5 silicon. >>>>> >>>>> Therefore I would say it is about padconf and not clock or clock mux >>>>> related. >>>>> >>>>> It just happens to be a clock signal which can be routed to this >>>>> pad. >>>> >>>> The two could very well be implemented as clock nodes, a mux and a gate. >>>> This would describe the hardware functionality better imo, if the >>>> assumptions made here are correct. Implementing the control as pinctrl >>>> hacks looks rather weird to me. >>> >>> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100% >>> proper use of pinctrl. >> >> It is just the level of abstraction we are talking about here. If it is a >> clock we are controlling, we should rather control it as a clock (higher level >> abstraction), not a pin. > > I second this. I think it is better to have a simple gate clock and handle > only CONTROL_CKOBUFFER:CKOBUFFER_CLK_EN (bit 28) only as the other bits does > not have real use. > > Then we can add clk API support for this. On most OMAP4 devices the clock is > always on, this is why I am raising the question if we really want to control it on the omap5 or just turn it on for all omap5 boards like the omap4 appears to do... I.e. if turning the pin on as a pinctrl is IMHO sufficient for all practical purposes. > so the board DTS file need to provide a dummy clock, or we can make > the high precision clock also as optional (on panda both OMAP4 and twl6040 > uses the same reference clock). Hm. It looks as if implementing this (and clock gating) is beyond my experiences. But I am happy to test a proposal on our omap5 board. BR and thanks, Nikolaus
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| From | Tero Kristo <t-kristo@ti.com> |
|---|---|
| Date | 2016-04-28 10:10 +0200 |
| Message-ID | <rsPbk-8iP-21@gated-at.bofh.it> |
| In reply to | #1389128 |
On 27/04/16 17:35, H. Nikolaus Schaller wrote:
> HI,
>
>> Am 27.04.2016 um 16:23 schrieb Peter Ujfalusi <peter.ujfalusi@ti.com>:
>>
>> On 04/27/2016 05:10 PM, Tero Kristo wrote:
>>> On 27/04/16 16:10, H. Nikolaus Schaller wrote:
>>>>
>>>>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>:
>>>>>
>>>>> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>>>>>
>>>>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>>>>>>
>>>>>>> Tero,
>>>>>>>
>>>>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>>>>>>> OMAP5 has a register to control if the ckobuffer is enabled
>>>>>>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>>>>>>> with the system clock. Hence, add the pinctrl,single to the
>>>>>>>> OMAP5 SoC description so that omap5-board-common can
>>>>>>>> set up the ckobuffer as required.
>>>>>>>
>>>>>>> Is this really a mux or should it be a mux clock?
>>>>>>
>>>>>> It is a pinmux setting for the clock out buffer to choose what signal
>>>>>> (and polarity) is presented on the fref_xtal_clk pad.
>>>>>>
>>>>>> The register is part of the CTRL_MODULE_WKUP.
>>>>>> The clock signal is the xtal master clock of the whole SoC.
>>>>>>
>>>>>> Although there is a bit to choose an alternate clock, there is no
>>>>>> alternate in the OMAP5 silicon.
>>>>>>
>>>>>> Therefore I would say it is about padconf and not clock or clock mux
>>>>>> related.
>>>>>>
>>>>>> It just happens to be a clock signal which can be routed to this
>>>>>> pad.
>>>>>
>>>>> The two could very well be implemented as clock nodes, a mux and a gate.
>>>>> This would describe the hardware functionality better imo, if the
>>>>> assumptions made here are correct. Implementing the control as pinctrl
>>>>> hacks looks rather weird to me.
>>>>
>>>> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100%
>>>> proper use of pinctrl.
>>>
>>> It is just the level of abstraction we are talking about here. If it is a
>>> clock we are controlling, we should rather control it as a clock (higher level
>>> abstraction), not a pin.
>>
>> I second this. I think it is better to have a simple gate clock and handle
>> only CONTROL_CKOBUFFER:CKOBUFFER_CLK_EN (bit 28) only as the other bits does
>> not have real use.
>>
>> Then we can add clk API support for this. On most OMAP4 devices the clock is
>> always on,
>
> this is why I am raising the question if we really want to control it on the omap5 or just
> turn it on for all omap5 boards like the omap4 appears to do... I.e. if turning the pin on
> as a pinctrl is IMHO sufficient for all practical purposes.
>
>> so the board DTS file need to provide a dummy clock, or we can make
>> the high precision clock also as optional (on panda both OMAP4 and twl6040
>> uses the same reference clock).
>
> Hm. It looks as if implementing this (and clock gating) is beyond my experiences.
> But I am happy to test a proposal on our omap5 board.
>
> BR and thanks,
> Nikolaus
See the inline patch, this implements the fref_xtal_ck. I had to add
some kernel code also to cope with the new SCM area, but the same area
can now be accessed via syscon also if needed.
From: Tero Kristo <t-kristo@ti.com>
Date: Thu, 28 Apr 2016 11:00:57 +0300
Subject: [PATCH] ARM: omap5: add support for fref_xtal_ck
Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
arch/arm/boot/dts/omap5.dtsi | 22 ++++++++++++++++++++++
arch/arm/boot/dts/omap54xx-clocks.dtsi | 10 ++++++++++
arch/arm/mach-omap2/control.c | 20 ++++++++++++++++----
include/linux/clk/ti.h | 1 +
4 files changed, 49 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 38805eb..bdc6528 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -277,6 +277,28 @@
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
+
+ omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@cda0 {
+ compatible = "ti,omap5-scm-wkup-pad-conf",
+ "simple-bus";
+ reg = <0xcda0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xcda0 0x60>;
+
+ scm_wkup_pad_conf: scm_conf@0 {
+ compatible = "syscon", "simple-bus";
+ reg = <0x0 0x60>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x60>;
+
+ scm_wkup_pad_conf_clocks: clocks@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
};
ocmcram: ocmcram@40300000 {
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi
b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index 83b425f..f970dac 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -1388,3 +1388,13 @@
reg = <0x021c>;
};
};
+
+&scm_wkup_pad_conf_clocks {
+ fref_xtal_ck: fref_xtal_ck {
+ #clocks-cells = <0>;
+ compatible = "ti,gate-clock";
+ clocks = <&sys_clkin>;
+ ti,bit-shift = <28>;
+ reg = <0x14>;
+ };
+};
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
index 1662071..5956641 100644
--- a/arch/arm/mach-omap2/control.c
+++ b/arch/arm/mach-omap2/control.c
@@ -623,6 +623,7 @@ void __init omap3_ctrl_init(void)
struct control_init_data {
int index;
+ void __iomem *mem;
s16 offset;
};
@@ -635,6 +636,10 @@ static const struct control_init_data
omap2_ctrl_data = {
.offset = -OMAP2_CONTROL_GENERAL,
};
+static const struct control_init_data ctrl_aux_data = {
+ .index = TI_CLKM_CTRL_AUX,
+};
+
static const struct of_device_id omap_scrm_dt_match_table[] = {
{ .compatible = "ti,am3-scm", .data = &ctrl_data },
{ .compatible = "ti,am4-scm", .data = &ctrl_data },
@@ -644,6 +649,7 @@ static const struct of_device_id
omap_scrm_dt_match_table[] = {
{ .compatible = "ti,dm816-scrm", .data = &ctrl_data },
{ .compatible = "ti,omap4-scm-core", .data = &ctrl_data },
{ .compatible = "ti,omap5-scm-core", .data = &ctrl_data },
+ { .compatible = "ti,omap5-scm-wkup-pad-conf", .data = &ctrl_aux_data },
{ .compatible = "ti,dra7-scm-core", .data = &ctrl_data },
{ }
};
@@ -660,15 +666,21 @@ int __init omap2_control_base_init(void)
struct device_node *np;
const struct of_device_id *match;
struct control_init_data *data;
+ void __iomem *mem;
for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
data = (struct control_init_data *)match->data;
- omap2_ctrl_base = of_iomap(np, 0);
- if (!omap2_ctrl_base)
+ mem = of_iomap(np, 0);
+ if (!mem)
return -ENOMEM;
- omap2_ctrl_offset = data->offset;
+ if (data->index == TI_CLKM_CTRL) {
+ omap2_ctrl_base = mem;
+ omap2_ctrl_offset = data->offset;
+ }
+
+ data->mem = mem;
}
return 0;
@@ -713,7 +725,7 @@ int __init omap_control_init(void)
} else {
/* No scm_conf found, direct access */
ret = omap2_clk_provider_init(np, data->index, NULL,
- omap2_ctrl_base);
+ data->mem);
if (ret)
return ret;
}
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index dc5164a..be25aa8 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -195,6 +195,7 @@ enum {
TI_CLKM_PRM,
TI_CLKM_SCRM,
TI_CLKM_CTRL,
+ TI_CLKM_CTRL_AUX,
TI_CLKM_PLLSS,
CLK_MAX_MEMMAPS
};
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| From | "H. Nikolaus Schaller" <hns@goldelico.com> |
|---|---|
| Date | 2016-04-28 11:20 +0200 |
| Message-ID | <rsQh3-Jd-1@gated-at.bofh.it> |
| In reply to | #1389835 |
Hi Tero,
> Am 28.04.2016 um 10:03 schrieb Tero Kristo <t-kristo@ti.com>:
>
> On 27/04/16 17:35, H. Nikolaus Schaller wrote:
>> HI,
>>
>>> Am 27.04.2016 um 16:23 schrieb Peter Ujfalusi <peter.ujfalusi@ti.com>:
>>>
>>> On 04/27/2016 05:10 PM, Tero Kristo wrote:
>>>> On 27/04/16 16:10, H. Nikolaus Schaller wrote:
>>>>>
>>>>>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>:
>>>>>>
>>>>>> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>>>>>>
>>>>>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>>>>>>>
>>>>>>>> Tero,
>>>>>>>>
>>>>>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>>>>>>>> OMAP5 has a register to control if the ckobuffer is enabled
>>>>>>>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>>>>>>>> with the system clock. Hence, add the pinctrl,single to the
>>>>>>>>> OMAP5 SoC description so that omap5-board-common can
>>>>>>>>> set up the ckobuffer as required.
>>>>>>>>
>>>>>>>> Is this really a mux or should it be a mux clock?
>>>>>>>
>>>>>>> It is a pinmux setting for the clock out buffer to choose what signal
>>>>>>> (and polarity) is presented on the fref_xtal_clk pad.
>>>>>>>
>>>>>>> The register is part of the CTRL_MODULE_WKUP.
>>>>>>> The clock signal is the xtal master clock of the whole SoC.
>>>>>>>
>>>>>>> Although there is a bit to choose an alternate clock, there is no
>>>>>>> alternate in the OMAP5 silicon.
>>>>>>>
>>>>>>> Therefore I would say it is about padconf and not clock or clock mux
>>>>>>> related.
>>>>>>>
>>>>>>> It just happens to be a clock signal which can be routed to this
>>>>>>> pad.
>>>>>>
>>>>>> The two could very well be implemented as clock nodes, a mux and a gate.
>>>>>> This would describe the hardware functionality better imo, if the
>>>>>> assumptions made here are correct. Implementing the control as pinctrl
>>>>>> hacks looks rather weird to me.
>>>>>
>>>>> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100%
>>>>> proper use of pinctrl.
>>>>
>>>> It is just the level of abstraction we are talking about here. If it is a
>>>> clock we are controlling, we should rather control it as a clock (higher level
>>>> abstraction), not a pin.
>>>
>>> I second this. I think it is better to have a simple gate clock and handle
>>> only CONTROL_CKOBUFFER:CKOBUFFER_CLK_EN (bit 28) only as the other bits does
>>> not have real use.
>>>
>>> Then we can add clk API support for this. On most OMAP4 devices the clock is
>>> always on,
>>
>> this is why I am raising the question if we really want to control it on the omap5 or just
>> turn it on for all omap5 boards like the omap4 appears to do... I.e. if turning the pin on
>> as a pinctrl is IMHO sufficient for all practical purposes.
>>
>>> so the board DTS file need to provide a dummy clock, or we can make
>>> the high precision clock also as optional (on panda both OMAP4 and twl6040
>>> uses the same reference clock).
>>
>> Hm. It looks as if implementing this (and clock gating) is beyond my experiences.
>> But I am happy to test a proposal on our omap5 board.
>>
>> BR and thanks,
>> Nikolaus
>
> See the inline patch, this implements the fref_xtal_ck. I had to add some kernel code also to cope with the new SCM area, but the same area can now be accessed via syscon also if needed.
Looks interesting, although quite complex to enable a single SoC pad at boot time...
Will asap study how it works and test. And of course report results.
Thanks and BR,
Nikolaus
>
> From: Tero Kristo <t-kristo@ti.com>
> Date: Thu, 28 Apr 2016 11:00:57 +0300
> Subject: [PATCH] ARM: omap5: add support for fref_xtal_ck
>
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---
> arch/arm/boot/dts/omap5.dtsi | 22 ++++++++++++++++++++++
> arch/arm/boot/dts/omap54xx-clocks.dtsi | 10 ++++++++++
> arch/arm/mach-omap2/control.c | 20 ++++++++++++++++----
> include/linux/clk/ti.h | 1 +
> 4 files changed, 49 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 38805eb..bdc6528 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -277,6 +277,28 @@
> pinctrl-single,register-width = <16>;
> pinctrl-single,function-mask = <0x7fff>;
> };
> +
> + omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@cda0 {
> + compatible = "ti,omap5-scm-wkup-pad-conf",
> + "simple-bus";
> + reg = <0xcda0 0x60>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0xcda0 0x60>;
> +
> + scm_wkup_pad_conf: scm_conf@0 {
> + compatible = "syscon", "simple-bus";
> + reg = <0x0 0x60>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x0 0x60>;
> +
> + scm_wkup_pad_conf_clocks: clocks@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> + };
> };
>
> ocmcram: ocmcram@40300000 {
> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
> index 83b425f..f970dac 100644
> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
> @@ -1388,3 +1388,13 @@
> reg = <0x021c>;
> };
> };
> +
> +&scm_wkup_pad_conf_clocks {
> + fref_xtal_ck: fref_xtal_ck {
> + #clocks-cells = <0>;
> + compatible = "ti,gate-clock";
> + clocks = <&sys_clkin>;
> + ti,bit-shift = <28>;
> + reg = <0x14>;
> + };
> +};
> diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
> index 1662071..5956641 100644
> --- a/arch/arm/mach-omap2/control.c
> +++ b/arch/arm/mach-omap2/control.c
> @@ -623,6 +623,7 @@ void __init omap3_ctrl_init(void)
>
> struct control_init_data {
> int index;
> + void __iomem *mem;
> s16 offset;
> };
>
> @@ -635,6 +636,10 @@ static const struct control_init_data omap2_ctrl_data = {
> .offset = -OMAP2_CONTROL_GENERAL,
> };
>
> +static const struct control_init_data ctrl_aux_data = {
> + .index = TI_CLKM_CTRL_AUX,
> +};
> +
> static const struct of_device_id omap_scrm_dt_match_table[] = {
> { .compatible = "ti,am3-scm", .data = &ctrl_data },
> { .compatible = "ti,am4-scm", .data = &ctrl_data },
> @@ -644,6 +649,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = {
> { .compatible = "ti,dm816-scrm", .data = &ctrl_data },
> { .compatible = "ti,omap4-scm-core", .data = &ctrl_data },
> { .compatible = "ti,omap5-scm-core", .data = &ctrl_data },
> + { .compatible = "ti,omap5-scm-wkup-pad-conf", .data = &ctrl_aux_data },
> { .compatible = "ti,dra7-scm-core", .data = &ctrl_data },
> { }
> };
> @@ -660,15 +666,21 @@ int __init omap2_control_base_init(void)
> struct device_node *np;
> const struct of_device_id *match;
> struct control_init_data *data;
> + void __iomem *mem;
>
> for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
> data = (struct control_init_data *)match->data;
>
> - omap2_ctrl_base = of_iomap(np, 0);
> - if (!omap2_ctrl_base)
> + mem = of_iomap(np, 0);
> + if (!mem)
> return -ENOMEM;
>
> - omap2_ctrl_offset = data->offset;
> + if (data->index == TI_CLKM_CTRL) {
> + omap2_ctrl_base = mem;
> + omap2_ctrl_offset = data->offset;
> + }
> +
> + data->mem = mem;
> }
>
> return 0;
> @@ -713,7 +725,7 @@ int __init omap_control_init(void)
> } else {
> /* No scm_conf found, direct access */
> ret = omap2_clk_provider_init(np, data->index, NULL,
> - omap2_ctrl_base);
> + data->mem);
> if (ret)
> return ret;
> }
> diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
> index dc5164a..be25aa8 100644
> --- a/include/linux/clk/ti.h
> +++ b/include/linux/clk/ti.h
> @@ -195,6 +195,7 @@ enum {
> TI_CLKM_PRM,
> TI_CLKM_SCRM,
> TI_CLKM_CTRL,
> + TI_CLKM_CTRL_AUX,
> TI_CLKM_PLLSS,
> CLK_MAX_MEMMAPS
> };
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| From | Tero Kristo <t-kristo@ti.com> |
|---|---|
| Date | 2016-04-28 15:30 +0200 |
| Message-ID | <rsUb2-3LP-63@gated-at.bofh.it> |
| In reply to | #1389920 |
On 28/04/16 12:12, H. Nikolaus Schaller wrote:
> Hi Tero,
>
>> Am 28.04.2016 um 10:03 schrieb Tero Kristo <t-kristo@ti.com>:
>>
>> On 27/04/16 17:35, H. Nikolaus Schaller wrote:
>>> HI,
>>>
>>>> Am 27.04.2016 um 16:23 schrieb Peter Ujfalusi <peter.ujfalusi@ti.com>:
>>>>
>>>> On 04/27/2016 05:10 PM, Tero Kristo wrote:
>>>>> On 27/04/16 16:10, H. Nikolaus Schaller wrote:
>>>>>>
>>>>>>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>:
>>>>>>>
>>>>>>> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>>>>>>>
>>>>>>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>>>>>>>>
>>>>>>>>> Tero,
>>>>>>>>>
>>>>>>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>>>>>>>>> OMAP5 has a register to control if the ckobuffer is enabled
>>>>>>>>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>>>>>>>>> with the system clock. Hence, add the pinctrl,single to the
>>>>>>>>>> OMAP5 SoC description so that omap5-board-common can
>>>>>>>>>> set up the ckobuffer as required.
>>>>>>>>>
>>>>>>>>> Is this really a mux or should it be a mux clock?
>>>>>>>>
>>>>>>>> It is a pinmux setting for the clock out buffer to choose what signal
>>>>>>>> (and polarity) is presented on the fref_xtal_clk pad.
>>>>>>>>
>>>>>>>> The register is part of the CTRL_MODULE_WKUP.
>>>>>>>> The clock signal is the xtal master clock of the whole SoC.
>>>>>>>>
>>>>>>>> Although there is a bit to choose an alternate clock, there is no
>>>>>>>> alternate in the OMAP5 silicon.
>>>>>>>>
>>>>>>>> Therefore I would say it is about padconf and not clock or clock mux
>>>>>>>> related.
>>>>>>>>
>>>>>>>> It just happens to be a clock signal which can be routed to this
>>>>>>>> pad.
>>>>>>>
>>>>>>> The two could very well be implemented as clock nodes, a mux and a gate.
>>>>>>> This would describe the hardware functionality better imo, if the
>>>>>>> assumptions made here are correct. Implementing the control as pinctrl
>>>>>>> hacks looks rather weird to me.
>>>>>>
>>>>>> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100%
>>>>>> proper use of pinctrl.
>>>>>
>>>>> It is just the level of abstraction we are talking about here. If it is a
>>>>> clock we are controlling, we should rather control it as a clock (higher level
>>>>> abstraction), not a pin.
>>>>
>>>> I second this. I think it is better to have a simple gate clock and handle
>>>> only CONTROL_CKOBUFFER:CKOBUFFER_CLK_EN (bit 28) only as the other bits does
>>>> not have real use.
>>>>
>>>> Then we can add clk API support for this. On most OMAP4 devices the clock is
>>>> always on,
>>>
>>> this is why I am raising the question if we really want to control it on the omap5 or just
>>> turn it on for all omap5 boards like the omap4 appears to do... I.e. if turning the pin on
>>> as a pinctrl is IMHO sufficient for all practical purposes.
>>>
>>>> so the board DTS file need to provide a dummy clock, or we can make
>>>> the high precision clock also as optional (on panda both OMAP4 and twl6040
>>>> uses the same reference clock).
>>>
>>> Hm. It looks as if implementing this (and clock gating) is beyond my experiences.
>>> But I am happy to test a proposal on our omap5 board.
>>>
>>> BR and thanks,
>>> Nikolaus
>>
>> See the inline patch, this implements the fref_xtal_ck. I had to add some kernel code also to cope with the new SCM area, but the same area can now be accessed via syscon also if needed.
>
> Looks interesting, although quite complex to enable a single SoC pad at boot time...
Yea it gives plenty of other things for you also. syscon, integration
with clock framework, etc.
>
> Will asap study how it works and test. And of course report results.
Thanks, Tero.
>
> Thanks and BR,
> Nikolaus
>
>>
>> From: Tero Kristo <t-kristo@ti.com>
>> Date: Thu, 28 Apr 2016 11:00:57 +0300
>> Subject: [PATCH] ARM: omap5: add support for fref_xtal_ck
>>
>> Signed-off-by: Tero Kristo <t-kristo@ti.com>
>> ---
>> arch/arm/boot/dts/omap5.dtsi | 22 ++++++++++++++++++++++
>> arch/arm/boot/dts/omap54xx-clocks.dtsi | 10 ++++++++++
>> arch/arm/mach-omap2/control.c | 20 ++++++++++++++++----
>> include/linux/clk/ti.h | 1 +
>> 4 files changed, 49 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>> index 38805eb..bdc6528 100644
>> --- a/arch/arm/boot/dts/omap5.dtsi
>> +++ b/arch/arm/boot/dts/omap5.dtsi
>> @@ -277,6 +277,28 @@
>> pinctrl-single,register-width = <16>;
>> pinctrl-single,function-mask = <0x7fff>;
>> };
>> +
>> + omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@cda0 {
>> + compatible = "ti,omap5-scm-wkup-pad-conf",
>> + "simple-bus";
>> + reg = <0xcda0 0x60>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0 0xcda0 0x60>;
>> +
>> + scm_wkup_pad_conf: scm_conf@0 {
>> + compatible = "syscon", "simple-bus";
>> + reg = <0x0 0x60>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges = <0 0x0 0x60>;
>> +
>> + scm_wkup_pad_conf_clocks: clocks@0 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + };
>> + };
>> + };
>> };
>>
>> ocmcram: ocmcram@40300000 {
>> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> index 83b425f..f970dac 100644
>> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>> @@ -1388,3 +1388,13 @@
>> reg = <0x021c>;
>> };
>> };
>> +
>> +&scm_wkup_pad_conf_clocks {
>> + fref_xtal_ck: fref_xtal_ck {
>> + #clocks-cells = <0>;
>> + compatible = "ti,gate-clock";
>> + clocks = <&sys_clkin>;
>> + ti,bit-shift = <28>;
>> + reg = <0x14>;
>> + };
>> +};
>> diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
>> index 1662071..5956641 100644
>> --- a/arch/arm/mach-omap2/control.c
>> +++ b/arch/arm/mach-omap2/control.c
>> @@ -623,6 +623,7 @@ void __init omap3_ctrl_init(void)
>>
>> struct control_init_data {
>> int index;
>> + void __iomem *mem;
>> s16 offset;
>> };
>>
>> @@ -635,6 +636,10 @@ static const struct control_init_data omap2_ctrl_data = {
>> .offset = -OMAP2_CONTROL_GENERAL,
>> };
>>
>> +static const struct control_init_data ctrl_aux_data = {
>> + .index = TI_CLKM_CTRL_AUX,
>> +};
>> +
>> static const struct of_device_id omap_scrm_dt_match_table[] = {
>> { .compatible = "ti,am3-scm", .data = &ctrl_data },
>> { .compatible = "ti,am4-scm", .data = &ctrl_data },
>> @@ -644,6 +649,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = {
>> { .compatible = "ti,dm816-scrm", .data = &ctrl_data },
>> { .compatible = "ti,omap4-scm-core", .data = &ctrl_data },
>> { .compatible = "ti,omap5-scm-core", .data = &ctrl_data },
>> + { .compatible = "ti,omap5-scm-wkup-pad-conf", .data = &ctrl_aux_data },
>> { .compatible = "ti,dra7-scm-core", .data = &ctrl_data },
>> { }
>> };
>> @@ -660,15 +666,21 @@ int __init omap2_control_base_init(void)
>> struct device_node *np;
>> const struct of_device_id *match;
>> struct control_init_data *data;
>> + void __iomem *mem;
>>
>> for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
>> data = (struct control_init_data *)match->data;
>>
>> - omap2_ctrl_base = of_iomap(np, 0);
>> - if (!omap2_ctrl_base)
>> + mem = of_iomap(np, 0);
>> + if (!mem)
>> return -ENOMEM;
>>
>> - omap2_ctrl_offset = data->offset;
>> + if (data->index == TI_CLKM_CTRL) {
>> + omap2_ctrl_base = mem;
>> + omap2_ctrl_offset = data->offset;
>> + }
>> +
>> + data->mem = mem;
>> }
>>
>> return 0;
>> @@ -713,7 +725,7 @@ int __init omap_control_init(void)
>> } else {
>> /* No scm_conf found, direct access */
>> ret = omap2_clk_provider_init(np, data->index, NULL,
>> - omap2_ctrl_base);
>> + data->mem);
>> if (ret)
>> return ret;
>> }
>> diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
>> index dc5164a..be25aa8 100644
>> --- a/include/linux/clk/ti.h
>> +++ b/include/linux/clk/ti.h
>> @@ -195,6 +195,7 @@ enum {
>> TI_CLKM_PRM,
>> TI_CLKM_SCRM,
>> TI_CLKM_CTRL,
>> + TI_CLKM_CTRL_AUX,
>> TI_CLKM_PLLSS,
>> CLK_MAX_MEMMAPS
>> };
>
[toc] | [prev] | [next] | [standalone]
| From | "H. Nikolaus Schaller" <hns@goldelico.com> |
|---|---|
| Date | 2016-05-09 13:20 +0200 |
| Message-ID | <rwRoe-4pL-3@gated-at.bofh.it> |
| In reply to | #1390184 |
Hi,
> Am 28.04.2016 um 15:23 schrieb Tero Kristo <t-kristo@ti.com>:
>
> On 28/04/16 12:12, H. Nikolaus Schaller wrote:
>> Hi Tero,
>>
>>> Am 28.04.2016 um 10:03 schrieb Tero Kristo <t-kristo@ti.com>:
>>>
>>> On 27/04/16 17:35, H. Nikolaus Schaller wrote:
>>>> HI,
>>>>
>>>>> Am 27.04.2016 um 16:23 schrieb Peter Ujfalusi <peter.ujfalusi@ti.com>:
>>>>>
>>>>> On 04/27/2016 05:10 PM, Tero Kristo wrote:
>>>>>> On 27/04/16 16:10, H. Nikolaus Schaller wrote:
>>>>>>>
>>>>>>>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>:
>>>>>>>>
>>>>>>>> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>>>>>>>>
>>>>>>>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>>>>>>>>>
>>>>>>>>>> Tero,
>>>>>>>>>>
>>>>>>>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>>>>>>>>>> OMAP5 has a register to control if the ckobuffer is enabled
>>>>>>>>>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>>>>>>>>>> with the system clock. Hence, add the pinctrl,single to the
>>>>>>>>>>> OMAP5 SoC description so that omap5-board-common can
>>>>>>>>>>> set up the ckobuffer as required.
>>>>>>>>>>
>>>>>>>>>> Is this really a mux or should it be a mux clock?
>>>>>>>>>
>>>>>>>>> It is a pinmux setting for the clock out buffer to choose what signal
>>>>>>>>> (and polarity) is presented on the fref_xtal_clk pad.
>>>>>>>>>
>>>>>>>>> The register is part of the CTRL_MODULE_WKUP.
>>>>>>>>> The clock signal is the xtal master clock of the whole SoC.
>>>>>>>>>
>>>>>>>>> Although there is a bit to choose an alternate clock, there is no
>>>>>>>>> alternate in the OMAP5 silicon.
>>>>>>>>>
>>>>>>>>> Therefore I would say it is about padconf and not clock or clock mux
>>>>>>>>> related.
>>>>>>>>>
>>>>>>>>> It just happens to be a clock signal which can be routed to this
>>>>>>>>> pad.
>>>>>>>>
>>>>>>>> The two could very well be implemented as clock nodes, a mux and a gate.
>>>>>>>> This would describe the hardware functionality better imo, if the
>>>>>>>> assumptions made here are correct. Implementing the control as pinctrl
>>>>>>>> hacks looks rather weird to me.
>>>>>>>
>>>>>>> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100%
>>>>>>> proper use of pinctrl.
>>>>>>
>>>>>> It is just the level of abstraction we are talking about here. If it is a
>>>>>> clock we are controlling, we should rather control it as a clock (higher level
>>>>>> abstraction), not a pin.
>>>>>
>>>>> I second this. I think it is better to have a simple gate clock and handle
>>>>> only CONTROL_CKOBUFFER:CKOBUFFER_CLK_EN (bit 28) only as the other bits does
>>>>> not have real use.
>>>>>
>>>>> Then we can add clk API support for this. On most OMAP4 devices the clock is
>>>>> always on,
>>>>
>>>> this is why I am raising the question if we really want to control it on the omap5 or just
>>>> turn it on for all omap5 boards like the omap4 appears to do... I.e. if turning the pin on
>>>> as a pinctrl is IMHO sufficient for all practical purposes.
>>>>
>>>>> so the board DTS file need to provide a dummy clock, or we can make
>>>>> the high precision clock also as optional (on panda both OMAP4 and twl6040
>>>>> uses the same reference clock).
>>>>
>>>> Hm. It looks as if implementing this (and clock gating) is beyond my experiences.
>>>> But I am happy to test a proposal on our omap5 board.
>>>>
>>>> BR and thanks,
>>>> Nikolaus
>>>
>>> See the inline patch, this implements the fref_xtal_ck. I had to add some kernel code also to cope with the new SCM area, but the same area can now be accessed via syscon also if needed.
>>
>> Looks interesting, although quite complex to enable a single SoC pad at boot time...
>
> Yea it gives plenty of other things for you also. syscon, integration with clock framework, etc.
>
>>
>> Will asap study how it works and test. And of course report results.
>
> Thanks, Tero.
>
>>
>> Thanks and BR,
>> Nikolaus
>>
>>>
>>> From: Tero Kristo <t-kristo@ti.com>
>>> Date: Thu, 28 Apr 2016 11:00:57 +0300
>>> Subject: [PATCH] ARM: omap5: add support for fref_xtal_ck
>>>
>>> Signed-off-by: Tero Kristo <t-kristo@ti.com>
>>> ---
>>> arch/arm/boot/dts/omap5.dtsi | 22 ++++++++++++++++++++++
>>> arch/arm/boot/dts/omap54xx-clocks.dtsi | 10 ++++++++++
>>> arch/arm/mach-omap2/control.c | 20 ++++++++++++++++----
>>> include/linux/clk/ti.h | 1 +
>>> 4 files changed, 49 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>> index 38805eb..bdc6528 100644
>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>> @@ -277,6 +277,28 @@
>>> pinctrl-single,register-width = <16>;
>>> pinctrl-single,function-mask = <0x7fff>;
>>> };
>>> +
>>> + omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@cda0 {
>>> + compatible = "ti,omap5-scm-wkup-pad-conf",
>>> + "simple-bus";
>>> + reg = <0xcda0 0x60>;
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges = <0 0xcda0 0x60>;
>>> +
>>> + scm_wkup_pad_conf: scm_conf@0 {
>>> + compatible = "syscon", "simple-bus";
>>> + reg = <0x0 0x60>;
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges = <0 0x0 0x60>;
>>> +
>>> + scm_wkup_pad_conf_clocks: clocks@0 {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> + };
>>> + };
>>> + };
>>> };
>>>
>>> ocmcram: ocmcram@40300000 {
>>> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>> index 83b425f..f970dac 100644
>>> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>> @@ -1388,3 +1388,13 @@
>>> reg = <0x021c>;
>>> };
>>> };
>>> +
>>> +&scm_wkup_pad_conf_clocks {
>>> + fref_xtal_ck: fref_xtal_ck {
>>> + #clocks-cells = <0>;
>>> + compatible = "ti,gate-clock";
>>> + clocks = <&sys_clkin>;
>>> + ti,bit-shift = <28>;
>>> + reg = <0x14>;
>>> + };
>>> +};
>>> diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
>>> index 1662071..5956641 100644
>>> --- a/arch/arm/mach-omap2/control.c
>>> +++ b/arch/arm/mach-omap2/control.c
>>> @@ -623,6 +623,7 @@ void __init omap3_ctrl_init(void)
>>>
>>> struct control_init_data {
>>> int index;
>>> + void __iomem *mem;
>>> s16 offset;
>>> };
>>>
>>> @@ -635,6 +636,10 @@ static const struct control_init_data omap2_ctrl_data = {
>>> .offset = -OMAP2_CONTROL_GENERAL,
>>> };
>>>
>>> +static const struct control_init_data ctrl_aux_data = {
>>> + .index = TI_CLKM_CTRL_AUX,
>>> +};
>>> +
>>> static const struct of_device_id omap_scrm_dt_match_table[] = {
>>> { .compatible = "ti,am3-scm", .data = &ctrl_data },
>>> { .compatible = "ti,am4-scm", .data = &ctrl_data },
>>> @@ -644,6 +649,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = {
>>> { .compatible = "ti,dm816-scrm", .data = &ctrl_data },
>>> { .compatible = "ti,omap4-scm-core", .data = &ctrl_data },
>>> { .compatible = "ti,omap5-scm-core", .data = &ctrl_data },
>>> + { .compatible = "ti,omap5-scm-wkup-pad-conf", .data = &ctrl_aux_data },
>>> { .compatible = "ti,dra7-scm-core", .data = &ctrl_data },
>>> { }
>>> };
>>> @@ -660,15 +666,21 @@ int __init omap2_control_base_init(void)
>>> struct device_node *np;
>>> const struct of_device_id *match;
>>> struct control_init_data *data;
>>> + void __iomem *mem;
>>>
>>> for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
>>> data = (struct control_init_data *)match->data;
>>>
>>> - omap2_ctrl_base = of_iomap(np, 0);
>>> - if (!omap2_ctrl_base)
>>> + mem = of_iomap(np, 0);
>>> + if (!mem)
>>> return -ENOMEM;
>>>
>>> - omap2_ctrl_offset = data->offset;
>>> + if (data->index == TI_CLKM_CTRL) {
>>> + omap2_ctrl_base = mem;
>>> + omap2_ctrl_offset = data->offset;
>>> + }
>>> +
>>> + data->mem = mem;
>>> }
>>>
>>> return 0;
>>> @@ -713,7 +725,7 @@ int __init omap_control_init(void)
>>> } else {
>>> /* No scm_conf found, direct access */
>>> ret = omap2_clk_provider_init(np, data->index, NULL,
>>> - omap2_ctrl_base);
>>> + data->mem);
>>> if (ret)
>>> return ret;
>>> }
>>> diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
>>> index dc5164a..be25aa8 100644
>>> --- a/include/linux/clk/ti.h
>>> +++ b/include/linux/clk/ti.h
>>> @@ -195,6 +195,7 @@ enum {
>>> TI_CLKM_PRM,
>>> TI_CLKM_SCRM,
>>> TI_CLKM_CTRL,
>>> + TI_CLKM_CTRL_AUX,
>>> TI_CLKM_PLLSS,
>>> CLK_MAX_MEMMAPS
>>> };
>>
>
finally I found some time to apply your patches. Sorry for the long time.
Unfortunately, it does not work. Neither on omap5evm nor on our omap5 hardware.
I get no sound on the twl6040 - just white noise (which can be controlled in level through
amixer so it is created on the digital input side of the twl6040).
So I think your patch is missing a detail compared to my simple solution.
BR,
Nikolaus
[toc] | [prev] | [next] | [standalone]
| From | Tero Kristo <t-kristo@ti.com> |
|---|---|
| Date | 2016-05-09 14:00 +0200 |
| Message-ID | <rwS0V-4NU-11@gated-at.bofh.it> |
| In reply to | #1396945 |
On 09/05/16 14:18, H. Nikolaus Schaller wrote:
> Hi,
>
>> Am 28.04.2016 um 15:23 schrieb Tero Kristo <t-kristo@ti.com>:
>>
>> On 28/04/16 12:12, H. Nikolaus Schaller wrote:
>>> Hi Tero,
>>>
>>>> Am 28.04.2016 um 10:03 schrieb Tero Kristo <t-kristo@ti.com>:
>>>>
>>>> On 27/04/16 17:35, H. Nikolaus Schaller wrote:
>>>>> HI,
>>>>>
>>>>>> Am 27.04.2016 um 16:23 schrieb Peter Ujfalusi <peter.ujfalusi@ti.com>:
>>>>>>
>>>>>> On 04/27/2016 05:10 PM, Tero Kristo wrote:
>>>>>>> On 27/04/16 16:10, H. Nikolaus Schaller wrote:
>>>>>>>>
>>>>>>>>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>:
>>>>>>>>>
>>>>>>>>> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>>>>>>>>>
>>>>>>>>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>>>>>>>>>>
>>>>>>>>>>> Tero,
>>>>>>>>>>>
>>>>>>>>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>>>>>>>>>>> OMAP5 has a register to control if the ckobuffer is enabled
>>>>>>>>>>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>>>>>>>>>>> with the system clock. Hence, add the pinctrl,single to the
>>>>>>>>>>>> OMAP5 SoC description so that omap5-board-common can
>>>>>>>>>>>> set up the ckobuffer as required.
>>>>>>>>>>>
>>>>>>>>>>> Is this really a mux or should it be a mux clock?
>>>>>>>>>>
>>>>>>>>>> It is a pinmux setting for the clock out buffer to choose what signal
>>>>>>>>>> (and polarity) is presented on the fref_xtal_clk pad.
>>>>>>>>>>
>>>>>>>>>> The register is part of the CTRL_MODULE_WKUP.
>>>>>>>>>> The clock signal is the xtal master clock of the whole SoC.
>>>>>>>>>>
>>>>>>>>>> Although there is a bit to choose an alternate clock, there is no
>>>>>>>>>> alternate in the OMAP5 silicon.
>>>>>>>>>>
>>>>>>>>>> Therefore I would say it is about padconf and not clock or clock mux
>>>>>>>>>> related.
>>>>>>>>>>
>>>>>>>>>> It just happens to be a clock signal which can be routed to this
>>>>>>>>>> pad.
>>>>>>>>>
>>>>>>>>> The two could very well be implemented as clock nodes, a mux and a gate.
>>>>>>>>> This would describe the hardware functionality better imo, if the
>>>>>>>>> assumptions made here are correct. Implementing the control as pinctrl
>>>>>>>>> hacks looks rather weird to me.
>>>>>>>>
>>>>>>>> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100%
>>>>>>>> proper use of pinctrl.
>>>>>>>
>>>>>>> It is just the level of abstraction we are talking about here. If it is a
>>>>>>> clock we are controlling, we should rather control it as a clock (higher level
>>>>>>> abstraction), not a pin.
>>>>>>
>>>>>> I second this. I think it is better to have a simple gate clock and handle
>>>>>> only CONTROL_CKOBUFFER:CKOBUFFER_CLK_EN (bit 28) only as the other bits does
>>>>>> not have real use.
>>>>>>
>>>>>> Then we can add clk API support for this. On most OMAP4 devices the clock is
>>>>>> always on,
>>>>>
>>>>> this is why I am raising the question if we really want to control it on the omap5 or just
>>>>> turn it on for all omap5 boards like the omap4 appears to do... I.e. if turning the pin on
>>>>> as a pinctrl is IMHO sufficient for all practical purposes.
>>>>>
>>>>>> so the board DTS file need to provide a dummy clock, or we can make
>>>>>> the high precision clock also as optional (on panda both OMAP4 and twl6040
>>>>>> uses the same reference clock).
>>>>>
>>>>> Hm. It looks as if implementing this (and clock gating) is beyond my experiences.
>>>>> But I am happy to test a proposal on our omap5 board.
>>>>>
>>>>> BR and thanks,
>>>>> Nikolaus
>>>>
>>>> See the inline patch, this implements the fref_xtal_ck. I had to add some kernel code also to cope with the new SCM area, but the same area can now be accessed via syscon also if needed.
>>>
>>> Looks interesting, although quite complex to enable a single SoC pad at boot time...
>>
>> Yea it gives plenty of other things for you also. syscon, integration with clock framework, etc.
>>
>>>
>>> Will asap study how it works and test. And of course report results.
>>
>> Thanks, Tero.
>>
>>>
>>> Thanks and BR,
>>> Nikolaus
>>>
>>>>
>>>> From: Tero Kristo <t-kristo@ti.com>
>>>> Date: Thu, 28 Apr 2016 11:00:57 +0300
>>>> Subject: [PATCH] ARM: omap5: add support for fref_xtal_ck
>>>>
>>>> Signed-off-by: Tero Kristo <t-kristo@ti.com>
>>>> ---
>>>> arch/arm/boot/dts/omap5.dtsi | 22 ++++++++++++++++++++++
>>>> arch/arm/boot/dts/omap54xx-clocks.dtsi | 10 ++++++++++
>>>> arch/arm/mach-omap2/control.c | 20 ++++++++++++++++----
>>>> include/linux/clk/ti.h | 1 +
>>>> 4 files changed, 49 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>>> index 38805eb..bdc6528 100644
>>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>>> @@ -277,6 +277,28 @@
>>>> pinctrl-single,register-width = <16>;
>>>> pinctrl-single,function-mask = <0x7fff>;
>>>> };
>>>> +
>>>> + omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@cda0 {
>>>> + compatible = "ti,omap5-scm-wkup-pad-conf",
>>>> + "simple-bus";
>>>> + reg = <0xcda0 0x60>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + ranges = <0 0xcda0 0x60>;
>>>> +
>>>> + scm_wkup_pad_conf: scm_conf@0 {
>>>> + compatible = "syscon", "simple-bus";
>>>> + reg = <0x0 0x60>;
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + ranges = <0 0x0 0x60>;
>>>> +
>>>> + scm_wkup_pad_conf_clocks: clocks@0 {
>>>> + #address-cells = <1>;
>>>> + #size-cells = <0>;
>>>> + };
>>>> + };
>>>> + };
>>>> };
>>>>
>>>> ocmcram: ocmcram@40300000 {
>>>> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>>> index 83b425f..f970dac 100644
>>>> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>>> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>>> @@ -1388,3 +1388,13 @@
>>>> reg = <0x021c>;
>>>> };
>>>> };
>>>> +
>>>> +&scm_wkup_pad_conf_clocks {
>>>> + fref_xtal_ck: fref_xtal_ck {
>>>> + #clocks-cells = <0>;
>>>> + compatible = "ti,gate-clock";
>>>> + clocks = <&sys_clkin>;
>>>> + ti,bit-shift = <28>;
>>>> + reg = <0x14>;
>>>> + };
>>>> +};
>>>> diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
>>>> index 1662071..5956641 100644
>>>> --- a/arch/arm/mach-omap2/control.c
>>>> +++ b/arch/arm/mach-omap2/control.c
>>>> @@ -623,6 +623,7 @@ void __init omap3_ctrl_init(void)
>>>>
>>>> struct control_init_data {
>>>> int index;
>>>> + void __iomem *mem;
>>>> s16 offset;
>>>> };
>>>>
>>>> @@ -635,6 +636,10 @@ static const struct control_init_data omap2_ctrl_data = {
>>>> .offset = -OMAP2_CONTROL_GENERAL,
>>>> };
>>>>
>>>> +static const struct control_init_data ctrl_aux_data = {
>>>> + .index = TI_CLKM_CTRL_AUX,
>>>> +};
>>>> +
>>>> static const struct of_device_id omap_scrm_dt_match_table[] = {
>>>> { .compatible = "ti,am3-scm", .data = &ctrl_data },
>>>> { .compatible = "ti,am4-scm", .data = &ctrl_data },
>>>> @@ -644,6 +649,7 @@ static const struct of_device_id omap_scrm_dt_match_table[] = {
>>>> { .compatible = "ti,dm816-scrm", .data = &ctrl_data },
>>>> { .compatible = "ti,omap4-scm-core", .data = &ctrl_data },
>>>> { .compatible = "ti,omap5-scm-core", .data = &ctrl_data },
>>>> + { .compatible = "ti,omap5-scm-wkup-pad-conf", .data = &ctrl_aux_data },
>>>> { .compatible = "ti,dra7-scm-core", .data = &ctrl_data },
>>>> { }
>>>> };
>>>> @@ -660,15 +666,21 @@ int __init omap2_control_base_init(void)
>>>> struct device_node *np;
>>>> const struct of_device_id *match;
>>>> struct control_init_data *data;
>>>> + void __iomem *mem;
>>>>
>>>> for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
>>>> data = (struct control_init_data *)match->data;
>>>>
>>>> - omap2_ctrl_base = of_iomap(np, 0);
>>>> - if (!omap2_ctrl_base)
>>>> + mem = of_iomap(np, 0);
>>>> + if (!mem)
>>>> return -ENOMEM;
>>>>
>>>> - omap2_ctrl_offset = data->offset;
>>>> + if (data->index == TI_CLKM_CTRL) {
>>>> + omap2_ctrl_base = mem;
>>>> + omap2_ctrl_offset = data->offset;
>>>> + }
>>>> +
>>>> + data->mem = mem;
>>>> }
>>>>
>>>> return 0;
>>>> @@ -713,7 +725,7 @@ int __init omap_control_init(void)
>>>> } else {
>>>> /* No scm_conf found, direct access */
>>>> ret = omap2_clk_provider_init(np, data->index, NULL,
>>>> - omap2_ctrl_base);
>>>> + data->mem);
>>>> if (ret)
>>>> return ret;
>>>> }
>>>> diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
>>>> index dc5164a..be25aa8 100644
>>>> --- a/include/linux/clk/ti.h
>>>> +++ b/include/linux/clk/ti.h
>>>> @@ -195,6 +195,7 @@ enum {
>>>> TI_CLKM_PRM,
>>>> TI_CLKM_SCRM,
>>>> TI_CLKM_CTRL,
>>>> + TI_CLKM_CTRL_AUX,
>>>> TI_CLKM_PLLSS,
>>>> CLK_MAX_MEMMAPS
>>>> };
>>>
>>
>
> finally I found some time to apply your patches. Sorry for the long time.
>
> Unfortunately, it does not work. Neither on omap5evm nor on our omap5 hardware.
> I get no sound on the twl6040 - just white noise (which can be controlled in level through
> amixer so it is created on the digital input side of the twl6040).
>
> So I think your patch is missing a detail compared to my simple solution.
Did you implement anything on the audio driver side? The audio driver
must enable the clock implemented by this patch.
-Tero
>
> BR,
> Nikolaus
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
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| From | Peter Ujfalusi <peter.ujfalusi@ti.com> |
|---|---|
| Date | 2016-05-09 14:20 +0200 |
| Message-ID | <rwSki-5t9-5@gated-at.bofh.it> |
| In reply to | #1396976 |
On 05/09/16 14:52, Tero Kristo wrote:
> On 09/05/16 14:18, H. Nikolaus Schaller wrote:
>> Hi,
>>
>>> Am 28.04.2016 um 15:23 schrieb Tero Kristo <t-kristo@ti.com>:
>>>
>>> On 28/04/16 12:12, H. Nikolaus Schaller wrote:
>>>> Hi Tero,
>>>>
>>>>> Am 28.04.2016 um 10:03 schrieb Tero Kristo <t-kristo@ti.com>:
>>>>>
>>>>> On 27/04/16 17:35, H. Nikolaus Schaller wrote:
>>>>>> HI,
>>>>>>
>>>>>>> Am 27.04.2016 um 16:23 schrieb Peter Ujfalusi <peter.ujfalusi@ti.com>:
>>>>>>>
>>>>>>> On 04/27/2016 05:10 PM, Tero Kristo wrote:
>>>>>>>> On 27/04/16 16:10, H. Nikolaus Schaller wrote:
>>>>>>>>>
>>>>>>>>>> Am 27.04.2016 um 14:31 schrieb Tero Kristo <t-kristo@ti.com>:
>>>>>>>>>>
>>>>>>>>>> On 27/04/16 09:04, H. Nikolaus Schaller wrote:
>>>>>>>>>>>
>>>>>>>>>>>> Am 26.04.2016 um 19:27 schrieb Tony Lindgren <tony@atomide.com>:
>>>>>>>>>>>>
>>>>>>>>>>>> Tero,
>>>>>>>>>>>>
>>>>>>>>>>>> * H. Nikolaus Schaller <hns@goldelico.com> [160418 11:23]:
>>>>>>>>>>>>> OMAP5 has a register to control if the ckobuffer is enabled
>>>>>>>>>>>>> and defines the polarity. ckobuffer is required to drive a twl6040
>>>>>>>>>>>>> with the system clock. Hence, add the pinctrl,single to the
>>>>>>>>>>>>> OMAP5 SoC description so that omap5-board-common can
>>>>>>>>>>>>> set up the ckobuffer as required.
>>>>>>>>>>>>
>>>>>>>>>>>> Is this really a mux or should it be a mux clock?
>>>>>>>>>>>
>>>>>>>>>>> It is a pinmux setting for the clock out buffer to choose what signal
>>>>>>>>>>> (and polarity) is presented on the fref_xtal_clk pad.
>>>>>>>>>>>
>>>>>>>>>>> The register is part of the CTRL_MODULE_WKUP.
>>>>>>>>>>> The clock signal is the xtal master clock of the whole SoC.
>>>>>>>>>>>
>>>>>>>>>>> Although there is a bit to choose an alternate clock, there is no
>>>>>>>>>>> alternate in the OMAP5 silicon.
>>>>>>>>>>>
>>>>>>>>>>> Therefore I would say it is about padconf and not clock or clock mux
>>>>>>>>>>> related.
>>>>>>>>>>>
>>>>>>>>>>> It just happens to be a clock signal which can be routed to this
>>>>>>>>>>> pad.
>>>>>>>>>>
>>>>>>>>>> The two could very well be implemented as clock nodes, a mux and a
>>>>>>>>>> gate.
>>>>>>>>>> This would describe the hardware functionality better imo, if the
>>>>>>>>>> assumptions made here are correct. Implementing the control as pinctrl
>>>>>>>>>> hacks looks rather weird to me.
>>>>>>>>>
>>>>>>>>> Why do you consider it a "pinctrl hack"? IMHO it is not a hack, but 100%
>>>>>>>>> proper use of pinctrl.
>>>>>>>>
>>>>>>>> It is just the level of abstraction we are talking about here. If it is a
>>>>>>>> clock we are controlling, we should rather control it as a clock
>>>>>>>> (higher level
>>>>>>>> abstraction), not a pin.
>>>>>>>
>>>>>>> I second this. I think it is better to have a simple gate clock and handle
>>>>>>> only CONTROL_CKOBUFFER:CKOBUFFER_CLK_EN (bit 28) only as the other bits
>>>>>>> does
>>>>>>> not have real use.
>>>>>>>
>>>>>>> Then we can add clk API support for this. On most OMAP4 devices the
>>>>>>> clock is
>>>>>>> always on,
>>>>>>
>>>>>> this is why I am raising the question if we really want to control it on
>>>>>> the omap5 or just
>>>>>> turn it on for all omap5 boards like the omap4 appears to do... I.e. if
>>>>>> turning the pin on
>>>>>> as a pinctrl is IMHO sufficient for all practical purposes.
>>>>>>
>>>>>>> so the board DTS file need to provide a dummy clock, or we can make
>>>>>>> the high precision clock also as optional (on panda both OMAP4 and twl6040
>>>>>>> uses the same reference clock).
>>>>>>
>>>>>> Hm. It looks as if implementing this (and clock gating) is beyond my
>>>>>> experiences.
>>>>>> But I am happy to test a proposal on our omap5 board.
>>>>>>
>>>>>> BR and thanks,
>>>>>> Nikolaus
>>>>>
>>>>> See the inline patch, this implements the fref_xtal_ck. I had to add some
>>>>> kernel code also to cope with the new SCM area, but the same area can now
>>>>> be accessed via syscon also if needed.
>>>>
>>>> Looks interesting, although quite complex to enable a single SoC pad at
>>>> boot time...
>>>
>>> Yea it gives plenty of other things for you also. syscon, integration with
>>> clock framework, etc.
>>>
>>>>
>>>> Will asap study how it works and test. And of course report results.
>>>
>>> Thanks, Tero.
>>>
>>>>
>>>> Thanks and BR,
>>>> Nikolaus
>>>>
>>>>>
>>>>> From: Tero Kristo <t-kristo@ti.com>
>>>>> Date: Thu, 28 Apr 2016 11:00:57 +0300
>>>>> Subject: [PATCH] ARM: omap5: add support for fref_xtal_ck
>>>>>
>>>>> Signed-off-by: Tero Kristo <t-kristo@ti.com>
>>>>> ---
>>>>> arch/arm/boot/dts/omap5.dtsi | 22 ++++++++++++++++++++++
>>>>> arch/arm/boot/dts/omap54xx-clocks.dtsi | 10 ++++++++++
>>>>> arch/arm/mach-omap2/control.c | 20 ++++++++++++++++----
>>>>> include/linux/clk/ti.h | 1 +
>>>>> 4 files changed, 49 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
>>>>> index 38805eb..bdc6528 100644
>>>>> --- a/arch/arm/boot/dts/omap5.dtsi
>>>>> +++ b/arch/arm/boot/dts/omap5.dtsi
>>>>> @@ -277,6 +277,28 @@
>>>>> pinctrl-single,register-width = <16>;
>>>>> pinctrl-single,function-mask = <0x7fff>;
>>>>> };
>>>>> +
>>>>> + omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@cda0 {
>>>>> + compatible = "ti,omap5-scm-wkup-pad-conf",
>>>>> + "simple-bus";
>>>>> + reg = <0xcda0 0x60>;
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <1>;
>>>>> + ranges = <0 0xcda0 0x60>;
>>>>> +
>>>>> + scm_wkup_pad_conf: scm_conf@0 {
>>>>> + compatible = "syscon", "simple-bus";
>>>>> + reg = <0x0 0x60>;
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <1>;
>>>>> + ranges = <0 0x0 0x60>;
>>>>> +
>>>>> + scm_wkup_pad_conf_clocks: clocks@0 {
>>>>> + #address-cells = <1>;
>>>>> + #size-cells = <0>;
>>>>> + };
>>>>> + };
>>>>> + };
>>>>> };
>>>>>
>>>>> ocmcram: ocmcram@40300000 {
>>>>> diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>>>> b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>>>> index 83b425f..f970dac 100644
>>>>> --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>>>> +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
>>>>> @@ -1388,3 +1388,13 @@
>>>>> reg = <0x021c>;
>>>>> };
>>>>> };
>>>>> +
>>>>> +&scm_wkup_pad_conf_clocks {
>>>>> + fref_xtal_ck: fref_xtal_ck {
>>>>> + #clocks-cells = <0>;
>>>>> + compatible = "ti,gate-clock";
>>>>> + clocks = <&sys_clkin>;
>>>>> + ti,bit-shift = <28>;
>>>>> + reg = <0x14>;
>>>>> + };
>>>>> +};
>>>>> diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
>>>>> index 1662071..5956641 100644
>>>>> --- a/arch/arm/mach-omap2/control.c
>>>>> +++ b/arch/arm/mach-omap2/control.c
>>>>> @@ -623,6 +623,7 @@ void __init omap3_ctrl_init(void)
>>>>>
>>>>> struct control_init_data {
>>>>> int index;
>>>>> + void __iomem *mem;
>>>>> s16 offset;
>>>>> };
>>>>>
>>>>> @@ -635,6 +636,10 @@ static const struct control_init_data
>>>>> omap2_ctrl_data = {
>>>>> .offset = -OMAP2_CONTROL_GENERAL,
>>>>> };
>>>>>
>>>>> +static const struct control_init_data ctrl_aux_data = {
>>>>> + .index = TI_CLKM_CTRL_AUX,
>>>>> +};
>>>>> +
>>>>> static const struct of_device_id omap_scrm_dt_match_table[] = {
>>>>> { .compatible = "ti,am3-scm", .data = &ctrl_data },
>>>>> { .compatible = "ti,am4-scm", .data = &ctrl_data },
>>>>> @@ -644,6 +649,7 @@ static const struct of_device_id
>>>>> omap_scrm_dt_match_table[] = {
>>>>> { .compatible = "ti,dm816-scrm", .data = &ctrl_data },
>>>>> { .compatible = "ti,omap4-scm-core", .data = &ctrl_data },
>>>>> { .compatible = "ti,omap5-scm-core", .data = &ctrl_data },
>>>>> + { .compatible = "ti,omap5-scm-wkup-pad-conf", .data = &ctrl_aux_data },
>>>>> { .compatible = "ti,dra7-scm-core", .data = &ctrl_data },
>>>>> { }
>>>>> };
>>>>> @@ -660,15 +666,21 @@ int __init omap2_control_base_init(void)
>>>>> struct device_node *np;
>>>>> const struct of_device_id *match;
>>>>> struct control_init_data *data;
>>>>> + void __iomem *mem;
>>>>>
>>>>> for_each_matching_node_and_match(np, omap_scrm_dt_match_table, &match) {
>>>>> data = (struct control_init_data *)match->data;
>>>>>
>>>>> - omap2_ctrl_base = of_iomap(np, 0);
>>>>> - if (!omap2_ctrl_base)
>>>>> + mem = of_iomap(np, 0);
>>>>> + if (!mem)
>>>>> return -ENOMEM;
>>>>>
>>>>> - omap2_ctrl_offset = data->offset;
>>>>> + if (data->index == TI_CLKM_CTRL) {
>>>>> + omap2_ctrl_base = mem;
>>>>> + omap2_ctrl_offset = data->offset;
>>>>> + }
>>>>> +
>>>>> + data->mem = mem;
>>>>> }
>>>>>
>>>>> return 0;
>>>>> @@ -713,7 +725,7 @@ int __init omap_control_init(void)
>>>>> } else {
>>>>> /* No scm_conf found, direct access */
>>>>> ret = omap2_clk_provider_init(np, data->index, NULL,
>>>>> - omap2_ctrl_base);
>>>>> + data->mem);
>>>>> if (ret)
>>>>> return ret;
>>>>> }
>>>>> diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
>>>>> index dc5164a..be25aa8 100644
>>>>> --- a/include/linux/clk/ti.h
>>>>> +++ b/include/linux/clk/ti.h
>>>>> @@ -195,6 +195,7 @@ enum {
>>>>> TI_CLKM_PRM,
>>>>> TI_CLKM_SCRM,
>>>>> TI_CLKM_CTRL,
>>>>> + TI_CLKM_CTRL_AUX,
>>>>> TI_CLKM_PLLSS,
>>>>> CLK_MAX_MEMMAPS
>>>>> };
>>>>
>>>
>>
>> finally I found some time to apply your patches. Sorry for the long time.
>>
>> Unfortunately, it does not work. Neither on omap5evm nor on our omap5 hardware.
>> I get no sound on the twl6040 - just white noise (which can be controlled in
>> level through
>> amixer so it is created on the digital input side of the twl6040).
>>
>> So I think your patch is missing a detail compared to my simple solution.
>
> Did you implement anything on the audio driver side? The audio driver must
> enable the clock implemented by this patch.
I did, can test it in 10 minutes or so...
>
> -Tero
>
>>
>> BR,
>> Nikolaus
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
>
--
Péter
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| From | Peter Ujfalusi <peter.ujfalusi@ti.com> |
|---|---|
| Date | 2016-05-09 14:40 +0200 |
| Subject | Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer |
| Message-ID | <rwSDE-5Gt-11@gated-at.bofh.it> |
| In reply to | #1396998 |
[Multipart message — attachments visible in raw view] — view raw
On 05/09/16 15:10, Peter Ujfalusi wrote: >>> finally I found some time to apply your patches. Sorry for the long time. >>> >>> Unfortunately, it does not work. Neither on omap5evm nor on our omap5 hardware. >>> I get no sound on the twl6040 - just white noise (which can be controlled in >>> level through >>> amixer so it is created on the digital input side of the twl6040). >>> >>> So I think your patch is missing a detail compared to my simple solution. >> >> Did you implement anything on the audio driver side? The audio driver must >> enable the clock implemented by this patch. > > I did, can test it in 10 minutes or so... might work, but linux-next is not booting on omap5-uevm :o I don't know why... In any case I have attached the 3 patches I have for this, including Tero's ported to linux-next. Patch 3 might need to be done per board probably, but this should be good for testing. -- Péter
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| From | Peter Ujfalusi <peter.ujfalusi@ti.com> |
|---|---|
| Date | 2016-05-09 14:50 +0200 |
| Subject | Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer |
| Message-ID | <rwSNk-5L9-15@gated-at.bofh.it> |
| In reply to | #1397014 |
On 05/09/16 15:32, Peter Ujfalusi wrote: > On 05/09/16 15:10, Peter Ujfalusi wrote: > >>>> finally I found some time to apply your patches. Sorry for the long time. >>>> >>>> Unfortunately, it does not work. Neither on omap5evm nor on our omap5 hardware. >>>> I get no sound on the twl6040 - just white noise (which can be controlled in >>>> level through >>>> amixer so it is created on the digital input side of the twl6040). >>>> >>>> So I think your patch is missing a detail compared to my simple solution. >>> >>> Did you implement anything on the audio driver side? The audio driver must >>> enable the clock implemented by this patch. >> >> I did, can test it in 10 minutes or so... > > might work, but linux-next is not booting on omap5-uevm :o I don't know why... Applying Tero's alone makes the board not to boot, so something there... I can not see anything even with low-level debugging enabled :( I can not debug it further today, will look at this tomorrow. > In any case I have attached the 3 patches I have for this, including Tero's > ported to linux-next. > > Patch 3 might need to be done per board probably, but this should be good for > testing. > > > > _______________________________________________ > Kernel mailing list > Kernel@pyra-handheld.com > http://pyra-handheld.com/cgi-bin/mailman/listinfo/kernel > -- Péter
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| From | Peter Ujfalusi <peter.ujfalusi@ti.com> |
|---|---|
| Date | 2016-05-09 16:00 +0200 |
| Subject | Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer |
| Message-ID | <rwTT4-6II-5@gated-at.bofh.it> |
| In reply to | #1397018 |
On 05/09/16 15:46, Peter Ujfalusi wrote: > On 05/09/16 15:32, Peter Ujfalusi wrote: >> On 05/09/16 15:10, Peter Ujfalusi wrote: >> >>>>> finally I found some time to apply your patches. Sorry for the long time. >>>>> >>>>> Unfortunately, it does not work. Neither on omap5evm nor on our omap5 hardware. >>>>> I get no sound on the twl6040 - just white noise (which can be controlled in >>>>> level through >>>>> amixer so it is created on the digital input side of the twl6040). >>>>> >>>>> So I think your patch is missing a detail compared to my simple solution. >>>> >>>> Did you implement anything on the audio driver side? The audio driver must >>>> enable the clock implemented by this patch. >>> >>> I did, can test it in 10 minutes or so... >> >> might work, but linux-next is not booting on omap5-uevm :o I don't know why... > > Applying Tero's alone makes the board not to boot, so something there... I can > not see anything even with low-level debugging enabled :( I can not debug it > further today, will look at this tomorrow. The crash is in arch/arm/mach-omap2/control.c:omap_control_init() the syscon_node_to_regmap() returns with error for the new omap5_scm_wkup_pad_conf node. The other syscon was OK, but becasue of the return PTR_ERR(syscon) the board will not boot... Tero: any idea? >> In any case I have attached the 3 patches I have for this, including Tero's >> ported to linux-next. >> >> Patch 3 might need to be done per board probably, but this should be good for >> testing. >> >> >> >> _______________________________________________ >> Kernel mailing list >> Kernel@pyra-handheld.com >> http://pyra-handheld.com/cgi-bin/mailman/listinfo/kernel >> > > -- Péter
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| From | Tero Kristo <t-kristo@ti.com> |
|---|---|
| Date | 2016-05-09 16:10 +0200 |
| Subject | Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer |
| Message-ID | <rwU2K-7bS-11@gated-at.bofh.it> |
| In reply to | #1397073 |
On 09/05/16 16:52, Peter Ujfalusi wrote: > On 05/09/16 15:46, Peter Ujfalusi wrote: >> On 05/09/16 15:32, Peter Ujfalusi wrote: >>> On 05/09/16 15:10, Peter Ujfalusi wrote: >>> >>>>>> finally I found some time to apply your patches. Sorry for the long time. >>>>>> >>>>>> Unfortunately, it does not work. Neither on omap5evm nor on our omap5 hardware. >>>>>> I get no sound on the twl6040 - just white noise (which can be controlled in >>>>>> level through >>>>>> amixer so it is created on the digital input side of the twl6040). >>>>>> >>>>>> So I think your patch is missing a detail compared to my simple solution. >>>>> >>>>> Did you implement anything on the audio driver side? The audio driver must >>>>> enable the clock implemented by this patch. >>>> >>>> I did, can test it in 10 minutes or so... >>> >>> might work, but linux-next is not booting on omap5-uevm :o I don't know why... >> >> Applying Tero's alone makes the board not to boot, so something there... I can >> not see anything even with low-level debugging enabled :( I can not debug it >> further today, will look at this tomorrow. > > The crash is in arch/arm/mach-omap2/control.c:omap_control_init() > > the syscon_node_to_regmap() returns with error for the new > omap5_scm_wkup_pad_conf node. The other syscon was OK, but becasue of the > return PTR_ERR(syscon) the board will not boot... > > Tero: any idea? I can check this tomorrow at my end. -Tero > >>> In any case I have attached the 3 patches I have for this, including Tero's >>> ported to linux-next. >>> >>> Patch 3 might need to be done per board probably, but this should be good for >>> testing. >>> >>> >>> >>> _______________________________________________ >>> Kernel mailing list >>> Kernel@pyra-handheld.com >>> http://pyra-handheld.com/cgi-bin/mailman/listinfo/kernel >>> >> >> > >
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| From | Peter Ujfalusi <peter.ujfalusi@ti.com> |
|---|---|
| Date | 2016-05-09 17:40 +0200 |
| Subject | Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer |
| Message-ID | <rwVrQ-8rX-7@gated-at.bofh.it> |
| In reply to | #1397079 |
On 05/09/2016 05:09 PM, Tero Kristo wrote: >>> Applying Tero's alone makes the board not to boot, so something there... I can >>> not see anything even with low-level debugging enabled :( I can not debug it >>> further today, will look at this tomorrow. >> >> The crash is in arch/arm/mach-omap2/control.c:omap_control_init() >> >> the syscon_node_to_regmap() returns with error for the new >> omap5_scm_wkup_pad_conf node. The other syscon was OK, but becasue of the >> return PTR_ERR(syscon) the board will not boot... >> >> Tero: any idea? > > I can check this tomorrow at my end. Aargh, I think I know why, I have placed the omap5_scm_wkup_pad_conf node to a wrong place. The inline patch did not applied so I did it by hand... I can boot test it tomorrow. > > -Tero > >> >>>> In any case I have attached the 3 patches I have for this, including Tero's >>>> ported to linux-next. >>>> >>>> Patch 3 might need to be done per board probably, but this should be good for >>>> testing. >>>> >>>> >>>> >>>> _______________________________________________ >>>> Kernel mailing list >>>> Kernel@pyra-handheld.com >>>> http://pyra-handheld.com/cgi-bin/mailman/listinfo/kernel >>>> >>> >>> >> >> > -- Péter
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| From | Peter Ujfalusi <peter.ujfalusi@ti.com> |
|---|---|
| Date | 2016-05-09 21:50 +0200 |
| Subject | Re: [Kernel] [PATCH v2 4/5] ARM: dts: omap5: describe control for ckobuffer |
| Message-ID | <rwZlM-3xy-29@gated-at.bofh.it> |
| In reply to | #1397014 |
On 05/09/2016 03:32 PM, Peter Ujfalusi wrote: > On 05/09/16 15:10, Peter Ujfalusi wrote: > >>>> finally I found some time to apply your patches. Sorry for the long time. >>>> >>>> Unfortunately, it does not work. Neither on omap5evm nor on our omap5 hardware. >>>> I get no sound on the twl6040 - just white noise (which can be controlled in >>>> level through >>>> amixer so it is created on the digital input side of the twl6040). >>>> >>>> So I think your patch is missing a detail compared to my simple solution. >>> >>> Did you implement anything on the audio driver side? The audio driver must >>> enable the clock implemented by this patch. >> >> I did, can test it in 10 minutes or so... > > might work, but linux-next is not booting on omap5-uevm :o I don't know why... > > In any case I have attached the 3 patches I have for this, including Tero's > ported to linux-next. > > Patch 3 might need to be done per board probably, but this should be good for > testing. Please ignore these patches, I got HPPLL mode working, I need to clean the patches up first and I will send it for testing tomorrow. -- Péter
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