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[PATCH locking 0/4] locktorture and memory-barriers.txt updates

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  [PATCH locking 0/4] locktorture and memory-barriers.txt updates "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2016-04-26 19:30 +0200
    [PATCH locking 3/4] documentation: ACQUIRE applies to loads, RELEASE applies to stores "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> - 2016-04-26 19:30 +0200
      [tip:locking/core] locking/Documentation: Clarify that ACQUIRE  applies to loads, RELEASE applies to stores tip-bot for Will Deacon <tipbot@zytor.com> - 2016-04-28 12:30 +0200

#1387750 — [PATCH locking 0/4] locktorture and memory-barriers.txt updates

Hello!

This series contains a few memory-barriers.txt updates and a locktorture
cleanup:

1.	Add a disclaimer to memory-barrier.txt, courtesy of
	Peter Zijlstra.

2.	Explicitly state the purpose of memory-barrier.txt, courtesy
	of David Howells.

3.	Explicitly state that ACQUIRE applies to loads and that
	RELEASE applies to stores, courtesy of Will Deacon.

4.	Simplify torture_runnable computation in locktorture, replacing
	a multiline #ifdef with an IS_ENABLED() that fits into an
	existing line.

							Thanx, Paul

------------------------------------------------------------------------

 Documentation/memory-barriers.txt |   39 +++++++++++++++++++++++++++++++++++++-
 kernel/locking/locktorture.c      |    7 ------
 2 files changed, 39 insertions(+), 7 deletions(-)

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#1387756 — [PATCH locking 3/4] documentation: ACQUIRE applies to loads, RELEASE applies to stores

From: Will Deacon <will.deacon@arm.com>

For compound atomics performing both a load and a store operation, make
it clear that _acquire and _release variants refer only to the load and
store portions of compound atomic. For example, xchg_acquire is an xchg
operation where the load takes on ACQUIRE semantics.

Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
---
 Documentation/memory-barriers.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 8b11e54238bf..147ae8ec836f 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -498,6 +498,11 @@ And a couple of implicit varieties:
      This means that ACQUIRE acts as a minimal "acquire" operation and
      RELEASE acts as a minimal "release" operation.
 
+A subset of the atomic operations described in atomic_ops.txt have ACQUIRE
+and RELEASE variants in addition to fully-ordered and relaxed (no barrier
+semantics) definitions.  For compound atomics performing both a load and a
+store, ACQUIRE semantics apply only to the load and RELEASE semantics apply
+only to the store portion of the operation.
 
 Memory barriers are only required where there's a possibility of interaction
 between two CPUs or between a CPU and a device.  If it can be guaranteed that
-- 
2.5.2

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#1389980 — [tip:locking/core] locking/Documentation: Clarify that ACQUIRE applies to loads, RELEASE applies to stores

Commit-ID:  3cfe2e8bc1cf74d78df6fe5ca3a1e1805472a004
Gitweb:     http://git.kernel.org/tip/3cfe2e8bc1cf74d78df6fe5ca3a1e1805472a004
Author:     Will Deacon <will.deacon@arm.com>
AuthorDate: Tue, 26 Apr 2016 10:22:07 -0700
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Thu, 28 Apr 2016 10:57:51 +0200

locking/Documentation: Clarify that ACQUIRE applies to loads, RELEASE applies to stores

For compound atomics performing both a load and a store operation, make
it clear that _acquire and _release variants refer only to the load and
store portions of compound atomic. For example, xchg_acquire is an xchg
operation where the load takes on ACQUIRE semantics.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: corbet@lwn.net
Cc: dave@stgolabs.net
Cc: dhowells@redhat.com
Cc: linux-doc@vger.kernel.org
Link: http://lkml.kernel.org/r/1461691328-5429-3-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 Documentation/memory-barriers.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt
index 8b11e54..147ae8e 100644
--- a/Documentation/memory-barriers.txt
+++ b/Documentation/memory-barriers.txt
@@ -498,6 +498,11 @@ And a couple of implicit varieties:
      This means that ACQUIRE acts as a minimal "acquire" operation and
      RELEASE acts as a minimal "release" operation.
 
+A subset of the atomic operations described in atomic_ops.txt have ACQUIRE
+and RELEASE variants in addition to fully-ordered and relaxed (no barrier
+semantics) definitions.  For compound atomics performing both a load and a
+store, ACQUIRE semantics apply only to the load and RELEASE semantics apply
+only to the store portion of the operation.
 
 Memory barriers are only required where there's a possibility of interaction
 between two CPUs or between a CPU and a device.  If it can be guaranteed that

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