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Re: [PATCH] dmaengine: pxa: handle bus errors

Started byVinod Koul <vinod.koul@intel.com>
First post2016-04-26 05:30 +0200
Last post2016-04-26 08:20 +0200
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  Re: [PATCH] dmaengine: pxa: handle bus errors Vinod Koul <vinod.koul@intel.com> - 2016-04-26 05:30 +0200
    Re: [PATCH] dmaengine: pxa: handle bus errors Robert Jarzmik <robert.jarzmik@free.fr> - 2016-04-26 08:20 +0200

#1387115 — Re: [PATCH] dmaengine: pxa: handle bus errors

FromVinod Koul <vinod.koul@intel.com>
Date2016-04-26 05:30 +0200
SubjectRe: [PATCH] dmaengine: pxa: handle bus errors
Message-ID<rs1Rf-vo-5@gated-at.bofh.it>
On Mon, Mar 28, 2016 at 11:32:24PM +0200, Robert Jarzmik wrote:
> In the current state, upon bus error the driver will spin endlessly,
> relaunching the last tx, which will fail again and again :
>  - a bus error happens
>  - pxad_chan_handler() is called
>  - as PXA_DCSR_STOPSTATE is true, the last non-terminated transaction is
>    lauched, which is the one triggering the bus error, as it didn't
>    terminate
>  - moreover, the STOP interrupt fires a new, as the STOPIRQEN is still
>    active
> 
> Break this logic by stopping the automatic relaunch of a dma channel
> upon a bus error, even if there are still pending issued requests on it.
> 
> As dma_cookie_status() seems unable to return DMA_ERROR in its current
> form, ie. there seems no way to mark a DMA_ERROR on a per-async-tx
> basis, it is chosen in this patch to remember on the channel which
> transaction failed, and report it in pxad_tx_status().
> 
> It's a bit misleading because if T1, T2, T3 and T4 were queued, and T1
> was completed while T2 causes a bus error, the status of T3 and T4 will
> be reported as DMA_IN_PROGRESS, while the channel is actually stopped.

Applied, thanks

-- 
~Vinod

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#1387153

FromRobert Jarzmik <robert.jarzmik@free.fr>
Date2016-04-26 08:20 +0200
Message-ID<rs4vL-2Ic-7@gated-at.bofh.it>
In reply to#1387115
Vinod Koul <vinod.koul@intel.com> writes:

> Applied, thanks
Thanks Vinod.

Cheers.

-- 
Robert

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