Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1385954 > unrolled thread
| Started by | Eric Engestrom <eric@engestrom.ch> |
|---|---|
| First post | 2016-04-25 02:30 +0200 |
| Last post | 2016-04-25 16:00 +0200 |
| Articles | 4 — 4 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
[PATCH 09/41] Documentation: dt: clock: fix spelling mistakes Eric Engestrom <eric@engestrom.ch> - 2016-04-25 02:30 +0200
Re: [PATCH 09/41] Documentation: dt: clock: fix spelling mistakes Randy Dunlap <rdunlap@infradead.org> - 2016-04-25 05:10 +0200
Re: [PATCH 09/41] Documentation: dt: clock: fix spelling mistakes Heiko Stübner <heiko@sntech.de> - 2016-04-25 09:40 +0200
Re: [PATCH 09/41] Documentation: dt: clock: fix spelling mistakes Rob Herring <robh+dt@kernel.org> - 2016-04-25 16:00 +0200
| From | Eric Engestrom <eric@engestrom.ch> |
|---|---|
| Date | 2016-04-25 02:30 +0200 |
| Subject | [PATCH 09/41] Documentation: dt: clock: fix spelling mistakes |
| Message-ID | <rrCzw-4Wc-23@gated-at.bofh.it> |
Signed-off-by: Eric Engestrom <eric@engestrom.ch> --- Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt | 2 +- Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt | 2 +- Documentation/devicetree/bindings/clock/st/st,clkgen.txt | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt index 0c2bf5e..7f36853 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt @@ -16,7 +16,7 @@ Required Properties: Optional Properties: - rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changable, due to the missing pll lock status. + If missing pll rates are not changeable, due to the missing pll lock status. Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt index c9fbb76..8cb47c3 100644 --- a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt @@ -15,7 +15,7 @@ Required Properties: Optional Properties: - rockchip,grf: phandle to the syscon managing the "general register files" - If missing pll rates are not changable, due to the missing pll lock status. + If missing pll rates are not changeable, due to the missing pll lock status. Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as diff --git a/Documentation/devicetree/bindings/clock/st/st,clkgen.txt b/Documentation/devicetree/bindings/clock/st/st,clkgen.txt index 78978f1..426bdda 100644 --- a/Documentation/devicetree/bindings/clock/st/st,clkgen.txt +++ b/Documentation/devicetree/bindings/clock/st/st,clkgen.txt @@ -40,7 +40,7 @@ address is common of all subnode. }; This binding uses the common clock binding[1]. -Each subnode should use the binding discribe in [2]..[7] +Each subnode should use the binding describe in [2]..[7] [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/clock/st,clkgen-divmux.txt -- 2.8.0
[toc] | [next] | [standalone]
| From | Randy Dunlap <rdunlap@infradead.org> |
|---|---|
| Date | 2016-04-25 05:10 +0200 |
| Message-ID | <rrF4m-7bR-19@gated-at.bofh.it> |
| In reply to | #1385954 |
On 04/24/16 17:24, Eric Engestrom wrote: > Signed-off-by: Eric Engestrom <eric@engestrom.ch> > --- > Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt | 2 +- > Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt | 2 +- > Documentation/devicetree/bindings/clock/st/st,clkgen.txt | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt > index 0c2bf5e..7f36853 100644 > --- a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt > @@ -16,7 +16,7 @@ Required Properties: > Optional Properties: > > - rockchip,grf: phandle to the syscon managing the "general register files" > - If missing pll rates are not changable, due to the missing pll lock status. > + If missing pll rates are not changeable, due to the missing pll lock status. > > Each clock is assigned an identifier and client nodes can use this identifier > to specify the clock which they consume. All available clocks are defined as > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt > index c9fbb76..8cb47c3 100644 > --- a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt > @@ -15,7 +15,7 @@ Required Properties: > Optional Properties: > > - rockchip,grf: phandle to the syscon managing the "general register files" > - If missing pll rates are not changable, due to the missing pll lock status. > + If missing pll rates are not changeable, due to the missing pll lock status. > > Each clock is assigned an identifier and client nodes can use this identifier > to specify the clock which they consume. All available clocks are defined as > diff --git a/Documentation/devicetree/bindings/clock/st/st,clkgen.txt b/Documentation/devicetree/bindings/clock/st/st,clkgen.txt > index 78978f1..426bdda 100644 > --- a/Documentation/devicetree/bindings/clock/st/st,clkgen.txt > +++ b/Documentation/devicetree/bindings/clock/st/st,clkgen.txt > @@ -40,7 +40,7 @@ address is common of all subnode. > }; > > This binding uses the common clock binding[1]. > -Each subnode should use the binding discribe in [2]..[7] > +Each subnode should use the binding describe in [2]..[7] described ? > > [1] Documentation/devicetree/bindings/clock/clock-bindings.txt > [2] Documentation/devicetree/bindings/clock/st,clkgen-divmux.txt > -- ~Randy
[toc] | [prev] | [next] | [standalone]
| From | Heiko Stübner <heiko@sntech.de> |
|---|---|
| Date | 2016-04-25 09:40 +0200 |
| Message-ID | <rrJhE-1QD-15@gated-at.bofh.it> |
| In reply to | #1385954 |
Am Montag, 25. April 2016, 01:24:06 schrieb Eric Engestrom: > Signed-off-by: Eric Engestrom <eric@engestrom.ch> > --- > Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt | 2 +- > Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt | 2 +- > Documentation/devicetree/bindings/clock/st/st,clkgen.txt | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt > b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt index > 0c2bf5e..7f36853 100644 > --- a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt > @@ -16,7 +16,7 @@ Required Properties: > Optional Properties: > > - rockchip,grf: phandle to the syscon managing the "general register files" > - If missing pll rates are not changable, due to the missing pll lock > status. + If missing pll rates are not changeable, due to the missing pll > lock status. > > Each clock is assigned an identifier and client nodes can use this > identifier to specify the clock which they consume. All available clocks > are defined as diff --git > a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt > b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt index > c9fbb76..8cb47c3 100644 > --- a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt > +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt > @@ -15,7 +15,7 @@ Required Properties: > Optional Properties: > > - rockchip,grf: phandle to the syscon managing the "general register files" > - If missing pll rates are not changable, due to the missing pll lock > status. + If missing pll rates are not changeable, due to the missing pll > lock status. > > Each clock is assigned an identifier and client nodes can use this > identifier to specify the clock which they consume. All available clocks > are defined as For the Rockchip parts Reviewed-by: Heiko Stuebner <heiko@sntech.de>
[toc] | [prev] | [next] | [standalone]
| From | Rob Herring <robh+dt@kernel.org> |
|---|---|
| Date | 2016-04-25 16:00 +0200 |
| Message-ID | <rrPdo-6OH-5@gated-at.bofh.it> |
| In reply to | #1385954 |
On Sun, Apr 24, 2016 at 7:24 PM, Eric Engestrom <eric@engestrom.ch> wrote: > Signed-off-by: Eric Engestrom <eric@engestrom.ch> > --- Applied with Randy's fix. Rob
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web