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[PATCH 4/8] gpio: stmpe: write int status register only when needed

Started by<patrice.chotard@st.com>
First post2016-04-19 14:20 +0200
Last post2016-04-20 16:40 +0200
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  [PATCH 4/8] gpio: stmpe: write int status register only when needed <patrice.chotard@st.com> - 2016-04-19 14:20 +0200
    Re: [PATCH 4/8] gpio: stmpe: write int status register only when needed Linus Walleij <linus.walleij@linaro.org> - 2016-04-20 16:40 +0200

#1382426 — [PATCH 4/8] gpio: stmpe: write int status register only when needed

From<patrice.chotard@st.com>
Date2016-04-19 14:20 +0200
Subject[PATCH 4/8] gpio: stmpe: write int status register only when needed
Message-ID<rpCNk-6J2-9@gated-at.bofh.it>
From: Patrice Chotard <patrice.chotard@st.com>

On STMPE801/1801 datasheets, it's mentionned writing
in interrupt status register has no effect, bits are
cleared when reading.

Signed-off-by: Amelie DELAUNAY <amelie.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 drivers/gpio/gpio-stmpe.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c
index 225e075..f8c9d22 100644
--- a/drivers/gpio/gpio-stmpe.c
+++ b/drivers/gpio/gpio-stmpe.c
@@ -344,12 +344,16 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
 			stat &= ~(1 << bit);
 		}
 
-		stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
-
-		/* Edge detect register is not present on 801 and 1801 */
-		if (stmpe->partnum != STMPE801 || stmpe->partnum != STMPE1801)
+		/*
+		 * interrupt status register write has no effect on
+		 * 801 and 1801, bits are cleared when read.
+		 * Edge detect register is not present on 801 and 1801
+		 */
+		if (stmpe->partnum != STMPE801 || stmpe->partnum != STMPE1801) {
+			stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
 			stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_GPEDR_MSB]
 					+ i, status[i]);
+		}
 	}
 
 	return IRQ_HANDLED;
-- 
1.9.1

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#1383454

FromLinus Walleij <linus.walleij@linaro.org>
Date2016-04-20 16:40 +0200
Message-ID<rq1sn-VS-39@gated-at.bofh.it>
In reply to#1382426
On Tue, Apr 19, 2016 at 2:18 PM,  <patrice.chotard@st.com> wrote:

> From: Patrice Chotard <patrice.chotard@st.com>
>
> On STMPE801/1801 datasheets, it's mentionned writing
> in interrupt status register has no effect, bits are
> cleared when reading.
>
> Signed-off-by: Amelie DELAUNAY <amelie.delaunay@st.com>
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

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