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[PATCH 0/3] hisi_sas: device id/IPTT collision workaround

Started byJohn Garry <john.garry@huawei.com>
First post2016-04-15 15:30 +0200
Last post2016-04-15 23:00 +0200
Articles 2 — 2 participants

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  [PATCH 0/3] hisi_sas: device id/IPTT collision workaround John Garry <john.garry@huawei.com> - 2016-04-15 15:30 +0200
    Re: [PATCH 0/3] hisi_sas: device id/IPTT collision workaround "Martin K. Petersen" <martin.petersen@oracle.com> - 2016-04-15 23:00 +0200

#1379818 — [PATCH 0/3] hisi_sas: device id/IPTT collision workaround

FromJohn Garry <john.garry@huawei.com>
Date2016-04-15 15:30 +0200
Subject[PATCH 0/3] hisi_sas: device id/IPTT collision workaround
Message-ID<robYS-3E4-17@gated-at.bofh.it>
This patchset introduces a workaround to a hw quirk
in the HiSilicon SAS controller v2 hw.

The quirk is as follows:
When a SATA and SAS frame arrives at the host at
the same time the frames may be swapped under this
condition:
SATA device id bit [10:0] == SAS frame IPTT bit [10:0]
The workaround is to ensure these 2 values never
match. The workaround algorithm is as follows:
- SATA device id bit0 always 0
- SATA IPTT has no restriction
- SAS IPTT bit0 always 1
- SAS device id has no restriction

The major restriction of this workaround is the
SAS IPTT range is halved, but this should be ok
as testing has shown that even using half the IPTT
range does not affect performance.

John Garry (3):
  hisi_sas: add device and slot alloc hw methods
  hisi_sas: add slot_index_alloc_quirk_v2_hw()
  hisi_sas: add alloc_dev_quirk_v2_hw()

 drivers/scsi/hisi_sas/hisi_sas.h       |  3 ++
 drivers/scsi/hisi_sas/hisi_sas_main.c  | 11 +++++--
 drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 58 ++++++++++++++++++++++++++++++++++
 3 files changed, 70 insertions(+), 2 deletions(-)

-- 
1.9.1

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#1380251

From"Martin K. Petersen" <martin.petersen@oracle.com>
Date2016-04-15 23:00 +0200
Message-ID<roj0l-Bj-3@gated-at.bofh.it>
In reply to#1379818
>>>>> "John" == John Garry <john.garry@huawei.com> writes:

John> This patchset introduces a workaround to a hw quirk in the
John> HiSilicon SAS controller v2 hw.

John> The quirk is as follows: When a SATA and SAS frame arrives at the
John> host at the same time the frames may be swapped under this
John> condition: SATA device id bit [10:0] == SAS frame IPTT bit [10:0]
John> The workaround is to ensure these 2 values never match. The
John> workaround algorithm is as follows: - SATA device id bit0 always 0
John> - SATA IPTT has no restriction - SAS IPTT bit0 always 1 - SAS
John> device id has no restriction

John> The major restriction of this workaround is the SAS IPTT range is
John> halved, but this should be ok as testing has shown that even using
John> half the IPTT range does not affect performance.

Applied to 4.7/scsi-queue.

Thanks!

-- 
Martin K. Petersen	Oracle Linux Engineering

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