Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1380585 > unrolled thread

[PATCH 1/2] clk: sunxi: add predivider handling for factors clock

Started byVishnu Patekar <vishnupatekar0510@gmail.com>
First post2016-04-16 21:00 +0200
Last post2016-04-19 17:50 +0200
Articles 5 — 4 participants

Back to article view | Back to linux.kernel

This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by below is the oldest one visible, not the original post.

Contents

  [PATCH 1/2] clk: sunxi: add predivider handling for factors clock Vishnu Patekar <vishnupatekar0510@gmail.com> - 2016-04-16 21:00 +0200
    Re: [PATCH 1/2] clk: sunxi: add predivider handling for factors clock kbuild test robot <lkp@intel.com> - 2016-04-17 03:30 +0200
      Re: [PATCH 1/2] clk: sunxi: add predivider handling for factors clock Philip Li <philip.li@intel.com> - 2016-04-19 12:20 +0200
        Re: [PATCH 1/2] clk: sunxi: add predivider handling for factors clock Chen-Yu Tsai <wens@csie.org> - 2016-04-19 16:20 +0200
          Re: [PATCH 1/2] clk: sunxi: add predivider handling for factors clock Vishnu Patekar <vishnupatekar0510@gmail.com> - 2016-04-19 17:50 +0200

#1380585 — [PATCH 1/2] clk: sunxi: add predivider handling for factors clock

FromVishnu Patekar <vishnupatekar0510@gmail.com>
Date2016-04-16 21:00 +0200
Subject[PATCH 1/2] clk: sunxi: add predivider handling for factors clock
Message-ID<roDBM-87t-1@gated-at.bofh.it>
For A31 ahb1 and a83t ahb1 clocks have predivider for certain parent.
To handle this, this patch adds predivider table with parent index,
prediv shift and width, parents with predivider will have nonzero width.

Rate adjustment is moved from clock specific recalc function to generic
factors recalc.

Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
---
 drivers/clk/sunxi/clk-factors.c | 31 +++++++++++++++----------------
 drivers/clk/sunxi/clk-factors.h | 10 +++++++++-
 2 files changed, 24 insertions(+), 17 deletions(-)

diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index ddefe96..8f3b637 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -45,10 +45,12 @@ static unsigned long clk_factors_recalc_rate(struct clk_hw *hw,
 					     unsigned long parent_rate)
 {
 	u8 n = 1, k = 0, p = 0, m = 0;
+	u8 par_index = 0;
 	u32 reg;
 	unsigned long rate;
 	struct clk_factors *factors = to_clk_factors(hw);
 	const struct clk_factors_config *config = factors->config;
+	const struct clk_factors_prediv *prediv = factors->prediv_config;
 
 	/* Fetch the register value */
 	reg = readl(factors->reg);
@@ -63,24 +65,16 @@ static unsigned long clk_factors_recalc_rate(struct clk_hw *hw,
 	if (config->pwidth != SUNXI_FACTORS_NOT_APPLICABLE)
 		p = FACTOR_GET(config->pshift, config->pwidth, reg);
 
-	if (factors->recalc) {
-		struct factors_request factors_req = {
-			.parent_rate = parent_rate,
-			.n = n,
-			.k = k,
-			.m = m,
-			.p = p,
-		};
-
+	if (prediv) {
 		/* get mux details from mux clk structure */
 		if (factors->mux)
-			factors_req.parent_index =
-				(reg >> factors->mux->shift) &
-				factors->mux->mask;
-
-		factors->recalc(&factors_req);
+			par_index = (reg >> factors->mux->shift) &
+					factors->mux->mask;
 
-		return factors_req.rate;
+		if (prediv[par_index].width != SUNXI_FACTORS_NOT_APPLICABLE) {
+			m = FACTOR_GET(prediv[par_index].shift,
+				prediv[par_index].width, reg);
+		}
 	}
 
 	/* Calculate the rate */
@@ -102,8 +96,12 @@ static int clk_factors_determine_rate(struct clk_hw *hw,
 	for (i = 0; i < num_parents; i++) {
 		struct factors_request factors_req = {
 			.rate = req->rate,
-			.parent_index = i,
 		};
+
+		if (factors->prediv_config)
+			factors_req.prediv_width =
+						factors->prediv_config[i].width;
+
 		parent = clk_hw_get_parent_by_index(hw, i);
 		if (!parent)
 			continue;
@@ -211,6 +209,7 @@ struct clk *sunxi_factors_register(struct device_node *node,
 	/* set up factors properties */
 	factors->reg = reg;
 	factors->config = data->table;
+	factors->prediv_config = data->prediv_table;
 	factors->get_factors = data->getter;
 	factors->recalc = data->recalc;
 	factors->lock = lock;
diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
index 1e63c5b..b1b7745 100644
--- a/drivers/clk/sunxi/clk-factors.h
+++ b/drivers/clk/sunxi/clk-factors.h
@@ -18,10 +18,16 @@ struct clk_factors_config {
 	u8 n_start;
 };
 
+struct clk_factors_prediv {
+	u8 parent_index;
+	u8 shift;
+	u8 width;
+};
+
 struct factors_request {
 	unsigned long rate;
 	unsigned long parent_rate;
-	u8 parent_index;
+	u8 prediv_width;
 	u8 n;
 	u8 k;
 	u8 m;
@@ -33,6 +39,7 @@ struct factors_data {
 	int mux;
 	int muxmask;
 	const struct clk_factors_config *table;
+	const struct clk_factors_prediv *prediv_table;
 	void (*getter)(struct factors_request *req);
 	void (*recalc)(struct factors_request *req);
 	const char *name;
@@ -42,6 +49,7 @@ struct clk_factors {
 	struct clk_hw hw;
 	void __iomem *reg;
 	const struct clk_factors_config *config;
+	const struct clk_factors_prediv *prediv_config;
 	void (*get_factors)(struct factors_request *req);
 	void (*recalc)(struct factors_request *req);
 	spinlock_t *lock;
-- 
1.9.1

[toc] | [next] | [standalone]

#1380679

Fromkbuild test robot <lkp@intel.com>
Date2016-04-17 03:30 +0200
Message-ID<roJHc-4pj-3@gated-at.bofh.it>
In reply to#1380585

[Multipart message — attachments visible in raw view] — view raw

Hi Vishnu,

[auto build test ERROR on clk/clk-next]
[also build test ERROR on v4.6-rc3 next-20160415]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]

url:    https://github.com/0day-ci/linux/commits/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: arm-sunxi_defconfig (attached as .config)
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=arm 

Note: the linux-review/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801 HEAD 19bb5fc952754381d9f4f9b2e57a1fa09f467359 builds fine.
      It only hurts bisectibility.

All errors (new ones prefixed by >>):

   drivers/clk/sunxi/clk-sunxi.c: In function 'sun6i_get_ahb1_factors':
>> drivers/clk/sunxi/clk-sunxi.c:310:9: error: 'struct factors_request' has no member named 'parent_index'
     if (req->parent_index == SUN6I_AHB1_PARENT_PLL6) {
            ^
   drivers/clk/sunxi/clk-sunxi.c: In function 'sun6i_ahb1_recalc':
   drivers/clk/sunxi/clk-sunxi.c:340:9: error: 'struct factors_request' has no member named 'parent_index'
     if (req->parent_index == SUN6I_AHB1_PARENT_PLL6)
            ^

vim +310 drivers/clk/sunxi/clk-sunxi.c

a78bb355 Chen-Yu Tsai 2016-01-25  304  	if (req->parent_rate && req->rate > req->parent_rate)
a78bb355 Chen-Yu Tsai 2016-01-25  305  		req->rate = req->parent_rate;
a78bb355 Chen-Yu Tsai 2016-01-25  306  
a78bb355 Chen-Yu Tsai 2016-01-25  307  	div = DIV_ROUND_UP(req->parent_rate, req->rate);
a78bb355 Chen-Yu Tsai 2016-01-25  308  
a78bb355 Chen-Yu Tsai 2016-01-25  309  	/* calculate pre-divider if parent is pll6 */
a78bb355 Chen-Yu Tsai 2016-01-25 @310  	if (req->parent_index == SUN6I_AHB1_PARENT_PLL6) {
a78bb355 Chen-Yu Tsai 2016-01-25  311  		if (div < 4)
a78bb355 Chen-Yu Tsai 2016-01-25  312  			calcp = 0;
a78bb355 Chen-Yu Tsai 2016-01-25  313  		else if (div / 2 < 4)

:::::: The code at line 310 was first introduced by commit
:::::: a78bb35552a800949b2bf68f372d3d6ccabdd790 clk: sunxi: rewrite sun6i-a31-ahb1-clk using factors clk with custom recalc

:::::: TO: Chen-Yu Tsai <wens@csie.org>
:::::: CC: Maxime Ripard <maxime.ripard@free-electrons.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[toc] | [prev] | [next] | [standalone]

#1382372

FromPhilip Li <philip.li@intel.com>
Date2016-04-19 12:20 +0200
Message-ID<rpAVd-5ed-25@gated-at.bofh.it>
In reply to#1380679
On Sun, Apr 17, 2016 at 11:53:47AM +0800, Vishnu Patekar wrote:
> Both of these patches in series has to be applied at the same time.
> I think this is the reason, it fails.

hi Xiaolong, would you help do a check whether we apply the patches in correct sequence for this case?


> On 17 Apr 2016 09:26, "kbuild test robot" <lkp@intel.com> wrote:
> 
> > Hi Vishnu,
> >
> > [auto build test ERROR on clk/clk-next]
> > [also build test ERROR on v4.6-rc3 next-20160415]
> > [if your patch is applied to the wrong git tree, please drop us a note to
> > help improving the system]
> >
> > url:
> > https://github.com/0day-ci/linux/commits/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801
> > base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
> > clk-next
> > config: arm-sunxi_defconfig (attached as .config)
> > reproduce:
> >         wget
> > https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
> > -O ~/bin/make.cross
> >         chmod +x ~/bin/make.cross
> >         # save the attached .config to linux build tree
> >         make.cross ARCH=arm
> >
> > Note: the
> > linux-review/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801
> > HEAD 19bb5fc952754381d9f4f9b2e57a1fa09f467359 builds fine.
> >       It only hurts bisectibility.
> >
> > All errors (new ones prefixed by >>):
> >
> >    drivers/clk/sunxi/clk-sunxi.c: In function 'sun6i_get_ahb1_factors':
> > >> drivers/clk/sunxi/clk-sunxi.c:310:9: error: 'struct factors_request'
> > has no member named 'parent_index'
> >      if (req->parent_index == SUN6I_AHB1_PARENT_PLL6) {
> >             ^
> >    drivers/clk/sunxi/clk-sunxi.c: In function 'sun6i_ahb1_recalc':
> >    drivers/clk/sunxi/clk-sunxi.c:340:9: error: 'struct factors_request'
> > has no member named 'parent_index'
> >      if (req->parent_index == SUN6I_AHB1_PARENT_PLL6)
> >             ^
> >
> > vim +310 drivers/clk/sunxi/clk-sunxi.c
> >
> > a78bb355 Chen-Yu Tsai 2016-01-25  304   if (req->parent_rate && req->rate
> > > req->parent_rate)
> > a78bb355 Chen-Yu Tsai 2016-01-25  305           req->rate =
> > req->parent_rate;
> > a78bb355 Chen-Yu Tsai 2016-01-25  306
> > a78bb355 Chen-Yu Tsai 2016-01-25  307   div =
> > DIV_ROUND_UP(req->parent_rate, req->rate);
> > a78bb355 Chen-Yu Tsai 2016-01-25  308
> > a78bb355 Chen-Yu Tsai 2016-01-25  309   /* calculate pre-divider if parent
> > is pll6 */
> > a78bb355 Chen-Yu Tsai 2016-01-25 @310   if (req->parent_index ==
> > SUN6I_AHB1_PARENT_PLL6) {
> > a78bb355 Chen-Yu Tsai 2016-01-25  311           if (div < 4)
> > a78bb355 Chen-Yu Tsai 2016-01-25  312                   calcp = 0;
> > a78bb355 Chen-Yu Tsai 2016-01-25  313           else if (div / 2 < 4)
> >
> > :::::: The code at line 310 was first introduced by commit
> > :::::: a78bb35552a800949b2bf68f372d3d6ccabdd790 clk: sunxi: rewrite
> > sun6i-a31-ahb1-clk using factors clk with custom recalc
> >
> > :::::: TO: Chen-Yu Tsai <wens@csie.org>
> > :::::: CC: Maxime Ripard <maxime.ripard@free-electrons.com>
> >
> > ---
> > 0-DAY kernel test infrastructure                Open Source Technology
> > Center
> > https://lists.01.org/pipermail/kbuild-all                   Intel
> > Corporation
> >

[toc] | [prev] | [next] | [standalone]

#1382552

FromChen-Yu Tsai <wens@csie.org>
Date2016-04-19 16:20 +0200
Message-ID<rpEFr-8b6-1@gated-at.bofh.it>
In reply to#1382372
On Tue, Apr 19, 2016 at 6:22 PM, Philip Li <philip.li@intel.com> wrote:
> On Sun, Apr 17, 2016 at 11:53:47AM +0800, Vishnu Patekar wrote:
>> Both of these patches in series has to be applied at the same time.
>> I think this is the reason, it fails.

You should probably squash the second patch into the first.

ChenYu

> hi Xiaolong, would you help do a check whether we apply the patches in correct sequence for this case?
>
>
>> On 17 Apr 2016 09:26, "kbuild test robot" <lkp@intel.com> wrote:
>>
>> > Hi Vishnu,
>> >
>> > [auto build test ERROR on clk/clk-next]
>> > [also build test ERROR on v4.6-rc3 next-20160415]
>> > [if your patch is applied to the wrong git tree, please drop us a note to
>> > help improving the system]
>> >
>> > url:
>> > https://github.com/0day-ci/linux/commits/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801
>> > base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
>> > clk-next
>> > config: arm-sunxi_defconfig (attached as .config)
>> > reproduce:
>> >         wget
>> > https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
>> > -O ~/bin/make.cross
>> >         chmod +x ~/bin/make.cross
>> >         # save the attached .config to linux build tree
>> >         make.cross ARCH=arm
>> >
>> > Note: the
>> > linux-review/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801
>> > HEAD 19bb5fc952754381d9f4f9b2e57a1fa09f467359 builds fine.
>> >       It only hurts bisectibility.
>> >
>> > All errors (new ones prefixed by >>):
>> >
>> >    drivers/clk/sunxi/clk-sunxi.c: In function 'sun6i_get_ahb1_factors':
>> > >> drivers/clk/sunxi/clk-sunxi.c:310:9: error: 'struct factors_request'
>> > has no member named 'parent_index'
>> >      if (req->parent_index == SUN6I_AHB1_PARENT_PLL6) {
>> >             ^
>> >    drivers/clk/sunxi/clk-sunxi.c: In function 'sun6i_ahb1_recalc':
>> >    drivers/clk/sunxi/clk-sunxi.c:340:9: error: 'struct factors_request'
>> > has no member named 'parent_index'
>> >      if (req->parent_index == SUN6I_AHB1_PARENT_PLL6)
>> >             ^
>> >
>> > vim +310 drivers/clk/sunxi/clk-sunxi.c
>> >
>> > a78bb355 Chen-Yu Tsai 2016-01-25  304   if (req->parent_rate && req->rate
>> > > req->parent_rate)
>> > a78bb355 Chen-Yu Tsai 2016-01-25  305           req->rate =
>> > req->parent_rate;
>> > a78bb355 Chen-Yu Tsai 2016-01-25  306
>> > a78bb355 Chen-Yu Tsai 2016-01-25  307   div =
>> > DIV_ROUND_UP(req->parent_rate, req->rate);
>> > a78bb355 Chen-Yu Tsai 2016-01-25  308
>> > a78bb355 Chen-Yu Tsai 2016-01-25  309   /* calculate pre-divider if parent
>> > is pll6 */
>> > a78bb355 Chen-Yu Tsai 2016-01-25 @310   if (req->parent_index ==
>> > SUN6I_AHB1_PARENT_PLL6) {
>> > a78bb355 Chen-Yu Tsai 2016-01-25  311           if (div < 4)
>> > a78bb355 Chen-Yu Tsai 2016-01-25  312                   calcp = 0;
>> > a78bb355 Chen-Yu Tsai 2016-01-25  313           else if (div / 2 < 4)
>> >
>> > :::::: The code at line 310 was first introduced by commit
>> > :::::: a78bb35552a800949b2bf68f372d3d6ccabdd790 clk: sunxi: rewrite
>> > sun6i-a31-ahb1-clk using factors clk with custom recalc
>> >
>> > :::::: TO: Chen-Yu Tsai <wens@csie.org>
>> > :::::: CC: Maxime Ripard <maxime.ripard@free-electrons.com>
>> >
>> > ---
>> > 0-DAY kernel test infrastructure                Open Source Technology
>> > Center
>> > https://lists.01.org/pipermail/kbuild-all                   Intel
>> > Corporation
>> >

[toc] | [prev] | [next] | [standalone]

#1382630

FromVishnu Patekar <vishnupatekar0510@gmail.com>
Date2016-04-19 17:50 +0200
Message-ID<rpG4z-Hd-31@gated-at.bofh.it>
In reply to#1382552
Hello Wens,

On Tue, Apr 19, 2016 at 10:16 PM, Chen-Yu Tsai <wens@csie.org> wrote:
> On Tue, Apr 19, 2016 at 6:22 PM, Philip Li <philip.li@intel.com> wrote:
>> On Sun, Apr 17, 2016 at 11:53:47AM +0800, Vishnu Patekar wrote:
>>> Both of these patches in series has to be applied at the same time.
>>> I think this is the reason, it fails.
>
> You should probably squash the second patch into the first.
Yes, I should have, I'll send v2 by combining both patches into one.
>
> ChenYu
>
>> hi Xiaolong, would you help do a check whether we apply the patches in correct sequence for this case?
>>
>>
>>> On 17 Apr 2016 09:26, "kbuild test robot" <lkp@intel.com> wrote:
>>>
>>> > Hi Vishnu,
>>> >
>>> > [auto build test ERROR on clk/clk-next]
>>> > [also build test ERROR on v4.6-rc3 next-20160415]
>>> > [if your patch is applied to the wrong git tree, please drop us a note to
>>> > help improving the system]
>>> >
>>> > url:
>>> > https://github.com/0day-ci/linux/commits/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801
>>> > base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
>>> > clk-next
>>> > config: arm-sunxi_defconfig (attached as .config)
>>> > reproduce:
>>> >         wget
>>> > https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross
>>> > -O ~/bin/make.cross
>>> >         chmod +x ~/bin/make.cross
>>> >         # save the attached .config to linux build tree
>>> >         make.cross ARCH=arm
>>> >
>>> > Note: the
>>> > linux-review/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801
>>> > HEAD 19bb5fc952754381d9f4f9b2e57a1fa09f467359 builds fine.
>>> >       It only hurts bisectibility.
>>> >
>>> > All errors (new ones prefixed by >>):
>>> >
>>> >    drivers/clk/sunxi/clk-sunxi.c: In function 'sun6i_get_ahb1_factors':
>>> > >> drivers/clk/sunxi/clk-sunxi.c:310:9: error: 'struct factors_request'
>>> > has no member named 'parent_index'
>>> >      if (req->parent_index == SUN6I_AHB1_PARENT_PLL6) {
>>> >             ^
>>> >    drivers/clk/sunxi/clk-sunxi.c: In function 'sun6i_ahb1_recalc':
>>> >    drivers/clk/sunxi/clk-sunxi.c:340:9: error: 'struct factors_request'
>>> > has no member named 'parent_index'
>>> >      if (req->parent_index == SUN6I_AHB1_PARENT_PLL6)
>>> >             ^
>>> >
>>> > vim +310 drivers/clk/sunxi/clk-sunxi.c
>>> >
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  304   if (req->parent_rate && req->rate
>>> > > req->parent_rate)
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  305           req->rate =
>>> > req->parent_rate;
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  306
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  307   div =
>>> > DIV_ROUND_UP(req->parent_rate, req->rate);
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  308
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  309   /* calculate pre-divider if parent
>>> > is pll6 */
>>> > a78bb355 Chen-Yu Tsai 2016-01-25 @310   if (req->parent_index ==
>>> > SUN6I_AHB1_PARENT_PLL6) {
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  311           if (div < 4)
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  312                   calcp = 0;
>>> > a78bb355 Chen-Yu Tsai 2016-01-25  313           else if (div / 2 < 4)
>>> >
>>> > :::::: The code at line 310 was first introduced by commit
>>> > :::::: a78bb35552a800949b2bf68f372d3d6ccabdd790 clk: sunxi: rewrite
>>> > sun6i-a31-ahb1-clk using factors clk with custom recalc
>>> >
>>> > :::::: TO: Chen-Yu Tsai <wens@csie.org>
>>> > :::::: CC: Maxime Ripard <maxime.ripard@free-electrons.com>
>>> >
>>> > ---
>>> > 0-DAY kernel test infrastructure                Open Source Technology
>>> > Center
>>> > https://lists.01.org/pipermail/kbuild-all                   Intel
>>> > Corporation
>>> >

[toc] | [prev] | [standalone]

Back to top | Article view | linux.kernel

csiph-web