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| Started by | Vishnu Patekar <vishnupatekar0510@gmail.com> |
|---|---|
| First post | 2016-04-16 21:00 +0200 |
| Last post | 2016-04-16 21:00 +0200 |
| Articles | 2 — 1 participant |
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[PATCH 0/2] sunxi factors clock predivider handling Vishnu Patekar <vishnupatekar0510@gmail.com> - 2016-04-16 21:00 +0200
[PATCH 2/2] clk: sunxi: add prediv table for a31 ahb1 clock Vishnu Patekar <vishnupatekar0510@gmail.com> - 2016-04-16 21:00 +0200
| From | Vishnu Patekar <vishnupatekar0510@gmail.com> |
|---|---|
| Date | 2016-04-16 21:00 +0200 |
| Subject | [PATCH 0/2] sunxi factors clock predivider handling |
| Message-ID | <roDBM-87t-3@gated-at.bofh.it> |
For allwinner A31 ahb1 and a83t ahb1 clocks have predivider for certain parent. Currently, it's being handled in clock specific functions. A83t ahb1 and a31 ahb1 are similar clocks except a83t parent index 0b10 and 0b11 are pll6/prediv and a31 ahb1 parent index 0x11 is pll6/prediv. with only this change, code duplication was needed. To handle this, this patch adds predivider table with parent index, prediv shift and width, parents with predivider will have nonzero width. Rate adjustment is moved from clock specific recalc function to generic factors recalc. clock specific recalc was currently used only by a31 ahb1. For getter, it differentiates parents with prediv, with non-zero prediv width. I've tested this patch on a83t bpi-m3 board. I do not have a31 device. a83t changes are not included in this patch, It'll be included in separate patch. Vishnu Patekar (2): clk: sunxi: add predivider handling for factors clock clk: sunxi: add prediv table for a31 ahb1 clock drivers/clk/sunxi/clk-factors.c | 31 +++++++++++++++---------------- drivers/clk/sunxi/clk-factors.h | 10 +++++++++- drivers/clk/sunxi/clk-sunxi.c | 31 +++++++++---------------------- 3 files changed, 33 insertions(+), 39 deletions(-) -- 1.9.1
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| From | Vishnu Patekar <vishnupatekar0510@gmail.com> |
|---|---|
| Date | 2016-04-16 21:00 +0200 |
| Subject | [PATCH 2/2] clk: sunxi: add prediv table for a31 ahb1 clock |
| Message-ID | <roDBM-87t-17@gated-at.bofh.it> |
| In reply to | #1380586 |
For ahb1 clock, move mshift and mwidth to parent specific width and shift.
getter differentiates parents with prediv, with non-zero prediv width.
Also, removed unused ahb1 recalc function, it's now handled in generic
factors recalc.
Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com>
---
drivers/clk/sunxi/clk-sunxi.c | 31 +++++++++----------------------
1 file changed, 9 insertions(+), 22 deletions(-)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 91de0a0..5a5f26b 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -282,8 +282,6 @@ static void sun5i_a13_get_ahb_factors(struct factors_request *req)
req->p = div;
}
-#define SUN6I_AHB1_PARENT_PLL6 3
-
/**
* sun6i_a31_get_ahb_factors() - calculates m, p factors for AHB
* AHB rate is calculated as follows
@@ -307,7 +305,7 @@ static void sun6i_get_ahb1_factors(struct factors_request *req)
div = DIV_ROUND_UP(req->parent_rate, req->rate);
/* calculate pre-divider if parent is pll6 */
- if (req->parent_index == SUN6I_AHB1_PARENT_PLL6) {
+ if (req->prediv_width) {
if (div < 4)
calcp = 0;
else if (div / 2 < 4)
@@ -329,22 +327,6 @@ static void sun6i_get_ahb1_factors(struct factors_request *req)
}
/**
- * sun6i_ahb1_recalc() - calculates AHB clock rate from m, p factors and
- * parent index
- */
-static void sun6i_ahb1_recalc(struct factors_request *req)
-{
- req->rate = req->parent_rate;
-
- /* apply pre-divider first if parent is pll6 */
- if (req->parent_index == SUN6I_AHB1_PARENT_PLL6)
- req->rate /= req->m + 1;
-
- /* clk divider */
- req->rate >>= req->p;
-}
-
-/**
* sun4i_get_apb1_factors() - calculates m, p factors for APB1
* APB1 rate is calculated as follows
* rate = (parent_rate >> p) / (m + 1);
@@ -474,12 +456,17 @@ static const struct clk_factors_config sun5i_a13_ahb_config = {
};
static const struct clk_factors_config sun6i_ahb1_config = {
- .mshift = 6,
- .mwidth = 2,
.pshift = 4,
.pwidth = 2,
};
+static const struct clk_factors_prediv sun6i_ahb1_prediv[] = {
+ {.parent_index = 0, .shift = 0, .width = 0 }, /* LOSC */
+ {.parent_index = 1, .shift = 0, .width = 0 }, /* OSC24MHz */
+ {.parent_index = 2, .shift = 0, .width = 0 }, /* AXI */
+ {.parent_index = 3, .shift = 6, .width = 2 } /* PLL6/Pre_div */
+};
+
static const struct clk_factors_config sun4i_apb1_config = {
.mshift = 0,
.mwidth = 5,
@@ -551,8 +538,8 @@ static const struct factors_data sun6i_ahb1_data __initconst = {
.mux = 12,
.muxmask = BIT(1) | BIT(0),
.table = &sun6i_ahb1_config,
+ .prediv_table = sun6i_ahb1_prediv,
.getter = sun6i_get_ahb1_factors,
- .recalc = sun6i_ahb1_recalc,
};
static const struct factors_data sun4i_apb1_data __initconst = {
--
1.9.1
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