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[PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3

Started byChanwoo Choi <cw00.choi@samsung.com>
First post2016-04-08 07:10 +0200
Last post2016-04-14 01:20 +0200
Articles 3 — 2 participants

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  [PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for  exynos5422-odroidxu3 Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-08 07:10 +0200
    Re: [PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT  for exynos5422-odroidxu3 Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-04-12 13:00 +0200
      Re: [PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT  for exynos5422-odroidxu3 Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-14 01:20 +0200

#1373977 — [PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3

FromChanwoo Choi <cw00.choi@samsung.com>
Date2016-04-08 07:10 +0200
Subject[PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3
Message-ID<rlwQa-7k9-1@gated-at.bofh.it>
This patch adds the bus device tree nodes for INT (Internal) block
to enable the AMBA bus frequency scaling and add the NoC (Network on Chip)
Probe Device Tree node to measure the bandwidht for AMBA AXI bus.

The WCORE bus bus is parent device in INT block using VDD_INT.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
---
 arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 99 ++++++++++++++++++++++
 1 file changed, 99 insertions(+)

diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
index 1bd507bfa750..2a74abe6fc5d 100644
--- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
@@ -361,6 +361,22 @@
 	cap-sd-highspeed;
 };
 
+&nocp_mem0_0 {
+	status = "okay";
+};
+
+&nocp_mem0_1 {
+	status = "okay";
+};
+
+&nocp_mem0_2 {
+	status = "okay";
+};
+
+&nocp_mem0_3 {
+	status = "okay";
+};
+
 &pinctrl_0 {
 	hdmi_hpd_irq: hdmi-hpd-irq {
 		samsung,pins = "gpx3-7";
@@ -432,3 +448,86 @@
 	vdd33-supply = <&ldo9_reg>;
 	vdd10-supply = <&ldo11_reg>;
 };
+
+&bus_wcore {
+	devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
+			<&nocp_mem0_2>, <&nocp_mem0_3>;
+	vdd-supply = <&buck3_reg>;
+	exynos,saturation-ratio = <100>;
+	status = "okay";
+};
+
+&bus_noc {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_fsys_apb {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_fsys {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_fsys2 {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_mfc {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_gen {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_peri {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_g2d {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_g2d_acp {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_jpeg {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_jpeg_apb {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_disp1_fimd {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_disp1 {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_gscl_scaler {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
+
+&bus_mscl {
+	devfreq = <&bus_wcore>;
+	status = "okay";
+};
-- 
1.9.1

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#1376697 — Re: [PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3

FromKrzysztof Kozlowski <k.kozlowski@samsung.com>
Date2016-04-12 13:00 +0200
SubjectRe: [PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3
Message-ID<rn4d4-68J-13@gated-at.bofh.it>
In reply to#1373977
On 04/08/2016 07:00 AM, Chanwoo Choi wrote:
> This patch adds the bus device tree nodes for INT (Internal) block
> to enable the AMBA bus frequency scaling and add the NoC (Network on Chip)
> Probe Device Tree node to measure the bandwidht for AMBA AXI bus.
> 
> The WCORE bus bus is parent device in INT block using VDD_INT.
> 
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 99 ++++++++++++++++++++++
>  1 file changed, 99 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> index 1bd507bfa750..2a74abe6fc5d 100644
> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
> @@ -361,6 +361,22 @@
>  	cap-sd-highspeed;
>  };
>  
> +&nocp_mem0_0 {
> +	status = "okay";
> +};
> +
> +&nocp_mem0_1 {
> +	status = "okay";
> +};
> +
> +&nocp_mem0_2 {
> +	status = "okay";
> +};
> +
> +&nocp_mem0_3 {
> +	status = "okay";
> +};
> +
>  &pinctrl_0 {
>  	hdmi_hpd_irq: hdmi-hpd-irq {
>  		samsung,pins = "gpx3-7";
> @@ -432,3 +448,86 @@
>  	vdd33-supply = <&ldo9_reg>;
>  	vdd10-supply = <&ldo11_reg>;
>  };
> +
> +&bus_wcore {
> +	devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
> +			<&nocp_mem0_2>, <&nocp_mem0_3>;
> +	vdd-supply = <&buck3_reg>;
> +	exynos,saturation-ratio = <100>;
> +	status = "okay";
> +};
> +
> +&bus_noc {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_fsys_apb {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_fsys {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_fsys2 {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_mfc {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_gen {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_peri {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_g2d {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_g2d_acp {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_jpeg {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_jpeg_apb {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_disp1_fimd {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_disp1 {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_gscl_scaler {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};
> +
> +&bus_mscl {
> +	devfreq = <&bus_wcore>;
> +	status = "okay";
> +};

Could you put the bus nodes in alphabetical order, both between them and
in relation to others (so before &clock_audss)? Let's keep the file ordered.

Best regards,
Krzysztof

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#1378335 — Re: [PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3

FromChanwoo Choi <cw00.choi@samsung.com>
Date2016-04-14 01:20 +0200
SubjectRe: [PATCH 7/7] ARM: dts: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3
Message-ID<rnCeJ-BO-11@gated-at.bofh.it>
In reply to#1376697
On 2016년 04월 12일 19:59, Krzysztof Kozlowski wrote:
> On 04/08/2016 07:00 AM, Chanwoo Choi wrote:
>> This patch adds the bus device tree nodes for INT (Internal) block
>> to enable the AMBA bus frequency scaling and add the NoC (Network on Chip)
>> Probe Device Tree node to measure the bandwidht for AMBA AXI bus.
>>
>> The WCORE bus bus is parent device in INT block using VDD_INT.
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>>  arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 99 ++++++++++++++++++++++
>>  1 file changed, 99 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> index 1bd507bfa750..2a74abe6fc5d 100644
>> --- a/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> +++ b/arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
>> @@ -361,6 +361,22 @@
>>  	cap-sd-highspeed;
>>  };
>>  
>> +&nocp_mem0_0 {
>> +	status = "okay";
>> +};
>> +
>> +&nocp_mem0_1 {
>> +	status = "okay";
>> +};
>> +
>> +&nocp_mem0_2 {
>> +	status = "okay";
>> +};
>> +
>> +&nocp_mem0_3 {
>> +	status = "okay";
>> +};
>> +
>>  &pinctrl_0 {
>>  	hdmi_hpd_irq: hdmi-hpd-irq {
>>  		samsung,pins = "gpx3-7";
>> @@ -432,3 +448,86 @@
>>  	vdd33-supply = <&ldo9_reg>;
>>  	vdd10-supply = <&ldo11_reg>;
>>  };
>> +
>> +&bus_wcore {
>> +	devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>,
>> +			<&nocp_mem0_2>, <&nocp_mem0_3>;
>> +	vdd-supply = <&buck3_reg>;
>> +	exynos,saturation-ratio = <100>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_noc {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_fsys_apb {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_fsys {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_fsys2 {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_mfc {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_gen {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_peri {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_g2d {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_g2d_acp {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_jpeg {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_jpeg_apb {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_disp1_fimd {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_disp1 {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_gscl_scaler {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
>> +
>> +&bus_mscl {
>> +	devfreq = <&bus_wcore>;
>> +	status = "okay";
>> +};
> 
> Could you put the bus nodes in alphabetical order, both between them and
> in relation to others (so before &clock_audss)? Let's keep the file ordered.

OK. I'll reorder them.

Best Regards,
Chanwoo Choi

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