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| Started by | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| First post | 2016-04-04 18:30 +0200 |
| Last post | 2016-04-11 21:30 +0200 |
| Articles | 3 — 2 participants |
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[PATCH RFC 0/5] net: phy: sun8i-h3-ephy: Add Allwinner H3 Ethernet PHY driver Chen-Yu Tsai <wens@csie.org> - 2016-04-04 18:30 +0200
[PATCH RFC 5/5] ARM: dts: sun8i: Enable Ethernet controller on the Orange PI PC Chen-Yu Tsai <wens@csie.org> - 2016-04-04 18:30 +0200
Re: [PATCH RFC 5/5] ARM: dts: sun8i: Enable Ethernet controller on the Orange PI PC Florian Fainelli <f.fainelli@gmail.com> - 2016-04-11 21:30 +0200
| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Date | 2016-04-04 18:30 +0200 |
| Subject | [PATCH RFC 0/5] net: phy: sun8i-h3-ephy: Add Allwinner H3 Ethernet PHY driver |
| Message-ID | <rkfy2-5Pj-5@gated-at.bofh.it> |
Hi everyone,
This is an attempt to support the Ethernet PHY incorporated in Allwinner's
H3 SoC. It is a MII PHY, supporting 10/100 Mbps Ethernet.
Before the PHY can be accessed via MDIO and used, it needs to be powered
on and configured. This is done via a system control register in the CPU
address space. The same register also controls PHY interface mode and
MAC TX clock sources.
This driver brings up the Ethernet PHY (if it is used), and exports a
clock control for the MAC TX clock.
Patch 1 adds the bindings for this piece of hardware.
Patch 2 adds the driver for it.
Patch 3 adds a device node for the PHY.
Patch 4 & 5 are not to be merged. They are provided here as a solid
example of how this driver is used. The sun8i-emac bindings have not
been submitted and are not stable yet.
Comments welcome.
Regards
ChenYu
Chen-Yu Tsai (4):
net: phy: sun8i-h3-ephy: Add bindings for Allwinner H3 Ethernet PHY
net: phy: sun8i-h3-ephy: Add driver for Allwinner H3 Ethernet PHY
ARM: dts: sun8i-h3: Add H3 Ethernet PHY device node to sun8i-h3.dtsi
ARM: dts: sun8i: Enable Ethernet controller on the Orange PI PC
LABBE Corentin (1):
ARM: dts: sun8i-h3: Add Ethernet controller device node to
sun8i-h3.dtsi
.../bindings/net/allwinner,sun8i-h3-ephy.txt | 44 ++++
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 14 ++
arch/arm/boot/dts/sun8i-h3.dtsi | 21 ++
drivers/net/phy/Kconfig | 8 +
drivers/net/phy/Makefile | 1 +
drivers/net/phy/sun8i-h3-ephy.c | 266 +++++++++++++++++++++
6 files changed, 354 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun8i-h3-ephy.txt
create mode 100644 drivers/net/phy/sun8i-h3-ephy.c
--
2.7.0
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| From | Chen-Yu Tsai <wens@csie.org> |
|---|---|
| Date | 2016-04-04 18:30 +0200 |
| Subject | [PATCH RFC 5/5] ARM: dts: sun8i: Enable Ethernet controller on the Orange PI PC |
| Message-ID | <rkfy4-5Pj-37@gated-at.bofh.it> |
| In reply to | #1370750 |
The Orange PI PC uses the H3's internal Ethernet PHY with the EMAC
Ethernet controller.
Set a proper address for the PHY and enable the EMAC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
This patch depends on "ARM: dts: sun8i-h3: Add Ethernet controller device",
which uses an binding still in development.
Do not merge.
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index daf50b9a6657..f01e10df812a 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -102,6 +102,20 @@
status = "okay";
};
+&ephy {
+ allwinner,ephy-addr = <0x1>;
+};
+
+&emac {
+ phy = <&phy1>;
+ phy-mode = "mii";
+ status = "okay";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+};
+
&ir {
pinctrl-names = "default";
pinctrl-0 = <&ir_pins_a>;
--
2.7.0
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| From | Florian Fainelli <f.fainelli@gmail.com> |
|---|---|
| Date | 2016-04-11 21:30 +0200 |
| Subject | Re: [PATCH RFC 5/5] ARM: dts: sun8i: Enable Ethernet controller on the Orange PI PC |
| Message-ID | <rmPH4-2Bx-11@gated-at.bofh.it> |
| In reply to | #1370752 |
On 04/04/16 09:22, Chen-Yu Tsai wrote:
> The Orange PI PC uses the H3's internal Ethernet PHY with the EMAC
> Ethernet controller.
>
> Set a proper address for the PHY and enable the EMAC.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>
> This patch depends on "ARM: dts: sun8i-h3: Add Ethernet controller device",
> which uses an binding still in development.
>
> Do not merge.
>
> ---
> arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> index daf50b9a6657..f01e10df812a 100644
> --- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
> @@ -102,6 +102,20 @@
> status = "okay";
> };
>
> +&ephy {
> + allwinner,ephy-addr = <0x1>;
> +};
> +
> +&emac {
> + phy = <&phy1>;
> + phy-mode = "mii";
> + status = "okay";
> +
> + phy1: ethernet-phy@1 {
> + reg = <1>;
> + };
> +};
As commented in patch 1, the fact that you have to put the Ethernet PHY
address twice here is not really a good thing, because they cannot be
dissociated from eath other, I would rather have a standard Ethernet PHY
DT node represent the desired PHY address, and have your glue/SHIM
SUN8I_H3_EMAC driver scan the Device Tree to know what address to
program for the Ethernet PHY.
--
Florian
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