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[PATCH 3.12 79/98] xtensa: clear all DBREAKC registers on start

Started byJiri Slaby <jslaby@suse.cz>
First post2016-04-11 15:40 +0200
Last post2016-04-11 15:40 +0200
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  [PATCH 3.12 79/98] xtensa: clear all DBREAKC registers on start Jiri Slaby <jslaby@suse.cz> - 2016-04-11 15:40 +0200

#1375890 — [PATCH 3.12 79/98] xtensa: clear all DBREAKC registers on start

FromJiri Slaby <jslaby@suse.cz>
Date2016-04-11 15:40 +0200
Subject[PATCH 3.12 79/98] xtensa: clear all DBREAKC registers on start
Message-ID<rmKeo-6GA-71@gated-at.bofh.it>
From: Max Filippov <jcmvbkbc@gmail.com>

3.12-stable review patch.  If anyone has any objections, please let me know.

===============

commit 7de7ac785ae18a2cdc78d7560f48e3213d9ea0ab upstream.

There are XCHAL_NUM_DBREAK registers, clear them all.
This also fixes cryptic assembler error message with binutils 2.25 when
XCHAL_NUM_DBREAK is 0:

  as: out of memory allocating 18446744073709551575 bytes after a total
  of 495616 bytes

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
---
 arch/xtensa/kernel/head.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S
index 7d740ebbe198..bb12d778f64f 100644
--- a/arch/xtensa/kernel/head.S
+++ b/arch/xtensa/kernel/head.S
@@ -118,7 +118,7 @@ ENTRY(_startup)
 	wsr	a0, icountlevel
 
 	.set	_index, 0
-	.rept	XCHAL_NUM_DBREAK - 1
+	.rept	XCHAL_NUM_DBREAK
 	wsr	a0, SREG_DBREAKC + _index
 	.set	_index, _index + 1
 	.endr
-- 
2.8.1

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