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Groups > linux.kernel > #1375472 > unrolled thread
| Started by | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| First post | 2016-04-11 06:10 +0200 |
| Last post | 2016-04-11 06:10 +0200 |
| Articles | 10 — 3 participants |
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[PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-11 06:10 +0200
Re: [PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-11 06:10 +0200
Re: [PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-04-11 22:00 +0200
Re: [PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor Chanwoo Choi <cwchoi00@gmail.com> - 2016-04-11 22:20 +0200
[PATCH v9 02/20] PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-11 06:10 +0200
[PATCH v9 06/20] PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-11 06:10 +0200
[PATCH v9 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-11 06:10 +0200
Re: [PATCH v9 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver Krzysztof Kozlowski <k.kozlowski@samsung.com> - 2016-04-12 09:30 +0200
[PATCH v9 12/20] ARM: dts: Add DMC bus frequency for exynos3250-rinato/monk Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-11 06:10 +0200
[PATCH v9 16/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4210 Chanwoo Choi <cw00.choi@samsung.com> - 2016-04-11 06:10 +0200
| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-04-11 06:10 +0200 |
| Subject | [PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor |
| Message-ID | <rmBb4-7ND-5@gated-at.bofh.it> |
This patch-set includes the two features as following. The generic exynos bus
frequency driver is able to support almost Exynos SoCs for bus frequency
scaling. And the new passive governor is able to make the dependency on
between devices for frequency/voltage scaling. I had posted the patch-set[1]
with the similiar concept. This is is revised version for exynos bus frequency.
- Generic exynos bus frequency driver
- New passive governor of DEVFREQ framework
[1] https://lkml.org/lkml/2015/1/7/872
: [PATCHv3 0/8] devfreq: Add generic exynos memory-bus frequency driver
Changes from v8:
(https://lkml.org/lkml/2016/4/8/14)
- Fix possible recursive locking issue by using mutex_lock_nested()
Changes from v7:
(https://lkml.org/lkml/2016/3/31/308)
- Use IS_ERR() instead of IS_ERR_OR_NULL() macro
- Add signed-off-by/acked-by tag of DEVFREQ maintainer
- Fix the comment in governor_passive.c
Changes from v6:
(https://lkml.org/lkml/2016/3/27/187)
- Patch1/2 add signed-off-by tag from DEVFREQ Maintainer (Myungjoo Ham)
- Drop patch5 (PM / devfreq: Add governer type with unique number)
- Add missing description about the transition_notifier_list in struct devfreq
- Remove the passive governor code from devfreq.c core driver. Instead, passive
governor uses the DEVFREQ_GOV_START/STOP signal to register/unregister the
DEVFREQ_TRANSITION_NOTIFIER between the parent devfreq device and passive
devfreq device.
- Add the author (myungjoo.ham@samsung.com) of passive governor
- Add 'struct devfreq_passive_data' to pass the devfreq instance of parent.
Changes from v5:
(https://lkml.org/lkml/2016/3/24/5)
- Rebase the patch-set on Linux v4.6-rc1
- Add Tested-by tag from Markus Reichl <m.reichl@fivetechno.de>
- Add Tested-by tag from Anand Moon <linux.amoon@gmail.com>
Changes from v4:
(https://lkml.org/lkml/2015/12/14/43)
- Add new DEVFREQ_TRANSITION_NOTIFIER notifier. The passive
devfreq device recevie the changed frequency of parent
devfreq device through DEVFREQ_TRANSITION_NOTIFIER.
- Add governor type to identify thme using the defined constant
- Modify the passive governor using the DEVFREQ_TRANSITION_NOTIFIER notifier.
- Fix the RCU locking probrlm (Reported-by: Tobias Jakobi)
- Fix the debugfs error during the kernel booting (Reported-by: Tobias Jakobi)
- The Device Tree patches have got Reviewed-by tag from Exynos SoC Maintainer
(Krzysztof Kozlowski <k.kozlowski@samsung.com>)
Changes from v3:
(https://lkml.org/lkml/2015/12/11/75)
- Add the reviewed-by tag from Krzysztof Kozlowski (patch2/3/13/14/15/16/17)
- Fix typo of the description on patch14
- Modify the subject and description of patch17
- Reorder the 'bus_xxx' device tree node alphabetically in
both exynos3250-rinato/monk.dts and exynos4412-trats/odroidu3
Changes from v2:
(https://lkml.org/lkml/2015/12/8/869)
- Fix typo on documentation
- Modify the more appropriate sentence on patch description
- Add the detailed description about both parent and passive bus device
- Modify the DMC frequency for Exynos4x12 DMC bus (200MHz -> 267MHz)
- Modify the voltage of 200MHz was included in Exynos3250 DMC bus (800mV -> 825mV)
- Rename OPP nodes as 'opp@<opp-hz>'
- Delete the duplicate 'opp-microvolt' property of passive devfreq device
- Reorder the 'bus_xxx' device tree node alphabetically in exynos3250-rinato/monk.dts
- Reorder the 'bus_xxx' device tree node alphabetically in exynos4412-trats/odroidu3
- Add new exynos4412-ppmu-common.dtsi to remove the duplicate PPMU dt node
on rinato/monk/trats2/odroid-u3 board
- Add the log message if bus device is registered to devfreq framework successfully
- Add the reviewed-by tag from Krzysztof Kozlowski
- Add the tested-by tag from Anand Moon on Odroid U3
- Add 'SAMSUNG BUS FREQUENCY DRIVER' entry to MAINTAINERS
Changes from v1:
(https://lkml.org/lkml/2015/11/26/260)
- Check whether the instance of regulator is NULL or not
when executing regulator_disable() because of only parent
devfreq device has the regulator instance. After fixing it,
the wake-up from suspend state is well working. (patch1)
- Fix bug which checks 'bus-clk' instead of 'bus->regulator'
after calling devm_clk_get() (on patch1)
- Update the documentation to remove the description about
DEVFREQ-EVENT subsystem (on patch2)
- Add the full name of DMC (Dynamic Memory Controller) (on patch2)
- Modify the detailed correlation of buses for Exynos3250
on documentation (patch2)
- Add the MFC bus node for Exynos3250 (on patch11, patch12)
- Fix the duplicate frequency of bus_display on Exynos4x12.dtsi
- Add the PPMU node for exynos4412-odroidu3
- Add the support of bus frequency for exynos4412-odroidu3
[Description]
Detailed descirption for patch-set:
1. Add generic exynos bus frequency driver
: This patch-set adds the generic exynos bus frequency driver for AXI bus
of sub-blocks in exynos SoC. The Samsung Exynos SoC have the common
architecture for bus between DRAM and sub-blocks in SoC.
There are the different buses according to Exynos SoC because Exynos SoC
has the differnt sub-blocks and bus speed. In spite of this difference
among Exynos SoCs, this driver is able to support almost Exynos SoC by adding
unique data of each bus in the devicetree file.
In devicetree, each bus node has a bus clock, regulator, operation-point
and devfreq-event devices which measure the utilization of each bus block.
For example,
- The bus of DMC block in exynos3250.dtsi are listed below:
bus_dmc: bus_dmc {
compatible = "samsung,exynos-bus";
clocks = <&cmu_dmc CLK_DIV_DMC>;
clock-names = "bus";
operating-points-v2 = <&bus_dmc_opp_table>;
status = "disabled";
};
bus_dmc_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
opp@50000000 {
opp-hz = /bits/ 64 <50000000>;
opp-microvolt = <800000>;
};
opp@100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <800000>;
};
opp@134000000 {
opp-hz = /bits/ 64 <134000000>;
opp-microvolt = <800000>;
};
opp@200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <825000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-microvolt = <875000>;
};
};
- Usage case to handle the frequency and voltage of bus on runtime
in exynos3250-rinato.dts are listed below:
&bus_dmc {
devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
vdd-supply = <&buck1_reg>; /* VDD_MIF */
status = "okay";
};
2. Add new passive governor of DEVFREQ framework
: This patch-set add the new passive governor for DEVFREQ framework.
The existing governors (ondemand, performance and so on) are used for DVFS
(Dynamic Voltage and Frequency Scaling) drivers. The existing governors
are independently used for specific device driver which don't give the
influence to other device drviers and also don't receive the effect from
other device drivers.
The passive governor depends on operation of parent driver with existing
governors(ondemand, performance and so on) extremely and is not able to
decide the new frequency by oneself. According to the decided new frequency
of parent driver with governor, the passive governor uses it to decide
the appropriate frequency for own device driver. The passive governor
must need the following information from device tree:
For exameple,
There are one more bus device drivers in Exynos3250 which need to
change their source clock according to their utilization on runtime.
But, they share the same power line (e.g., regulator). So, LEFTBUS bus
driver is operated as parent with ondemand governor and then the rest
device driver with passive governor.
The buses of Internal block in exynos3250.dtsi are listed below:
When LEFTBUS bus driver (parent) changes the bus frequency with
ondemand governor on runtime, the rest bus devices which sharing
the same power line (VDD_INT) will change the each bus frequency
according to the decision of LEFTBUS bus driver (parent).
- INT (Internal) block
: VDD_INT |--- LEFTBUS
|--- PERIL
|--- MFC
|--- G3D
|--- RIGHTBUS
|--- FSYS
|--- LCD0
|--- PERIR
|--- ISP
|--- CAM
- The buss of INT block in exynos3250.dtsi are listed below:
bus_leftbus: bus_leftbus {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_GDL>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
bus_rightbus: bus_rightbus {
compatible = "samsung,exynos-bus";
clocks = <&cmu CLK_DIV_GDR>;
clock-names = "bus";
operating-points-v2 = <&bus_leftbus_opp_table>;
status = "disabled";
};
(Omit the rest bus dt node)
- Usage case to handle the frequency and voltage of bus on runtime
in exynos3250-rinato.dts are listed below:
/* Parent bus device of VDD_INT */
&bus_leftbus {
devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
vdd-supply = <&buck3_reg>;
status = "okay";
};
/* Passive bus device depend on LEFTBUS bus. */
&bus_rightbus {
devfreq = <&bus_leftbus>; /* 'devfreq' property indicates
the phandle of parent device. */
status = "okay";
};
(Omit the rest bus dt node)
Chanwoo Choi (20):
PM / devfreq: exynos: Add generic exynos bus frequency driver
PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver
PM / devfreq: Add devfreq_get_devfreq_by_phandle()
PM / devfreq: Add new DEVFREQ_TRANSITION_NOTIFIER notifier
PM / devfreq: Add new passive governor
PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor
PM / devfreq: exynos: Update documentation for bus devices using passive governor
PM / devfreq: exynos: Add the detailed correlation between sub-blocks and power line
PM / devfreq: exynos: Remove unused exynos4/5 busfreq driver
MAINTAINERS: Add samsung bus frequency driver entry
ARM: dts: Add DMC bus node for Exynos3250
ARM: dts: Add DMC bus frequency for exynos3250-rinato/monk
ARM: dts: Add bus nodes using VDD_INT for Exynos3250
ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12
ARM: dts: Add bus nodes using VDD_INT for Exynos4x12
ARM: dts: Add bus nodes using VDD_MIF for Exynos4210
ARM: dts: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes
ARM: dts: Add support of bus frequency using VDD_INT for exynos3250-rinato
ARM: dts: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3
ARM: dts: Add support of bus frequency for exynos4412-trats/odroidu3
.../devicetree/bindings/devfreq/exynos-bus.txt | 390 ++++++++
MAINTAINERS | 9 +
arch/arm/boot/dts/exynos3250-monk.dts | 47 +-
arch/arm/boot/dts/exynos3250-rinato.dts | 88 +-
arch/arm/boot/dts/exynos3250.dtsi | 181 ++++
arch/arm/boot/dts/exynos4210.dtsi | 159 +++
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 56 +-
arch/arm/boot/dts/exynos4412-ppmu-common.dtsi | 50 +
arch/arm/boot/dts/exynos4412-trats2.dts | 88 +-
arch/arm/boot/dts/exynos4x12.dtsi | 174 ++++
drivers/devfreq/Kconfig | 36 +-
drivers/devfreq/Makefile | 4 +-
drivers/devfreq/devfreq.c | 207 +++-
drivers/devfreq/exynos-bus.c | 570 +++++++++++
drivers/devfreq/exynos/Makefile | 3 -
drivers/devfreq/exynos/exynos4_bus.c | 1055 --------------------
drivers/devfreq/exynos/exynos4_bus.h | 110 --
drivers/devfreq/exynos/exynos5_bus.c | 431 --------
drivers/devfreq/exynos/exynos_ppmu.c | 119 ---
drivers/devfreq/exynos/exynos_ppmu.h | 86 --
drivers/devfreq/governor_passive.c | 207 ++++
include/linux/devfreq.h | 99 ++
22 files changed, 2221 insertions(+), 1948 deletions(-)
create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt
create mode 100644 arch/arm/boot/dts/exynos4412-ppmu-common.dtsi
create mode 100644 drivers/devfreq/exynos-bus.c
delete mode 100644 drivers/devfreq/exynos/Makefile
delete mode 100644 drivers/devfreq/exynos/exynos4_bus.c
delete mode 100644 drivers/devfreq/exynos/exynos4_bus.h
delete mode 100644 drivers/devfreq/exynos/exynos5_bus.c
delete mode 100644 drivers/devfreq/exynos/exynos_ppmu.c
delete mode 100644 drivers/devfreq/exynos/exynos_ppmu.h
create mode 100644 drivers/devfreq/governor_passive.c
--
1.9.1
[toc] | [next] | [standalone]
| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-04-11 06:10 +0200 |
| Subject | Re: [PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor |
| Message-ID | <rmBkK-88x-21@gated-at.bofh.it> |
| In reply to | #1375472 |
Dear Myungjoo and Krzysztof,
This patch-set already get the acked-by or signed-off-by tag
from Exynos SoC and DEVFREQ maintainer except for patch10.
If there is no comment, could you pick this patch-set?
Best Regards,
Chanwoo Choi
On 2016년 04월 11일 12:57, Chanwoo Choi wrote:
> This patch-set includes the two features as following. The generic exynos bus
> frequency driver is able to support almost Exynos SoCs for bus frequency
> scaling. And the new passive governor is able to make the dependency on
> between devices for frequency/voltage scaling. I had posted the patch-set[1]
> with the similiar concept. This is is revised version for exynos bus frequency.
> - Generic exynos bus frequency driver
> - New passive governor of DEVFREQ framework
> [1] https://lkml.org/lkml/2015/1/7/872
> : [PATCHv3 0/8] devfreq: Add generic exynos memory-bus frequency driver
>
> Changes from v8:
> (https://lkml.org/lkml/2016/4/8/14)
> - Fix possible recursive locking issue by using mutex_lock_nested()
>
> Changes from v7:
> (https://lkml.org/lkml/2016/3/31/308)
> - Use IS_ERR() instead of IS_ERR_OR_NULL() macro
> - Add signed-off-by/acked-by tag of DEVFREQ maintainer
> - Fix the comment in governor_passive.c
>
> Changes from v6:
> (https://lkml.org/lkml/2016/3/27/187)
> - Patch1/2 add signed-off-by tag from DEVFREQ Maintainer (Myungjoo Ham)
> - Drop patch5 (PM / devfreq: Add governer type with unique number)
> - Add missing description about the transition_notifier_list in struct devfreq
> - Remove the passive governor code from devfreq.c core driver. Instead, passive
> governor uses the DEVFREQ_GOV_START/STOP signal to register/unregister the
> DEVFREQ_TRANSITION_NOTIFIER between the parent devfreq device and passive
> devfreq device.
> - Add the author (myungjoo.ham@samsung.com) of passive governor
> - Add 'struct devfreq_passive_data' to pass the devfreq instance of parent.
>
> Changes from v5:
> (https://lkml.org/lkml/2016/3/24/5)
> - Rebase the patch-set on Linux v4.6-rc1
> - Add Tested-by tag from Markus Reichl <m.reichl@fivetechno.de>
> - Add Tested-by tag from Anand Moon <linux.amoon@gmail.com>
>
> Changes from v4:
> (https://lkml.org/lkml/2015/12/14/43)
> - Add new DEVFREQ_TRANSITION_NOTIFIER notifier. The passive
> devfreq device recevie the changed frequency of parent
> devfreq device through DEVFREQ_TRANSITION_NOTIFIER.
> - Add governor type to identify thme using the defined constant
> - Modify the passive governor using the DEVFREQ_TRANSITION_NOTIFIER notifier.
> - Fix the RCU locking probrlm (Reported-by: Tobias Jakobi)
> - Fix the debugfs error during the kernel booting (Reported-by: Tobias Jakobi)
> - The Device Tree patches have got Reviewed-by tag from Exynos SoC Maintainer
> (Krzysztof Kozlowski <k.kozlowski@samsung.com>)
>
> Changes from v3:
> (https://lkml.org/lkml/2015/12/11/75)
> - Add the reviewed-by tag from Krzysztof Kozlowski (patch2/3/13/14/15/16/17)
> - Fix typo of the description on patch14
> - Modify the subject and description of patch17
> - Reorder the 'bus_xxx' device tree node alphabetically in
> both exynos3250-rinato/monk.dts and exynos4412-trats/odroidu3
>
> Changes from v2:
> (https://lkml.org/lkml/2015/12/8/869)
> - Fix typo on documentation
> - Modify the more appropriate sentence on patch description
> - Add the detailed description about both parent and passive bus device
> - Modify the DMC frequency for Exynos4x12 DMC bus (200MHz -> 267MHz)
> - Modify the voltage of 200MHz was included in Exynos3250 DMC bus (800mV -> 825mV)
> - Rename OPP nodes as 'opp@<opp-hz>'
> - Delete the duplicate 'opp-microvolt' property of passive devfreq device
> - Reorder the 'bus_xxx' device tree node alphabetically in exynos3250-rinato/monk.dts
> - Reorder the 'bus_xxx' device tree node alphabetically in exynos4412-trats/odroidu3
> - Add new exynos4412-ppmu-common.dtsi to remove the duplicate PPMU dt node
> on rinato/monk/trats2/odroid-u3 board
> - Add the log message if bus device is registered to devfreq framework successfully
> - Add the reviewed-by tag from Krzysztof Kozlowski
> - Add the tested-by tag from Anand Moon on Odroid U3
> - Add 'SAMSUNG BUS FREQUENCY DRIVER' entry to MAINTAINERS
>
> Changes from v1:
> (https://lkml.org/lkml/2015/11/26/260)
> - Check whether the instance of regulator is NULL or not
> when executing regulator_disable() because of only parent
> devfreq device has the regulator instance. After fixing it,
> the wake-up from suspend state is well working. (patch1)
> - Fix bug which checks 'bus-clk' instead of 'bus->regulator'
> after calling devm_clk_get() (on patch1)
> - Update the documentation to remove the description about
> DEVFREQ-EVENT subsystem (on patch2)
> - Add the full name of DMC (Dynamic Memory Controller) (on patch2)
> - Modify the detailed correlation of buses for Exynos3250
> on documentation (patch2)
> - Add the MFC bus node for Exynos3250 (on patch11, patch12)
> - Fix the duplicate frequency of bus_display on Exynos4x12.dtsi
> - Add the PPMU node for exynos4412-odroidu3
> - Add the support of bus frequency for exynos4412-odroidu3
>
>
> [Description]
> Detailed descirption for patch-set:
> 1. Add generic exynos bus frequency driver
> : This patch-set adds the generic exynos bus frequency driver for AXI bus
> of sub-blocks in exynos SoC. The Samsung Exynos SoC have the common
> architecture for bus between DRAM and sub-blocks in SoC.
>
> There are the different buses according to Exynos SoC because Exynos SoC
> has the differnt sub-blocks and bus speed. In spite of this difference
> among Exynos SoCs, this driver is able to support almost Exynos SoC by adding
> unique data of each bus in the devicetree file.
>
> In devicetree, each bus node has a bus clock, regulator, operation-point
> and devfreq-event devices which measure the utilization of each bus block.
>
> For example,
> - The bus of DMC block in exynos3250.dtsi are listed below:
>
> bus_dmc: bus_dmc {
> compatible = "samsung,exynos-bus";
> clocks = <&cmu_dmc CLK_DIV_DMC>;
> clock-names = "bus";
> operating-points-v2 = <&bus_dmc_opp_table>;
> status = "disabled";
> };
>
> bus_dmc_opp_table: opp_table1 {
> compatible = "operating-points-v2";
> opp-shared;
>
> opp@50000000 {
> opp-hz = /bits/ 64 <50000000>;
> opp-microvolt = <800000>;
> };
> opp@100000000 {
> opp-hz = /bits/ 64 <100000000>;
> opp-microvolt = <800000>;
> };
> opp@134000000 {
> opp-hz = /bits/ 64 <134000000>;
> opp-microvolt = <800000>;
> };
> opp@200000000 {
> opp-hz = /bits/ 64 <200000000>;
> opp-microvolt = <825000>;
> };
> opp@400000000 {
> opp-hz = /bits/ 64 <400000000>;
> opp-microvolt = <875000>;
> };
> };
>
> - Usage case to handle the frequency and voltage of bus on runtime
> in exynos3250-rinato.dts are listed below:
>
> &bus_dmc {
> devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
> vdd-supply = <&buck1_reg>; /* VDD_MIF */
> status = "okay";
> };
>
> 2. Add new passive governor of DEVFREQ framework
> : This patch-set add the new passive governor for DEVFREQ framework.
> The existing governors (ondemand, performance and so on) are used for DVFS
> (Dynamic Voltage and Frequency Scaling) drivers. The existing governors
> are independently used for specific device driver which don't give the
> influence to other device drviers and also don't receive the effect from
> other device drivers.
>
> The passive governor depends on operation of parent driver with existing
> governors(ondemand, performance and so on) extremely and is not able to
> decide the new frequency by oneself. According to the decided new frequency
> of parent driver with governor, the passive governor uses it to decide
> the appropriate frequency for own device driver. The passive governor
> must need the following information from device tree:
>
> For exameple,
> There are one more bus device drivers in Exynos3250 which need to
> change their source clock according to their utilization on runtime.
> But, they share the same power line (e.g., regulator). So, LEFTBUS bus
> driver is operated as parent with ondemand governor and then the rest
> device driver with passive governor.
>
> The buses of Internal block in exynos3250.dtsi are listed below:
> When LEFTBUS bus driver (parent) changes the bus frequency with
> ondemand governor on runtime, the rest bus devices which sharing
> the same power line (VDD_INT) will change the each bus frequency
> according to the decision of LEFTBUS bus driver (parent).
>
> - INT (Internal) block
> : VDD_INT |--- LEFTBUS
> |--- PERIL
> |--- MFC
> |--- G3D
> |--- RIGHTBUS
> |--- FSYS
> |--- LCD0
> |--- PERIR
> |--- ISP
> |--- CAM
>
> - The buss of INT block in exynos3250.dtsi are listed below:
> bus_leftbus: bus_leftbus {
> compatible = "samsung,exynos-bus";
> clocks = <&cmu CLK_DIV_GDL>;
> clock-names = "bus";
> operating-points-v2 = <&bus_leftbus_opp_table>;
> status = "disabled";
> };
>
> bus_rightbus: bus_rightbus {
> compatible = "samsung,exynos-bus";
> clocks = <&cmu CLK_DIV_GDR>;
> clock-names = "bus";
> operating-points-v2 = <&bus_leftbus_opp_table>;
> status = "disabled";
> };
>
> (Omit the rest bus dt node)
>
> - Usage case to handle the frequency and voltage of bus on runtime
> in exynos3250-rinato.dts are listed below:
> /* Parent bus device of VDD_INT */
> &bus_leftbus {
> devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
> vdd-supply = <&buck3_reg>;
> status = "okay";
> };
>
> /* Passive bus device depend on LEFTBUS bus. */
> &bus_rightbus {
> devfreq = <&bus_leftbus>; /* 'devfreq' property indicates
> the phandle of parent device. */
> status = "okay";
> };
>
> (Omit the rest bus dt node)
>
>
> Chanwoo Choi (20):
> PM / devfreq: exynos: Add generic exynos bus frequency driver
> PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver
> PM / devfreq: Add devfreq_get_devfreq_by_phandle()
> PM / devfreq: Add new DEVFREQ_TRANSITION_NOTIFIER notifier
> PM / devfreq: Add new passive governor
> PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor
> PM / devfreq: exynos: Update documentation for bus devices using passive governor
> PM / devfreq: exynos: Add the detailed correlation between sub-blocks and power line
> PM / devfreq: exynos: Remove unused exynos4/5 busfreq driver
> MAINTAINERS: Add samsung bus frequency driver entry
> ARM: dts: Add DMC bus node for Exynos3250
> ARM: dts: Add DMC bus frequency for exynos3250-rinato/monk
> ARM: dts: Add bus nodes using VDD_INT for Exynos3250
> ARM: dts: Add bus nodes using VDD_MIF for Exynos4x12
> ARM: dts: Add bus nodes using VDD_INT for Exynos4x12
> ARM: dts: Add bus nodes using VDD_MIF for Exynos4210
> ARM: dts: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes
> ARM: dts: Add support of bus frequency using VDD_INT for exynos3250-rinato
> ARM: dts: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3
> ARM: dts: Add support of bus frequency for exynos4412-trats/odroidu3
> .../devicetree/bindings/devfreq/exynos-bus.txt | 390 ++++++++
> MAINTAINERS | 9 +
> arch/arm/boot/dts/exynos3250-monk.dts | 47 +-
> arch/arm/boot/dts/exynos3250-rinato.dts | 88 +-
> arch/arm/boot/dts/exynos3250.dtsi | 181 ++++
> arch/arm/boot/dts/exynos4210.dtsi | 159 +++
> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 56 +-
> arch/arm/boot/dts/exynos4412-ppmu-common.dtsi | 50 +
> arch/arm/boot/dts/exynos4412-trats2.dts | 88 +-
> arch/arm/boot/dts/exynos4x12.dtsi | 174 ++++
> drivers/devfreq/Kconfig | 36 +-
> drivers/devfreq/Makefile | 4 +-
> drivers/devfreq/devfreq.c | 207 +++-
> drivers/devfreq/exynos-bus.c | 570 +++++++++++
> drivers/devfreq/exynos/Makefile | 3 -
> drivers/devfreq/exynos/exynos4_bus.c | 1055 --------------------
> drivers/devfreq/exynos/exynos4_bus.h | 110 --
> drivers/devfreq/exynos/exynos5_bus.c | 431 --------
> drivers/devfreq/exynos/exynos_ppmu.c | 119 ---
> drivers/devfreq/exynos/exynos_ppmu.h | 86 --
> drivers/devfreq/governor_passive.c | 207 ++++
> include/linux/devfreq.h | 99 ++
> 22 files changed, 2221 insertions(+), 1948 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt
> create mode 100644 arch/arm/boot/dts/exynos4412-ppmu-common.dtsi
> create mode 100644 drivers/devfreq/exynos-bus.c
> delete mode 100644 drivers/devfreq/exynos/Makefile
> delete mode 100644 drivers/devfreq/exynos/exynos4_bus.c
> delete mode 100644 drivers/devfreq/exynos/exynos4_bus.h
> delete mode 100644 drivers/devfreq/exynos/exynos5_bus.c
> delete mode 100644 drivers/devfreq/exynos/exynos_ppmu.c
> delete mode 100644 drivers/devfreq/exynos/exynos_ppmu.h
> create mode 100644 drivers/devfreq/governor_passive.c
>
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| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2016-04-11 22:00 +0200 |
| Subject | Re: [PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor |
| Message-ID | <rmQa5-2Qx-1@gated-at.bofh.it> |
| In reply to | #1375473 |
On Mon, Apr 11, 2016 at 01:01:18PM +0900, Chanwoo Choi wrote: > Dear Myungjoo and Krzysztof, > > This patch-set already get the acked-by or signed-off-by tag > from Exynos SoC and DEVFREQ maintainer except for patch10. > > If there is no comment, could you pick this patch-set? I cannot find any description of dependencies between the patches so I assume the obvious one: DTS patches do not depend on anything. This means that: 1. driver/devfreq related changes (including dt-bindings documentation) go to Myungjoo, 2. I can pick DTS changes. But first I would like to see the bindings documentation beeing applied by someone as a proof that there won't be more development in DTS in these series. There is no sense of picking DTS if after comments from Rob, you will rework them, right? Anyway I see Rob's questions. For these bindings I think you should get DT-guys ack first. Best regards, Krzysztof
[toc] | [prev] | [next] | [standalone]
| From | Chanwoo Choi <cwchoi00@gmail.com> |
|---|---|
| Date | 2016-04-11 22:20 +0200 |
| Subject | Re: [PATCH v9 00/20] PM / devferq: Add generic exynos bus frequency driver and new passive governor |
| Message-ID | <rmQts-3h1-9@gated-at.bofh.it> |
| In reply to | #1376257 |
Hi Krzysztof, On Tue, Apr 12, 2016 at 4:55 AM, Krzysztof Kozlowski <k.kozlowski@samsung.com> wrote: > On Mon, Apr 11, 2016 at 01:01:18PM +0900, Chanwoo Choi wrote: >> Dear Myungjoo and Krzysztof, >> >> This patch-set already get the acked-by or signed-off-by tag >> from Exynos SoC and DEVFREQ maintainer except for patch10. >> >> If there is no comment, could you pick this patch-set? > > I cannot find any description of dependencies between the patches so I > assume the obvious one: DTS patches do not depend on anything. This > means that: > 1. driver/devfreq related changes (including dt-bindings documentation) > go to Myungjoo, > 2. I can pick DTS changes. Yes. > > But first I would like to see the bindings documentation beeing applied > by someone as a proof that there won't be more development in DTS in > these series. There is no sense of picking DTS if after comments from > Rob, you will rework them, right? I already discussed the Rob's question on December, last year on patchset[1]. But, after that, I didn't receive the any reply from him. [1] https://lkml.org/lkml/2015/12/10/943 So, I thought that there is no comment. But, today, he give some question after 4 months. But I'll again reply to Rob's question. > > Anyway I see Rob's questions. For these bindings I think you should get > DT-guys ack first. OK. Best Regards, Chanwoo Choi
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| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-04-11 06:10 +0200 |
| Subject | [PATCH v9 02/20] PM / devfreq: exynos: Add documentation for generic exynos bus frequency driver |
| Message-ID | <rmBkL-88x-35@gated-at.bofh.it> |
| In reply to | #1375472 |
This patch adds the documentation for generic exynos bus frequency
driver.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 95 ++++++++++++++++++++++
1 file changed, 95 insertions(+)
create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt
diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
new file mode 100644
index 000000000000..78171b918e3f
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -0,0 +1,95 @@
+* Generic Exynos Bus frequency device
+
+The Samsung Exynos SoC has many buses for data transfer between DRAM
+and sub-blocks in SoC. Most Exynos SoCs share the common architecture
+for buses. Generally, each bus of Exynos SoC includes a source clock
+and a power line, which are able to change the clock frequency
+of the bus in runtime. To monitor the usage of each bus in runtime,
+the driver uses the PPMU (Platform Performance Monitoring Unit), which
+is able to measure the current load of sub-blocks.
+
+There are a little different composition among Exynos SoC because each Exynos
+SoC has different sub-blocks. Therefore, shch difference should be specified
+in devicetree file instead of each device driver. In result, this driver
+is able to support the bus frequency for all Exynos SoCs.
+
+Required properties for bus device:
+- compatible: Should be "samsung,exynos-bus".
+- clock-names : the name of clock used by the bus, "bus".
+- clocks : phandles for clock specified in "clock-names" property.
+- operating-points-v2: the OPP table including frequency/voltage information
+ to support DVFS (Dynamic Voltage/Frequency Scaling) feature.
+- vdd-supply: the regulator to provide the buses with the voltage.
+- devfreq-events: the devfreq-event device to monitor the current utilization
+ of buses.
+
+Optional properties for bus device:
+- exynos,saturation-ratio: the percentage value which is used to calibrate
+ the performance count against total cycle count.
+- exynos,voltage-tolerance: the percentage value for bus voltage tolerance
+ which is used to calculate the max voltage.
+
+Example1:
+ Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to
+ power line (regulator). The MIF (Memory Interface) AXI bus is used to
+ transfer data between DRAM and CPU and uses the VDD_MIF regualtor.
+
+ - power line(VDD_MIF) --> bus for DMC (Dynamic Memory Controller) block
+
+ - MIF bus's frequency/voltage table
+ -----------------------
+ |Lv| Freq | Voltage |
+ -----------------------
+ |L1| 50000 |800000 |
+ |L2| 100000 |800000 |
+ |L3| 134000 |800000 |
+ |L4| 200000 |825000 |
+ |L5| 400000 |875000 |
+ -----------------------
+
+Example2 :
+ The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi
+ is listed below:
+
+ bus_dmc: bus_dmc {
+ compatible = "samsung,exynos-bus";
+ clocks = <&cmu_dmc CLK_DIV_DMC>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_dmc_opp_table>;
+ status = "disabled";
+ };
+
+ bus_dmc_opp_table: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@50000000 {
+ opp-hz = /bits/ 64 <50000000>;
+ opp-microvolt = <800000>;
+ };
+ opp@100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <800000>;
+ };
+ opp@134000000 {
+ opp-hz = /bits/ 64 <134000000>;
+ opp-microvolt = <800000>;
+ };
+ opp@200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <825000>;
+ };
+ opp@400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <875000>;
+ };
+ };
+
+ Usage case to handle the frequency and voltage of bus on runtime
+ in exynos3250-rinato.dts is listed below:
+
+ &bus_dmc {
+ devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+ vdd-supply = <&buck1_reg>; /* VDD_MIF */
+ status = "okay";
+ };
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-04-11 06:10 +0200 |
| Subject | [PATCH v9 06/20] PM / devfreq: exynos: Add support of bus frequency of sub-blocks using passive governor |
| Message-ID | <rmBkL-88x-29@gated-at.bofh.it> |
| In reply to | #1375472 |
This patch adds the support of bus frequency feature for sub-blocks which share
the one power line. If each bus depends on the power line, each bus is not able
to change the voltage by oneself. To optimize the power-consumption on runtime,
some buses using the same power line should change the source clock and
regulator at the same time. So, this patch uses the passive governor to support
the bus frequency for all buses which sharing the one power line.
For example,
Exynos3250 include the two power line for AXI buses as following:
: VDD_MIF : MIF (Memory Interface) provide the DMC (Dynamic Memory Controller)
with the power (regulator).
: VDD_INT : INT (Internal) provide the various sub-blocks with the power
(regulator).
Each bus is included in as follwoing block. In the case of VDD_MIF, only DMC bus
use the power line. So, there is no any depencency between buese. But, in the
case of VDD_INT, various buses share the one power line of VDD_INT. We need to
make the depenency between buses. When using passive governor, there is no
problem to support the bus frequency as DVFS for all buses. One bus should be
operated as the parent bus device which gathering the current load of INT block
and then decides the new frequency with some governors except of passive
governor. After deciding the new frequency by the parent bus device, the rest
bus devices will change the each source clock according to new frequency of the
parent bus device.
- MIF (Memory Interface) block
: VDD_MIF |--- DMC
- INT (Internal) block
: VDD_INT |--- LEFTBUS (parent)
|--- PERIL
|--- MFC
|--- G3D
|--- RIGHTBUS
|--- FSYS
|--- LCD0
|--- PERIR
|--- ISP
|--- CAM
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[tjakobi: Reported debugfs error during booting and cw00.choi fix it.]
Reported-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
---
drivers/devfreq/Kconfig | 1 +
drivers/devfreq/exynos-bus.c | 219 ++++++++++++++++++++++++++++++++++---------
2 files changed, 174 insertions(+), 46 deletions(-)
diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index d260cd0219f6..30e1daf1c827 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -78,6 +78,7 @@ config ARM_EXYNOS_BUS_DEVFREQ
bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
depends on ARCH_EXYNOS
select DEVFREQ_GOV_SIMPLE_ONDEMAND
+ select DEVFREQ_GOV_PASSIVE
select DEVFREQ_EVENT_EXYNOS_PPMU
select PM_DEVFREQ_EVENT
select PM_OPP
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
index 137de6196af3..50fe1a16c574 100644
--- a/drivers/devfreq/exynos-bus.c
+++ b/drivers/devfreq/exynos-bus.c
@@ -1,7 +1,7 @@
/*
* Generic Exynos Bus frequency driver with DEVFREQ Framework
*
- * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
* Author : Chanwoo Choi <cw00.choi@samsung.com>
*
* This driver support Exynos Bus frequency feature by using
@@ -93,7 +93,7 @@ static int exynos_bus_get_event(struct exynos_bus *bus,
}
/*
- * Must necessary function for devfreq governor
+ * Must necessary function for devfreq simple-ondemand governor
*/
static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 flags)
{
@@ -202,59 +202,81 @@ static void exynos_bus_exit(struct device *dev)
regulator_disable(bus->regulator);
dev_pm_opp_of_remove_table(dev);
+ clk_disable_unprepare(bus->clk);
}
-static int exynos_bus_parse_of(struct device_node *np,
- struct exynos_bus *bus)
+/*
+ * Must necessary function for devfreq passive governor
+ */
+static int exynos_bus_passive_target(struct device *dev, unsigned long *freq,
+ u32 flags)
{
- struct device *dev = bus->dev;
- unsigned long rate;
- int i, ret, count, size;
+ struct exynos_bus *bus = dev_get_drvdata(dev);
+ struct dev_pm_opp *new_opp;
+ unsigned long old_freq, new_freq;
+ int ret = 0;
- /* Get the clock to provide each bus with source clock */
- bus->clk = devm_clk_get(dev, "bus");
- if (IS_ERR(bus->clk)) {
- dev_err(dev, "failed to get bus clock\n");
- return PTR_ERR(bus->clk);
+ /* Get new opp-bus instance according to new bus clock */
+ rcu_read_lock();
+ new_opp = devfreq_recommended_opp(dev, freq, flags);
+ if (IS_ERR(new_opp)) {
+ dev_err(dev, "failed to get recommended opp instance\n");
+ rcu_read_unlock();
+ return PTR_ERR(new_opp);
}
- ret = clk_prepare_enable(bus->clk);
- if (ret < 0) {
- dev_err(dev, "failed to get enable clock\n");
- return ret;
- }
+ new_freq = dev_pm_opp_get_freq(new_opp);
+ old_freq = dev_pm_opp_get_freq(bus->curr_opp);
+ rcu_read_unlock();
- /* Get the freq/voltage OPP table to scale the bus frequency */
- rcu_read_lock();
- ret = dev_pm_opp_of_add_table(dev);
+ if (old_freq == new_freq)
+ return 0;
+
+ /* Change the frequency according to new OPP level */
+ mutex_lock(&bus->lock);
+
+ ret = clk_set_rate(bus->clk, new_freq);
if (ret < 0) {
- dev_err(dev, "failed to get OPP table\n");
- rcu_read_unlock();
- goto err_clk;
+ dev_err(dev, "failed to set the clock of bus\n");
+ goto out;
}
- rate = clk_get_rate(bus->clk);
- bus->curr_opp = dev_pm_opp_find_freq_ceil(dev, &rate);
- if (IS_ERR(bus->curr_opp)) {
- dev_err(dev, "failed to find dev_pm_opp\n");
- rcu_read_unlock();
- ret = PTR_ERR(bus->curr_opp);
- goto err_opp;
- }
- rcu_read_unlock();
+ *freq = new_freq;
+ bus->curr_opp = new_opp;
+
+ dev_dbg(dev, "Set the frequency of bus (%lukHz -> %lukHz)\n",
+ old_freq/1000, new_freq/1000);
+out:
+ mutex_unlock(&bus->lock);
+
+ return ret;
+}
+
+static void exynos_bus_passive_exit(struct device *dev)
+{
+ struct exynos_bus *bus = dev_get_drvdata(dev);
+
+ dev_pm_opp_of_remove_table(dev);
+ clk_disable_unprepare(bus->clk);
+}
+
+static int exynos_bus_parent_parse_of(struct device_node *np,
+ struct exynos_bus *bus)
+{
+ struct device *dev = bus->dev;
+ int i, ret, count, size;
/* Get the regulator to provide each bus with the power */
bus->regulator = devm_regulator_get(dev, "vdd");
if (IS_ERR(bus->regulator)) {
dev_err(dev, "failed to get VDD regulator\n");
- ret = PTR_ERR(bus->regulator);
- goto err_opp;
+ return PTR_ERR(bus->regulator);
}
ret = regulator_enable(bus->regulator);
if (ret < 0) {
dev_err(dev, "failed to enable VDD regulator\n");
- goto err_opp;
+ return ret;
}
/*
@@ -305,6 +327,51 @@ static int exynos_bus_parse_of(struct device_node *np,
err_regulator:
regulator_disable(bus->regulator);
+
+ return ret;
+}
+
+static int exynos_bus_parse_of(struct device_node *np,
+ struct exynos_bus *bus)
+{
+ struct device *dev = bus->dev;
+ unsigned long rate;
+ int ret;
+
+ /* Get the clock to provide each bus with source clock */
+ bus->clk = devm_clk_get(dev, "bus");
+ if (IS_ERR(bus->clk)) {
+ dev_err(dev, "failed to get bus clock\n");
+ return PTR_ERR(bus->clk);
+ }
+
+ ret = clk_prepare_enable(bus->clk);
+ if (ret < 0) {
+ dev_err(dev, "failed to get enable clock\n");
+ return ret;
+ }
+
+ /* Get the freq and voltage from OPP table to scale the bus freq */
+ rcu_read_lock();
+ ret = dev_pm_opp_of_add_table(dev);
+ if (ret < 0) {
+ dev_err(dev, "failed to get OPP table\n");
+ rcu_read_unlock();
+ goto err_clk;
+ }
+
+ rate = clk_get_rate(bus->clk);
+ bus->curr_opp = devfreq_recommended_opp(dev, &rate, 0);
+ if (IS_ERR(bus->curr_opp)) {
+ dev_err(dev, "failed to find dev_pm_opp\n");
+ rcu_read_unlock();
+ ret = PTR_ERR(bus->curr_opp);
+ goto err_opp;
+ }
+ rcu_read_unlock();
+
+ return 0;
+
err_opp:
dev_pm_opp_of_remove_table(dev);
err_clk:
@@ -319,8 +386,11 @@ static int exynos_bus_probe(struct platform_device *pdev)
struct device_node *np = dev->of_node;
struct devfreq_dev_profile *profile;
struct devfreq_simple_ondemand_data *ondemand_data;
+ struct devfreq_passive_data *passive_data;
+ struct devfreq *parent_devfreq;
struct exynos_bus *bus;
- int ret;
+ int ret, max_state;
+ unsigned long min_freq, max_freq;
if (!np) {
dev_err(dev, "failed to find devicetree node\n");
@@ -337,20 +407,33 @@ static int exynos_bus_probe(struct platform_device *pdev)
/* Parse the device-tree to get the resource information */
ret = exynos_bus_parse_of(np, bus);
if (ret < 0)
- return ret;
+ goto err;
- /* Initalize the struct profile and governor data */
profile = devm_kzalloc(dev, sizeof(*profile), GFP_KERNEL);
- if (!profile)
- return -ENOMEM;
+ if (!profile) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ if (of_parse_phandle(dev->of_node, "devfreq", 0))
+ goto passive;
+ else
+ ret = exynos_bus_parent_parse_of(np, bus);
+
+ if (ret < 0)
+ goto err;
+
+ /* Initalize the struct profile and governor data for parent device */
profile->polling_ms = 50;
profile->target = exynos_bus_target;
profile->get_dev_status = exynos_bus_get_dev_status;
profile->exit = exynos_bus_exit;
ondemand_data = devm_kzalloc(dev, sizeof(*ondemand_data), GFP_KERNEL);
- if (!ondemand_data)
- return -ENOMEM;
+ if (!ondemand_data) {
+ ret = -ENOMEM;
+ goto err;
+ }
ondemand_data->upthreshold = 40;
ondemand_data->downdifferential = 5;
@@ -359,14 +442,15 @@ static int exynos_bus_probe(struct platform_device *pdev)
ondemand_data);
if (IS_ERR(bus->devfreq)) {
dev_err(dev, "failed to add devfreq device\n");
- return PTR_ERR(bus->devfreq);
+ ret = PTR_ERR(bus->devfreq);
+ goto err;
}
/* Register opp_notifier to catch the change of OPP */
ret = devm_devfreq_register_opp_notifier(dev, bus->devfreq);
if (ret < 0) {
dev_err(dev, "failed to register opp notifier\n");
- return ret;
+ goto err;
}
/*
@@ -376,16 +460,59 @@ static int exynos_bus_probe(struct platform_device *pdev)
ret = exynos_bus_enable_edev(bus);
if (ret < 0) {
dev_err(dev, "failed to enable devfreq-event devices\n");
- return ret;
+ goto err;
}
ret = exynos_bus_set_event(bus);
if (ret < 0) {
dev_err(dev, "failed to set event to devfreq-event devices\n");
- return ret;
+ goto err;
}
+ goto out;
+passive:
+ /* Initalize the struct profile and governor data for passive device */
+ profile->target = exynos_bus_passive_target;
+ profile->exit = exynos_bus_passive_exit;
+
+ /* Get the instance of parent devfreq device */
+ parent_devfreq = devfreq_get_devfreq_by_phandle(dev, 0);
+ if (IS_ERR(parent_devfreq)) {
+ ret = -EPROBE_DEFER;
+ goto err;
+ }
+
+ passive_data = devm_kzalloc(dev, sizeof(*passive_data), GFP_KERNEL);
+ if (!passive_data) {
+ ret = -ENOMEM;
+ goto err;
+ }
+ passive_data->parent = parent_devfreq;
+
+ /* Add devfreq device for exynos bus with passive governor */
+ bus->devfreq = devm_devfreq_add_device(dev, profile, "passive",
+ passive_data);
+ if (IS_ERR(bus->devfreq)) {
+ dev_err(dev,
+ "failed to add devfreq dev with passive governor\n");
+ ret = -EPROBE_DEFER;
+ goto err;
+ }
+
+out:
+ max_state = bus->devfreq->profile->max_state;
+ min_freq = (bus->devfreq->profile->freq_table[0] / 1000);
+ max_freq = (bus->devfreq->profile->freq_table[max_state - 1] / 1000);
+ pr_info("exynos-bus: new bus device registered: %s (%6ld KHz ~ %6ld KHz)\n",
+ dev_name(dev), min_freq, max_freq);
+
return 0;
+
+err:
+ dev_pm_opp_of_remove_table(dev);
+ clk_disable_unprepare(bus->clk);
+
+ return ret;
}
#ifdef CONFIG_PM_SLEEP
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-04-11 06:10 +0200 |
| Subject | [PATCH v9 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver |
| Message-ID | <rmBkL-88x-31@gated-at.bofh.it> |
| In reply to | #1375472 |
This patch adds the generic exynos bus frequency driver for AMBA AXI bus
of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC
have the common architecture for bus between DRAM and sub-blocks in SoC.
This driver can support the generic bus frequency driver for Exynos SoCs.
In devicetree, Each bus block has a bus clock, regulator, operation-point
and devfreq-event devices which measure the utilization of each bus block.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
---
drivers/devfreq/Kconfig | 15 ++
drivers/devfreq/Makefile | 1 +
drivers/devfreq/exynos-bus.c | 443 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 459 insertions(+)
create mode 100644 drivers/devfreq/exynos-bus.c
diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig
index 4de78c552251..cedda8f1e5eb 100644
--- a/drivers/devfreq/Kconfig
+++ b/drivers/devfreq/Kconfig
@@ -66,6 +66,21 @@ config DEVFREQ_GOV_USERSPACE
comment "DEVFREQ Drivers"
+config ARM_EXYNOS_BUS_DEVFREQ
+ bool "ARM EXYNOS Generic Memory Bus DEVFREQ Driver"
+ depends on ARCH_EXYNOS
+ select DEVFREQ_GOV_SIMPLE_ONDEMAND
+ select DEVFREQ_EVENT_EXYNOS_PPMU
+ select PM_DEVFREQ_EVENT
+ select PM_OPP
+ help
+ This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
+ Memory bus has one more group of memory bus (e.g, MIF and INT block).
+ Each memory bus group could contain many memoby bus block. It reads
+ PPMU counters of memory controllers by using DEVFREQ-event device
+ and adjusts the operating frequencies and voltages with OPP support.
+ This does not yet operate with optimal voltages.
+
config ARM_EXYNOS4_BUS_DEVFREQ
bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
depends on (CPU_EXYNOS4210 || SOC_EXYNOS4212 || SOC_EXYNOS4412) && !ARCH_MULTIPLATFORM
diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile
index 5134f9ee983d..8af8aaf922a8 100644
--- a/drivers/devfreq/Makefile
+++ b/drivers/devfreq/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_DEVFREQ_GOV_POWERSAVE) += governor_powersave.o
obj-$(CONFIG_DEVFREQ_GOV_USERSPACE) += governor_userspace.o
# DEVFREQ Drivers
+obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o
obj-$(CONFIG_ARM_EXYNOS4_BUS_DEVFREQ) += exynos/
obj-$(CONFIG_ARM_EXYNOS5_BUS_DEVFREQ) += exynos/
obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra-devfreq.o
diff --git a/drivers/devfreq/exynos-bus.c b/drivers/devfreq/exynos-bus.c
new file mode 100644
index 000000000000..137de6196af3
--- /dev/null
+++ b/drivers/devfreq/exynos-bus.c
@@ -0,0 +1,443 @@
+/*
+ * Generic Exynos Bus frequency driver with DEVFREQ Framework
+ *
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * Author : Chanwoo Choi <cw00.choi@samsung.com>
+ *
+ * This driver support Exynos Bus frequency feature by using
+ * DEVFREQ framework and is based on drivers/devfreq/exynos/exynos4_bus.c.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/devfreq.h>
+#include <linux/devfreq-event.h>
+#include <linux/device.h>
+#include <linux/export.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/pm_opp.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+
+#define DEFAULT_SATURATION_RATIO 40
+#define DEFAULT_VOLTAGE_TOLERANCE 2
+
+struct exynos_bus {
+ struct device *dev;
+
+ struct devfreq *devfreq;
+ struct devfreq_event_dev **edev;
+ unsigned int edev_count;
+ struct mutex lock;
+
+ struct dev_pm_opp *curr_opp;
+
+ struct regulator *regulator;
+ struct clk *clk;
+ unsigned int voltage_tolerance;
+ unsigned int ratio;
+};
+
+/*
+ * Control the devfreq-event device to get the current state of bus
+ */
+#define exynos_bus_ops_edev(ops) \
+static int exynos_bus_##ops(struct exynos_bus *bus) \
+{ \
+ int i, ret; \
+ \
+ for (i = 0; i < bus->edev_count; i++) { \
+ if (!bus->edev[i]) \
+ continue; \
+ ret = devfreq_event_##ops(bus->edev[i]); \
+ if (ret < 0) \
+ return ret; \
+ } \
+ \
+ return 0; \
+}
+exynos_bus_ops_edev(enable_edev);
+exynos_bus_ops_edev(disable_edev);
+exynos_bus_ops_edev(set_event);
+
+static int exynos_bus_get_event(struct exynos_bus *bus,
+ struct devfreq_event_data *edata)
+{
+ struct devfreq_event_data event_data;
+ unsigned long load_count = 0, total_count = 0;
+ int i, ret = 0;
+
+ for (i = 0; i < bus->edev_count; i++) {
+ if (!bus->edev[i])
+ continue;
+
+ ret = devfreq_event_get_event(bus->edev[i], &event_data);
+ if (ret < 0)
+ return ret;
+
+ if (i == 0 || event_data.load_count > load_count) {
+ load_count = event_data.load_count;
+ total_count = event_data.total_count;
+ }
+ }
+
+ edata->load_count = load_count;
+ edata->total_count = total_count;
+
+ return ret;
+}
+
+/*
+ * Must necessary function for devfreq governor
+ */
+static int exynos_bus_target(struct device *dev, unsigned long *freq, u32 flags)
+{
+ struct exynos_bus *bus = dev_get_drvdata(dev);
+ struct dev_pm_opp *new_opp;
+ unsigned long old_freq, new_freq, old_volt, new_volt, tol;
+ int ret = 0;
+
+ /* Get new opp-bus instance according to new bus clock */
+ rcu_read_lock();
+ new_opp = devfreq_recommended_opp(dev, freq, flags);
+ if (IS_ERR(new_opp)) {
+ dev_err(dev, "failed to get recommended opp instance\n");
+ rcu_read_unlock();
+ return PTR_ERR(new_opp);
+ }
+
+ new_freq = dev_pm_opp_get_freq(new_opp);
+ new_volt = dev_pm_opp_get_voltage(new_opp);
+ old_freq = dev_pm_opp_get_freq(bus->curr_opp);
+ old_volt = dev_pm_opp_get_voltage(bus->curr_opp);
+ rcu_read_unlock();
+
+ if (old_freq == new_freq)
+ return 0;
+ tol = new_volt * bus->voltage_tolerance / 100;
+
+ /* Change voltage and frequency according to new OPP level */
+ mutex_lock(&bus->lock);
+
+ if (old_freq < new_freq) {
+ ret = regulator_set_voltage_tol(bus->regulator, new_volt, tol);
+ if (ret < 0) {
+ dev_err(bus->dev, "failed to set voltage\n");
+ goto out;
+ }
+ }
+
+ ret = clk_set_rate(bus->clk, new_freq);
+ if (ret < 0) {
+ dev_err(dev, "failed to change clock of bus\n");
+ clk_set_rate(bus->clk, old_freq);
+ goto out;
+ }
+
+ if (old_freq > new_freq) {
+ ret = regulator_set_voltage_tol(bus->regulator, new_volt, tol);
+ if (ret < 0) {
+ dev_err(bus->dev, "failed to set voltage\n");
+ goto out;
+ }
+ }
+ bus->curr_opp = new_opp;
+
+ dev_dbg(dev, "Set the frequency of bus (%lukHz -> %lukHz)\n",
+ old_freq/1000, new_freq/1000);
+out:
+ mutex_unlock(&bus->lock);
+
+ return ret;
+}
+
+static int exynos_bus_get_dev_status(struct device *dev,
+ struct devfreq_dev_status *stat)
+{
+ struct exynos_bus *bus = dev_get_drvdata(dev);
+ struct devfreq_event_data edata;
+ int ret;
+
+ rcu_read_lock();
+ stat->current_frequency = dev_pm_opp_get_freq(bus->curr_opp);
+ rcu_read_unlock();
+
+ ret = exynos_bus_get_event(bus, &edata);
+ if (ret < 0) {
+ stat->total_time = stat->busy_time = 0;
+ goto err;
+ }
+
+ stat->busy_time = (edata.load_count * 100) / bus->ratio;
+ stat->total_time = edata.total_count;
+
+ dev_dbg(dev, "Usage of devfreq-event : %lu/%lu\n", stat->busy_time,
+ stat->total_time);
+
+err:
+ ret = exynos_bus_set_event(bus);
+ if (ret < 0) {
+ dev_err(dev, "failed to set event to devfreq-event devices\n");
+ return ret;
+ }
+
+ return ret;
+}
+
+static void exynos_bus_exit(struct device *dev)
+{
+ struct exynos_bus *bus = dev_get_drvdata(dev);
+ int ret;
+
+ ret = exynos_bus_disable_edev(bus);
+ if (ret < 0)
+ dev_warn(dev, "failed to disable the devfreq-event devices\n");
+
+ if (bus->regulator)
+ regulator_disable(bus->regulator);
+
+ dev_pm_opp_of_remove_table(dev);
+}
+
+static int exynos_bus_parse_of(struct device_node *np,
+ struct exynos_bus *bus)
+{
+ struct device *dev = bus->dev;
+ unsigned long rate;
+ int i, ret, count, size;
+
+ /* Get the clock to provide each bus with source clock */
+ bus->clk = devm_clk_get(dev, "bus");
+ if (IS_ERR(bus->clk)) {
+ dev_err(dev, "failed to get bus clock\n");
+ return PTR_ERR(bus->clk);
+ }
+
+ ret = clk_prepare_enable(bus->clk);
+ if (ret < 0) {
+ dev_err(dev, "failed to get enable clock\n");
+ return ret;
+ }
+
+ /* Get the freq/voltage OPP table to scale the bus frequency */
+ rcu_read_lock();
+ ret = dev_pm_opp_of_add_table(dev);
+ if (ret < 0) {
+ dev_err(dev, "failed to get OPP table\n");
+ rcu_read_unlock();
+ goto err_clk;
+ }
+
+ rate = clk_get_rate(bus->clk);
+ bus->curr_opp = dev_pm_opp_find_freq_ceil(dev, &rate);
+ if (IS_ERR(bus->curr_opp)) {
+ dev_err(dev, "failed to find dev_pm_opp\n");
+ rcu_read_unlock();
+ ret = PTR_ERR(bus->curr_opp);
+ goto err_opp;
+ }
+ rcu_read_unlock();
+
+ /* Get the regulator to provide each bus with the power */
+ bus->regulator = devm_regulator_get(dev, "vdd");
+ if (IS_ERR(bus->regulator)) {
+ dev_err(dev, "failed to get VDD regulator\n");
+ ret = PTR_ERR(bus->regulator);
+ goto err_opp;
+ }
+
+ ret = regulator_enable(bus->regulator);
+ if (ret < 0) {
+ dev_err(dev, "failed to enable VDD regulator\n");
+ goto err_opp;
+ }
+
+ /*
+ * Get the devfreq-event devices to get the current utilization of
+ * buses. This raw data will be used in devfreq ondemand governor.
+ */
+ count = devfreq_event_get_edev_count(dev);
+ if (count < 0) {
+ dev_err(dev, "failed to get the count of devfreq-event dev\n");
+ ret = count;
+ goto err_regulator;
+ }
+ bus->edev_count = count;
+
+ size = sizeof(*bus->edev) * count;
+ bus->edev = devm_kzalloc(dev, size, GFP_KERNEL);
+ if (!bus->edev) {
+ ret = -ENOMEM;
+ goto err_regulator;
+ }
+
+ for (i = 0; i < count; i++) {
+ bus->edev[i] = devfreq_event_get_edev_by_phandle(dev, i);
+ if (IS_ERR(bus->edev[i])) {
+ ret = -EPROBE_DEFER;
+ goto err_regulator;
+ }
+ }
+
+ /*
+ * Optionally, Get the saturation ratio according to Exynos SoC
+ * When measuring the utilization of each AXI bus with devfreq-event
+ * devices, the measured real cycle might be much lower than the
+ * total cycle of bus during sampling rate. In result, the devfreq
+ * simple-ondemand governor might not decide to change the current
+ * frequency due to too utilization (= real cycle/total cycle).
+ * So, this property is used to adjust the utilization when calculating
+ * the busy_time in exynos_bus_get_dev_status().
+ */
+ if (of_property_read_u32(np, "exynos,saturation-ratio", &bus->ratio))
+ bus->ratio = DEFAULT_SATURATION_RATIO;
+
+ if (of_property_read_u32(np, "exynos,voltage-tolerance",
+ &bus->voltage_tolerance))
+ bus->voltage_tolerance = DEFAULT_VOLTAGE_TOLERANCE;
+
+ return 0;
+
+err_regulator:
+ regulator_disable(bus->regulator);
+err_opp:
+ dev_pm_opp_of_remove_table(dev);
+err_clk:
+ clk_disable_unprepare(bus->clk);
+
+ return ret;
+}
+
+static int exynos_bus_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct devfreq_dev_profile *profile;
+ struct devfreq_simple_ondemand_data *ondemand_data;
+ struct exynos_bus *bus;
+ int ret;
+
+ if (!np) {
+ dev_err(dev, "failed to find devicetree node\n");
+ return -EINVAL;
+ }
+
+ bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL);
+ if (!bus)
+ return -ENOMEM;
+ mutex_init(&bus->lock);
+ bus->dev = &pdev->dev;
+ platform_set_drvdata(pdev, bus);
+
+ /* Parse the device-tree to get the resource information */
+ ret = exynos_bus_parse_of(np, bus);
+ if (ret < 0)
+ return ret;
+
+ /* Initalize the struct profile and governor data */
+ profile = devm_kzalloc(dev, sizeof(*profile), GFP_KERNEL);
+ if (!profile)
+ return -ENOMEM;
+ profile->polling_ms = 50;
+ profile->target = exynos_bus_target;
+ profile->get_dev_status = exynos_bus_get_dev_status;
+ profile->exit = exynos_bus_exit;
+
+ ondemand_data = devm_kzalloc(dev, sizeof(*ondemand_data), GFP_KERNEL);
+ if (!ondemand_data)
+ return -ENOMEM;
+ ondemand_data->upthreshold = 40;
+ ondemand_data->downdifferential = 5;
+
+ /* Add devfreq device to monitor and handle the exynos bus */
+ bus->devfreq = devm_devfreq_add_device(dev, profile, "simple_ondemand",
+ ondemand_data);
+ if (IS_ERR(bus->devfreq)) {
+ dev_err(dev, "failed to add devfreq device\n");
+ return PTR_ERR(bus->devfreq);
+ }
+
+ /* Register opp_notifier to catch the change of OPP */
+ ret = devm_devfreq_register_opp_notifier(dev, bus->devfreq);
+ if (ret < 0) {
+ dev_err(dev, "failed to register opp notifier\n");
+ return ret;
+ }
+
+ /*
+ * Enable devfreq-event to get raw data which is used to determine
+ * current bus load.
+ */
+ ret = exynos_bus_enable_edev(bus);
+ if (ret < 0) {
+ dev_err(dev, "failed to enable devfreq-event devices\n");
+ return ret;
+ }
+
+ ret = exynos_bus_set_event(bus);
+ if (ret < 0) {
+ dev_err(dev, "failed to set event to devfreq-event devices\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int exynos_bus_resume(struct device *dev)
+{
+ struct exynos_bus *bus = dev_get_drvdata(dev);
+ int ret;
+
+ ret = exynos_bus_enable_edev(bus);
+ if (ret < 0) {
+ dev_err(dev, "failed to enable the devfreq-event devices\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int exynos_bus_suspend(struct device *dev)
+{
+ struct exynos_bus *bus = dev_get_drvdata(dev);
+ int ret;
+
+ ret = exynos_bus_disable_edev(bus);
+ if (ret < 0) {
+ dev_err(dev, "failed to disable the devfreq-event devices\n");
+ return ret;
+ }
+
+ return 0;
+}
+#endif
+
+static const struct dev_pm_ops exynos_bus_pm = {
+ SET_SYSTEM_SLEEP_PM_OPS(exynos_bus_suspend, exynos_bus_resume)
+};
+
+static const struct of_device_id exynos_bus_of_match[] = {
+ { .compatible = "samsung,exynos-bus", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, exynos_bus_of_match);
+
+static struct platform_driver exynos_bus_platdrv = {
+ .probe = exynos_bus_probe,
+ .driver = {
+ .name = "exynos-bus",
+ .pm = &exynos_bus_pm,
+ .of_match_table = of_match_ptr(exynos_bus_of_match),
+ },
+};
+module_platform_driver(exynos_bus_platdrv);
+
+MODULE_DESCRIPTION("Generic Exynos Bus frequency driver");
+MODULE_AUTHOR("Chanwoo Choi <cw00.choi@samsung.com>");
+MODULE_LICENSE("GPL v2");
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Krzysztof Kozlowski <k.kozlowski@samsung.com> |
|---|---|
| Date | 2016-04-12 09:30 +0200 |
| Subject | Re: [PATCH v9 01/20] PM / devfreq: exynos: Add generic exynos bus frequency driver |
| Message-ID | <rn0VQ-3lD-5@gated-at.bofh.it> |
| In reply to | #1375478 |
On 04/11/2016 05:57 AM, Chanwoo Choi wrote: > This patch adds the generic exynos bus frequency driver for AMBA AXI bus > of sub-blocks in exynos SoC with DEVFREQ framework. The Samsung Exynos SoC > have the common architecture for bus between DRAM and sub-blocks in SoC. > This driver can support the generic bus frequency driver for Exynos SoCs. > > In devicetree, Each bus block has a bus clock, regulator, operation-point > and devfreq-event devices which measure the utilization of each bus block. > > Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> > [m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board] > Tested-by: Markus Reichl <m.reichl@fivetechno.de> > Tested-by: Anand Moon <linux.amoon@gmail.com> > Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com> > --- > drivers/devfreq/Kconfig | 15 ++ > drivers/devfreq/Makefile | 1 + > drivers/devfreq/exynos-bus.c | 443 +++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 459 insertions(+) > create mode 100644 drivers/devfreq/exynos-bus.c Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Best regards, Krzysztof
[toc] | [prev] | [next] | [standalone]
| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-04-11 06:10 +0200 |
| Subject | [PATCH v9 12/20] ARM: dts: Add DMC bus frequency for exynos3250-rinato/monk |
| Message-ID | <rmBkL-88x-33@gated-at.bofh.it> |
| In reply to | #1375472 |
This patch adds the DMC (Dynamic Memory Controller) bus frequency node
which includes the devfreq-events and regulator properties. The bus
frequency support the DVFS (Dynamic Voltage Frequency Scaling) feature
with ondemand governor.
The devfreq-events (ppmu_dmc0*) can monitor the utilization of DMC bus
on runtime and the buck1_reg (VDD_MIF power line) supplies the power to
the DMC block.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
---
arch/arm/boot/dts/exynos3250-monk.dts | 6 ++++++
arch/arm/boot/dts/exynos3250-rinato.dts | 6 ++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts
index 9e2840b59ae8..1fd7ecb5c415 100644
--- a/arch/arm/boot/dts/exynos3250-monk.dts
+++ b/arch/arm/boot/dts/exynos3250-monk.dts
@@ -156,6 +156,12 @@
};
};
+&bus_dmc {
+ devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+ vdd-supply = <&buck1_reg>;
+ status = "okay";
+};
+
&cpu0 {
cpu0-supply = <&buck2_reg>;
};
diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts
index 1f102f3a1ab1..5175bd7e015f 100644
--- a/arch/arm/boot/dts/exynos3250-rinato.dts
+++ b/arch/arm/boot/dts/exynos3250-rinato.dts
@@ -147,6 +147,12 @@
};
};
+&bus_dmc {
+ devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
+ vdd-supply = <&buck1_reg>;
+ status = "okay";
+};
+
&cpu0 {
cpu0-supply = <&buck2_reg>;
};
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-04-11 06:10 +0200 |
| Subject | [PATCH v9 16/20] ARM: dts: Add bus nodes using VDD_MIF for Exynos4210 |
| Message-ID | <rmBkL-88x-39@gated-at.bofh.it> |
| In reply to | #1375472 |
This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD0/LCD1
- ACLK133 clock for FSYS/GPS
- GDL/GDR clock for LEFTBUS/RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
arch/arm/boot/dts/exynos4210.dtsi | 159 ++++++++++++++++++++++++++++++++++++++
1 file changed, 159 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index c1cb8df6da07..2d9b02967105 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -257,6 +257,165 @@
power-domains = <&pd_lcd1>;
#iommu-cells = <0>;
};
+
+ bus_dmc: bus_dmc {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_DIV_DMC>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_dmc_opp_table>;
+ status = "disabled";
+ };
+
+ bus_acp: bus_acp {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_DIV_ACP>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_acp_opp_table>;
+ status = "disabled";
+ };
+
+ bus_peri: bus_peri {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_ACLK100>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_peri_opp_table>;
+ status = "disabled";
+ };
+
+ bus_fsys: bus_fsys {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_ACLK133>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_fsys_opp_table>;
+ status = "disabled";
+ };
+
+ bus_display: bus_display {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_ACLK160>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_display_opp_table>;
+ status = "disabled";
+ };
+
+ bus_lcd0: bus_lcd0 {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_ACLK200>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_leftbus_opp_table>;
+ status = "disabled";
+ };
+
+ bus_leftbus: bus_leftbus {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_DIV_GDL>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_leftbus_opp_table>;
+ status = "disabled";
+ };
+
+ bus_rightbus: bus_rightbus {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_DIV_GDR>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_leftbus_opp_table>;
+ status = "disabled";
+ };
+
+ bus_mfc: bus_mfc {
+ compatible = "samsung,exynos-bus";
+ clocks = <&clock CLK_SCLK_MFC>;
+ clock-names = "bus";
+ operating-points-v2 = <&bus_leftbus_opp_table>;
+ status = "disabled";
+ };
+
+ bus_dmc_opp_table: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@134000000 {
+ opp-hz = /bits/ 64 <134000000>;
+ opp-microvolt = <1025000>;
+ };
+ opp@267000000 {
+ opp-hz = /bits/ 64 <267000000>;
+ opp-microvolt = <1050000>;
+ };
+ opp@400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <1150000>;
+ };
+ };
+
+ bus_acp_opp_table: opp_table2 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@134000000 {
+ opp-hz = /bits/ 64 <134000000>;
+ };
+ opp@160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ };
+ opp@200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ };
+ };
+
+ bus_peri_opp_table: opp_table3 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@5000000 {
+ opp-hz = /bits/ 64 <5000000>;
+ };
+ opp@100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ };
+ };
+
+ bus_fsys_opp_table: opp_table4 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@10000000 {
+ opp-hz = /bits/ 64 <10000000>;
+ };
+ opp@134000000 {
+ opp-hz = /bits/ 64 <134000000>;
+ };
+ };
+
+ bus_display_opp_table: opp_table5 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ };
+ opp@134000000 {
+ opp-hz = /bits/ 64 <134000000>;
+ };
+ opp@160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ };
+ };
+
+ bus_leftbus_opp_table: opp_table6 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp@100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ };
+ opp@160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ };
+ opp@200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ };
+ };
};
&gic {
--
1.9.1
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