Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1373630 > unrolled thread

[PATCH 1/9] net: mediatek: update the IRQ part of the binding document

Back to article view | Back to linux.kernel

Contents

  [PATCH 1/9] net: mediatek: update the IRQ part of the binding document John Crispin <blogic@openwrt.org> - 2016-04-07 20:10 +0200
    [PATCH 4/9] net: mediatek: remove superfluous reset call John Crispin <blogic@openwrt.org> - 2016-04-07 20:10 +0200
    Re: [PATCH 1/9] net: mediatek: update the IRQ part of the binding  document David Miller <davem@davemloft.net> - 2016-04-07 21:00 +0200
    Re: [PATCH 1/9] net: mediatek: update the IRQ part of the binding  document Rob Herring <robh@kernel.org> - 2016-04-11 17:30 +0200

#1373630 — [PATCH 1/9] net: mediatek: update the IRQ part of the binding document

The current binding document only describes a single interrupt. Update the
document by adding the 2 other interrupts.

The driver currently only uses a single interrupt. The HW is however able
to using IRQ grouping to split TX and RX onto separate GIC irqs.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: devicetree@vger.kernel.org
---
 Documentation/devicetree/bindings/net/mediatek-net.txt |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/mediatek-net.txt b/Documentation/devicetree/bindings/net/mediatek-net.txt
index 5ca7929..2f142be 100644
--- a/Documentation/devicetree/bindings/net/mediatek-net.txt
+++ b/Documentation/devicetree/bindings/net/mediatek-net.txt
@@ -9,7 +9,7 @@ have dual GMAC each represented by a child node..
 Required properties:
 - compatible: Should be "mediatek,mt7623-eth"
 - reg: Address and length of the register set for the device
-- interrupts: Should contain the frame engines interrupt
+- interrupts: Should contain the three frame engines interrupts
 - clocks: the clock used by the core
 - clock-names: the names of the clock listed in the clocks property. These are
 	"ethif", "esw", "gp2", "gp1"
@@ -42,7 +42,9 @@ eth: ethernet@1b100000 {
 		 <&ethsys CLK_ETHSYS_GP2>,
 		 <&ethsys CLK_ETHSYS_GP1>;
 	clock-names = "ethif", "esw", "gp2", "gp1";
-	interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW>;
+	interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW
+		      GIC_SPI 199 IRQ_TYPE_LEVEL_LOW
+		      GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
 	power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
 	resets = <&ethsys MT2701_ETHSYS_ETH_RST>;
 	reset-names = "eth";
-- 
1.7.10.4

[toc] | [next] | [standalone]

#1373631 — [PATCH 4/9] net: mediatek: remove superfluous reset call

HW reset is triggered in the mtk_hw_init() function. There is no need to
also reset the core during probe.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/net/ethernet/mediatek/mtk_eth_soc.c |    4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 94cceb8..a4982e4 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -1679,10 +1679,6 @@ static int mtk_probe(struct platform_device *pdev)
 	struct mtk_eth *eth;
 	int err;
 
-	err = device_reset(&pdev->dev);
-	if (err)
-		return err;
-
 	match = of_match_device(of_mtk_match, &pdev->dev);
 	soc = (struct mtk_soc_data *)match->data;
 
-- 
1.7.10.4

[toc] | [prev] | [next] | [standalone]

#1373672 — Re: [PATCH 1/9] net: mediatek: update the IRQ part of the binding document

Every patch series must begin with a postings labelled "[PATCH 0/9] ..."
which explains what the series is doing, how it is implementing that,
and why it is implemented that way.

[toc] | [prev] | [next] | [standalone]

#1376074 — Re: [PATCH 1/9] net: mediatek: update the IRQ part of the binding document

On Thu, Apr 07, 2016 at 07:57:48PM +0200, John Crispin wrote:
> The current binding document only describes a single interrupt. Update the
> document by adding the 2 other interrupts.
> 
> The driver currently only uses a single interrupt. The HW is however able
> to using IRQ grouping to split TX and RX onto separate GIC irqs.

I assume you aren't breaking existing DTs, and the driver will continue 
to work with a single irq specified?

> 
> Signed-off-by: John Crispin <blogic@openwrt.org>
> Cc: devicetree@vger.kernel.org
> ---
>  Documentation/devicetree/bindings/net/mediatek-net.txt |    6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/mediatek-net.txt b/Documentation/devicetree/bindings/net/mediatek-net.txt
> index 5ca7929..2f142be 100644
> --- a/Documentation/devicetree/bindings/net/mediatek-net.txt
> +++ b/Documentation/devicetree/bindings/net/mediatek-net.txt
> @@ -9,7 +9,7 @@ have dual GMAC each represented by a child node..
>  Required properties:
>  - compatible: Should be "mediatek,mt7623-eth"
>  - reg: Address and length of the register set for the device
> -- interrupts: Should contain the frame engines interrupt
> +- interrupts: Should contain the three frame engines interrupts

Need to define what each irq is and the order.

>  - clocks: the clock used by the core
>  - clock-names: the names of the clock listed in the clocks property. These are
>  	"ethif", "esw", "gp2", "gp1"
> @@ -42,7 +42,9 @@ eth: ethernet@1b100000 {
>  		 <&ethsys CLK_ETHSYS_GP2>,
>  		 <&ethsys CLK_ETHSYS_GP1>;
>  	clock-names = "ethif", "esw", "gp2", "gp1";
> -	interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW>;
> +	interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW
> +		      GIC_SPI 199 IRQ_TYPE_LEVEL_LOW
> +		      GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
>  	power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
>  	resets = <&ethsys MT2701_ETHSYS_ETH_RST>;
>  	reset-names = "eth";
> -- 
> 1.7.10.4
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[toc] | [prev] | [standalone]

Back to top | Article view | linux.kernel

csiph-web