Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1371159 > unrolled thread
| Started by | Eric Anholt <eric@anholt.net> |
|---|---|
| First post | 2016-04-05 05:30 +0200 |
| Last post | 2016-04-05 05:30 +0200 |
| Articles | 5 — 2 participants |
Back to article view | Back to linux.kernel
[PATCH 0/2] minor bcm2835 clock fixes Eric Anholt <eric@anholt.net> - 2016-04-05 05:30 +0200
[PATCH 2/2] clk: bcm2835: Fix PLL poweron Eric Anholt <eric@anholt.net> - 2016-04-05 05:30 +0200
Re: [PATCH 2/2] clk: bcm2835: Fix PLL poweron Stefan Wahren <stefan.wahren@i2se.com> - 2016-04-05 23:00 +0200
Re: [PATCH 2/2] clk: bcm2835: Fix PLL poweron Eric Anholt <eric@anholt.net> - 2016-04-08 22:10 +0200
[PATCH 1/2] clk: bcm2835: Fix compiler warnings on 64-bit builds Eric Anholt <eric@anholt.net> - 2016-04-05 05:30 +0200
| From | Eric Anholt <eric@anholt.net> |
|---|---|
| Date | 2016-04-05 05:30 +0200 |
| Subject | [PATCH 0/2] minor bcm2835 clock fixes |
| Message-ID | <rkpQK-549-3@gated-at.bofh.it> |
Here are two little fixes for clk-bcm2835 from working on the arm64 port. I'm fine with both of them landing in -next. The PLL poweron is a bugfix even for non-arm64, but I haven't seen it get hit before (I needed to fail to include the pinctrl driver in order for the code path to trigger). Eric Anholt (2): clk: bcm2835: Fix compiler warnings on 64-bit builds clk: bcm2835: Fix PLL poweron drivers/clk/bcm/clk-bcm2835.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) -- 2.7.0
[toc] | [next] | [standalone]
| From | Eric Anholt <eric@anholt.net> |
|---|---|
| Date | 2016-04-05 05:30 +0200 |
| Subject | [PATCH 2/2] clk: bcm2835: Fix PLL poweron |
| Message-ID | <rkpQK-549-5@gated-at.bofh.it> |
| In reply to | #1371159 |
In poweroff, we set the reset bit and the power down bit, but only managed to unset the reset bit for poweron. This meant that if HDMI did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the PLLH (that had been on at boot time) and never recover. Signed-off-by: Eric Anholt <eric@anholt.net> Cc: stable@vger.kernel.org --- drivers/clk/bcm/clk-bcm2835.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c index 87616de..7a79708 100644 --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -554,6 +554,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) const struct bcm2835_pll_data *data = pll->data; ktime_t timeout; + cprman_write(cprman, data->a2w_ctrl_reg, + cprman_read(cprman, data->a2w_ctrl_reg) & + ~A2W_PLL_CTRL_PWRDN); + /* Take the PLL out of reset. */ cprman_write(cprman, data->cm_ctrl_reg, cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST); -- 2.7.0
[toc] | [prev] | [next] | [standalone]
| From | Stefan Wahren <stefan.wahren@i2se.com> |
|---|---|
| Date | 2016-04-05 23:00 +0200 |
| Subject | Re: [PATCH 2/2] clk: bcm2835: Fix PLL poweron |
| Message-ID | <rkGeS-1hF-11@gated-at.bofh.it> |
| In reply to | #1371160 |
Hi Eric, > Eric Anholt <eric@anholt.net> hat am 5. April 2016 um 05:20 geschrieben: > > > In poweroff, we set the reset bit and the power down bit, but only > managed to unset the reset bit for poweron. This meant that if HDMI > did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the > PLLH (that had been on at boot time) and never recover. > > Signed-off-by: Eric Anholt <eric@anholt.net> > Cc: stable@vger.kernel.org please provide a Fixes tag. Thanks Stefan > --- > drivers/clk/bcm/clk-bcm2835.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c > index 87616de..7a79708 100644 > --- a/drivers/clk/bcm/clk-bcm2835.c > +++ b/drivers/clk/bcm/clk-bcm2835.c > @@ -554,6 +554,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) > const struct bcm2835_pll_data *data = pll->data; > ktime_t timeout; > > + cprman_write(cprman, data->a2w_ctrl_reg, > + cprman_read(cprman, data->a2w_ctrl_reg) & > + ~A2W_PLL_CTRL_PWRDN); > + > /* Take the PLL out of reset. */ > cprman_write(cprman, data->cm_ctrl_reg, > cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST); > -- > 2.7.0 > > > _______________________________________________ > linux-rpi-kernel mailing list > linux-rpi-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-rpi-kernel
[toc] | [prev] | [next] | [standalone]
| From | Eric Anholt <eric@anholt.net> |
|---|---|
| Date | 2016-04-08 22:10 +0200 |
| Subject | Re: [PATCH 2/2] clk: bcm2835: Fix PLL poweron |
| Message-ID | <rlKT8-KF-21@gated-at.bofh.it> |
| In reply to | #1371936 |
[Multipart message — attachments visible in raw view] — view raw
Stefan Wahren <stefan.wahren@i2se.com> writes:
> Hi Eric,
>
>> Eric Anholt <eric@anholt.net> hat am 5. April 2016 um 05:20 geschrieben:
>>
>>
>> In poweroff, we set the reset bit and the power down bit, but only
>> managed to unset the reset bit for poweron. This meant that if HDMI
>> did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the
>> PLLH (that had been on at boot time) and never recover.
>>
>> Signed-off-by: Eric Anholt <eric@anholt.net>
>> Cc: stable@vger.kernel.org
>
> please provide a Fixes tag.
>
> Thanks Stefan
That should be:
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
[toc] | [prev] | [next] | [standalone]
| From | Eric Anholt <eric@anholt.net> |
|---|---|
| Date | 2016-04-05 05:30 +0200 |
| Subject | [PATCH 1/2] clk: bcm2835: Fix compiler warnings on 64-bit builds |
| Message-ID | <rkpQK-549-9@gated-at.bofh.it> |
| In reply to | #1371159 |
Signed-off-by: Eric Anholt <eric@anholt.net>
---
drivers/clk/bcm/clk-bcm2835.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
index 4c0f1b5..87616de 100644
--- a/drivers/clk/bcm/clk-bcm2835.c
+++ b/drivers/clk/bcm/clk-bcm2835.c
@@ -400,17 +400,17 @@ struct bcm2835_pll_ana_bits {
static const struct bcm2835_pll_ana_bits bcm2835_ana_default = {
.mask0 = 0,
.set0 = 0,
- .mask1 = ~(A2W_PLL_KI_MASK | A2W_PLL_KP_MASK),
+ .mask1 = (u32)~(A2W_PLL_KI_MASK | A2W_PLL_KP_MASK),
.set1 = (2 << A2W_PLL_KI_SHIFT) | (8 << A2W_PLL_KP_SHIFT),
- .mask3 = ~A2W_PLL_KA_MASK,
+ .mask3 = (u32)~A2W_PLL_KA_MASK,
.set3 = (2 << A2W_PLL_KA_SHIFT),
.fb_prediv_mask = BIT(14),
};
static const struct bcm2835_pll_ana_bits bcm2835_ana_pllh = {
- .mask0 = ~(A2W_PLLH_KA_MASK | A2W_PLLH_KI_LOW_MASK),
+ .mask0 = (u32)~(A2W_PLLH_KA_MASK | A2W_PLLH_KI_LOW_MASK),
.set0 = (2 << A2W_PLLH_KA_SHIFT) | (2 << A2W_PLLH_KI_LOW_SHIFT),
- .mask1 = ~(A2W_PLLH_KI_HIGH_MASK | A2W_PLLH_KP_MASK),
+ .mask1 = (u32)~(A2W_PLLH_KI_HIGH_MASK | A2W_PLLH_KP_MASK),
.set1 = (6 << A2W_PLLH_KP_SHIFT),
.mask3 = 0,
.set3 = 0,
--
2.7.0
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web