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| Started by | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| First post | 2016-03-24 18:00 +0100 |
| Last post | 2016-03-30 16:20 +0200 |
| Articles | 2 — 2 participants |
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[PATCH v3 08/18] dt-bindings: Add PLX Technology Reset Controller bindings Neil Armstrong <narmstrong@baylibre.com> - 2016-03-24 18:00 +0100
Re: [PATCH v3 08/18] dt-bindings: Add PLX Technology Reset Controller bindings Philipp Zabel <p.zabel@pengutronix.de> - 2016-03-30 16:20 +0200
| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2016-03-24 18:00 +0100 |
| Subject | [PATCH v3 08/18] dt-bindings: Add PLX Technology Reset Controller bindings |
| Message-ID | <rggM2-5rb-17@gated-at.bofh.it> |
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
.../devicetree/bindings/reset/plxtech,reset.txt | 58 ++++++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/plxtech,reset.txt
diff --git a/Documentation/devicetree/bindings/reset/plxtech,reset.txt b/Documentation/devicetree/bindings/reset/plxtech,reset.txt
new file mode 100644
index 0000000..581c974
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/plxtech,reset.txt
@@ -0,0 +1,58 @@
+PLX Technology OXNAS SoC Family RESET Controller
+================================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible: Should be "oxsemi,ox810se-reset"
+- #reset-cells: 1, see below
+
+Parent node should have the following properties :
+- compatible: Should be "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd"
+
+For OX810SE, the indices are :
+ - 0 : ARM
+ - 1 : COPRO
+ - 2 : Reserved
+ - 3 : Reserved
+ - 4 : USBHS
+ - 5 : USBHSPHY
+ - 6 : MAC
+ - 7 : PCI
+ - 8 : DMA
+ - 9 : DPE
+ - 10 : DDR
+ - 11 : SATA
+ - 12 : SATA_LINK
+ - 13 : SATA_PHY
+ - 14 : Reserved
+ - 15 : NAND
+ - 16 : GPIO
+ - 17 : UART1
+ - 18 : UART2
+ - 19 : MISC
+ - 20 : I2S
+ - 21 : AHB_MON
+ - 22 : UART3
+ - 23 : UART4
+ - 24 : SGDMA
+ - 25 : Reserved
+ - 26 : Reserved
+ - 27 : Reserved
+ - 28 : Reserved
+ - 29 : Reserved
+ - 30 : Reserved
+ - 31 : BUS
+
+example:
+
+sys: sys-ctrl@000000 {
+ compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd";
+ reg = <0x000000 0x100000>;
+
+ reset: reset-controller {
+ compatible = "oxsemi,ox810se-reset";
+ #reset-cells = <1>;
+ };
+};
--
1.9.1
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| From | Philipp Zabel <p.zabel@pengutronix.de> |
|---|---|
| Date | 2016-03-30 16:20 +0200 |
| Subject | Re: [PATCH v3 08/18] dt-bindings: Add PLX Technology Reset Controller bindings |
| Message-ID | <rip8u-6AK-13@gated-at.bofh.it> |
| In reply to | #1364340 |
Am Donnerstag, den 24.03.2016, 17:50 +0100 schrieb Neil Armstrong: > Acked-by: Rob Herring <robh@kernel.org> > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > .../devicetree/bindings/reset/plxtech,reset.txt | 58 ++++++++++++++++++++++ > 1 file changed, 58 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/plxtech,reset.txt > > diff --git a/Documentation/devicetree/bindings/reset/plxtech,reset.txt b/Documentation/devicetree/bindings/reset/plxtech,reset.txt > new file mode 100644 > index 0000000..581c974 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/plxtech,reset.txt > @@ -0,0 +1,58 @@ > +PLX Technology OXNAS SoC Family RESET Controller > +================================================ > + > +Please also refer to reset.txt in this directory for common reset > +controller binding usage. > + > +Required properties: > +- compatible: Should be "oxsemi,ox810se-reset" > +- #reset-cells: 1, see below > + > +Parent node should have the following properties : > +- compatible: Should be "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd" So oxsemi developed oxnas, got bought up by plxtech, which was bought by avago, which then acquired broadcom and adopted its name? If there's agreement bout the oxsemi vendor prefix, I'd rename plxtech,reset.txt to oxsemi,reset.txt and replace all occurrences of PLX Technology with Oxford Semiconductor. With this cleared up, I'll be happy to take this and patch 7. best regards Philipp
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