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Groups > linux.kernel > #1364505 > unrolled thread
| Started by | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| First post | 2016-03-25 01:20 +0100 |
| Last post | 2016-03-25 09:30 +0100 |
| Articles | 3 — 2 participants |
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Re: [PATCH] serial: samsung: Reorder the sequence of clock control when call s3c24xx_serial_set_termios() Chanwoo Choi <cw00.choi@samsung.com> - 2016-03-25 01:20 +0100
Re: [PATCH] serial: samsung: Reorder the sequence of clock control when call s3c24xx_serial_set_termios() Marek Szyprowski <m.szyprowski@samsung.com> - 2016-03-25 09:20 +0100
Re: [PATCH] serial: samsung: Reorder the sequence of clock control when call s3c24xx_serial_set_termios() Chanwoo Choi <cw00.choi@samsung.com> - 2016-03-25 09:30 +0100
| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-03-25 01:20 +0100 |
| Subject | Re: [PATCH] serial: samsung: Reorder the sequence of clock control when call s3c24xx_serial_set_termios() |
| Message-ID | <rgnDQ-1Zi-3@gated-at.bofh.it> |
Hi Robert,
I send following patch to fix the broken serial log of Exynos SoC.
As I knew, you also knew this issue.
If possible, could you review or test this patch?
Best Regards,
Chanwoo Choi
On 2016년 03월 14일 09:41, Chanwoo Choi wrote:
> This patch fixes the broken serial log when changing the clock source
> of uart device. Before disabling the original clock source, this patch
> enables the new clock source to protect the clock off state for a split second.
>
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
> drivers/tty/serial/samsung.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
> index d72cd736bdc6..80d59dbfebba 100644
> --- a/drivers/tty/serial/samsung.c
> +++ b/drivers/tty/serial/samsung.c
> @@ -1265,13 +1265,13 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
> if (ourport->baudclk != clk) {
> s3c24xx_serial_setsource(port, clk_sel);
>
> + clk_prepare_enable(clk);
> +
> if (!IS_ERR(ourport->baudclk)) {
> clk_disable_unprepare(ourport->baudclk);
> ourport->baudclk = ERR_PTR(-EINVAL);
> }
>
> - clk_prepare_enable(clk);
> -
> ourport->baudclk = clk;
> ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
> }
>
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| From | Marek Szyprowski <m.szyprowski@samsung.com> |
|---|---|
| Date | 2016-03-25 09:20 +0100 |
| Message-ID | <rgv8m-7ng-5@gated-at.bofh.it> |
| In reply to | #1364505 |
Dear Chanwoo,
On 2016-03-25 01:10, Chanwoo Choi wrote:
> Hi Robert,
>
> I send following patch to fix the broken serial log of Exynos SoC.
> As I knew, you also knew this issue.
> If possible, could you review or test this patch?
Robert no longer works for Samsung, so I'm afraid that he won't be able
to test
this patch.
> Best Regards,
> Chanwoo Choi
>
> On 2016년 03월 14일 09:41, Chanwoo Choi wrote:
>> This patch fixes the broken serial log when changing the clock source
>> of uart device. Before disabling the original clock source, this patch
>> enables the new clock source to protect the clock off state for a split second.
>>
>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>> ---
>> drivers/tty/serial/samsung.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
>> index d72cd736bdc6..80d59dbfebba 100644
>> --- a/drivers/tty/serial/samsung.c
>> +++ b/drivers/tty/serial/samsung.c
>> @@ -1265,13 +1265,13 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
>> if (ourport->baudclk != clk) {
>> s3c24xx_serial_setsource(port, clk_sel);
>>
>> + clk_prepare_enable(clk);
>> +
IMHO clk_prepare_enable() should be moved before
s3c24xx_serial_setsource() to be
really sure that there will be no period of hw operating with disabled
baud clock.
Could you check if it works for you?
>> if (!IS_ERR(ourport->baudclk)) {
>> clk_disable_unprepare(ourport->baudclk);
>> ourport->baudclk = ERR_PTR(-EINVAL);
>> }
>>
>> - clk_prepare_enable(clk);
>> -
>> ourport->baudclk = clk;
>> ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
>> }
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
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| From | Chanwoo Choi <cw00.choi@samsung.com> |
|---|---|
| Date | 2016-03-25 09:30 +0100 |
| Message-ID | <rgvi2-7qm-13@gated-at.bofh.it> |
| In reply to | #1364592 |
Dear Marek,
On 2016년 03월 25일 17:14, Marek Szyprowski wrote:
> Dear Chanwoo,
>
> On 2016-03-25 01:10, Chanwoo Choi wrote:
>> Hi Robert,
>>
>> I send following patch to fix the broken serial log of Exynos SoC.
>> As I knew, you also knew this issue.
>> If possible, could you review or test this patch?
>
> Robert no longer works for Samsung, so I'm afraid that he won't be able to test
> this patch.
Ah. Thanks for your reply.
>
>> Best Regards,
>> Chanwoo Choi
>>
>> On 2016년 03월 14일 09:41, Chanwoo Choi wrote:
>>> This patch fixes the broken serial log when changing the clock source
>>> of uart device. Before disabling the original clock source, this patch
>>> enables the new clock source to protect the clock off state for a split second.
>>>
>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>> ---
>>> drivers/tty/serial/samsung.c | 4 ++--
>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
>>> index d72cd736bdc6..80d59dbfebba 100644
>>> --- a/drivers/tty/serial/samsung.c
>>> +++ b/drivers/tty/serial/samsung.c
>>> @@ -1265,13 +1265,13 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
>>> if (ourport->baudclk != clk) {
>>> s3c24xx_serial_setsource(port, clk_sel);
>>> + clk_prepare_enable(clk);
>>> +
>
> IMHO clk_prepare_enable() should be moved before s3c24xx_serial_setsource() to be
> really sure that there will be no period of hw operating with disabled baud clock.
> Could you check if it works for you?
Yes. I tested it without any problem.
But, as you commented, clk_prepare_enable() should be called before s3c24xx_serial_setsource().
I'll modify it.
>
>>> if (!IS_ERR(ourport->baudclk)) {
>>> clk_disable_unprepare(ourport->baudclk);
>>> ourport->baudclk = ERR_PTR(-EINVAL);
>>> }
>>> - clk_prepare_enable(clk);
>>> -
>>> ourport->baudclk = clk;
>>> ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
>>> }
>
> Best regards
Best Regards,
Chanwoo Choi
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