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Groups > linux.kernel > #1364742 > unrolled thread
| Started by | Peter Griffin <peter.griffin@linaro.org> |
|---|---|
| First post | 2016-03-25 16:40 +0100 |
| Last post | 2016-03-29 11:20 +0200 |
| Articles | 5 — 2 participants |
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[PATCH 0/4] STi DT updates Peter Griffin <peter.griffin@linaro.org> - 2016-03-25 16:40 +0100
[PATCH 3/4] ARM: DT: STiH407: Add node for i2c12 controller Peter Griffin <peter.griffin@linaro.org> - 2016-03-25 16:40 +0100
[PATCH 1/4] ARM: DT: STiH407: Add UART RTS/CTS pin configuration Peter Griffin <peter.griffin@linaro.org> - 2016-03-25 16:40 +0100
[PATCH 4/4] ARM: STi: DT: STiH407: Add DT node for eeprom Peter Griffin <peter.griffin@linaro.org> - 2016-03-25 16:40 +0100
Re: [PATCH 4/4] ARM: STi: DT: STiH407: Add DT node for eeprom Lee Jones <lee.jones@linaro.org> - 2016-03-29 11:20 +0200
| From | Peter Griffin <peter.griffin@linaro.org> |
|---|---|
| Date | 2016-03-25 16:40 +0100 |
| Subject | [PATCH 0/4] STi DT updates |
| Message-ID | <rgC09-3JW-5@gated-at.bofh.it> |
Hi Maxime, This series adds some more alternate pin configurations which were missing upstream, the DT config for SSC12, and also a DT node for the 24c256 eeprom. regards, Peter. Peter Griffin (4): ARM: DT: STiH407: Add UART RTS/CTS pin configuration ARM: DT: STiH407: Add i2c12 pin definition ARM: DT: STiH407: Add node for i2c12 controller ARM: STi: DT: STiH407: Add DT node for eeprom arch/arm/boot/dts/stih407-family.dtsi | 13 ++++++ arch/arm/boot/dts/stih407-pinctrl.dtsi | 82 ++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/stihxxx-b2120.dtsi | 9 ++++ 3 files changed, 104 insertions(+) -- 1.9.1
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| From | Peter Griffin <peter.griffin@linaro.org> |
|---|---|
| Date | 2016-03-25 16:40 +0100 |
| Subject | [PATCH 3/4] ARM: DT: STiH407: Add node for i2c12 controller |
| Message-ID | <rgC0a-3JW-7@gated-at.bofh.it> |
| In reply to | #1364742 |
Add DT support for SSC12.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
arch/arm/boot/dts/stih407-family.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi
index 81f8121..7785f31 100644
--- a/arch/arm/boot/dts/stih407-family.dtsi
+++ b/arch/arm/boot/dts/stih407-family.dtsi
@@ -327,6 +327,19 @@
status = "disabled";
};
+ i2c@9542000 {
+ compatible = "st,comms-ssc4-i2c";
+ reg = <0x9542000 0x110>;
+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_sysin>;
+ clock-names = "ssc";
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c12_default>;
+
+ status = "disabled";
+ };
+
usb2_picophy0: phy1 {
compatible = "st,stih407-usb2-phy";
#phy-cells = <0>;
--
1.9.1
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| From | Peter Griffin <peter.griffin@linaro.org> |
|---|---|
| Date | 2016-03-25 16:40 +0100 |
| Subject | [PATCH 1/4] ARM: DT: STiH407: Add UART RTS/CTS pin configuration |
| Message-ID | <rgC0a-3JW-9@gated-at.bofh.it> |
| In reply to | #1364742 |
Add pinctrl definitions of UART RTS/CTS pins.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
arch/arm/boot/dts/stih407-pinctrl.dtsi | 73 ++++++++++++++++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index a538ae5..87e75bf 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -149,7 +149,20 @@
rx = <&pio3 5 ALT1 IN>;
};
};
+
+ pinctrl_sbc_serial0_rts: sbc_serial0_rts {
+ st,pins {
+ rts = <&pio3 7 ALT1 OUT>;
+ };
+ };
+
+ pinctrl_sbc_serial0_cts: sbc_serial0_cts {
+ st,pins {
+ cts = <&pio3 6 ALT1 IN>;
+ };
+ };
};
+
/* SBC_ASC1 - UART11 */
sbc_serial1 {
pinctrl_sbc_serial1: sbc_serial1-0 {
@@ -158,6 +171,18 @@
rx = <&pio2 7 ALT3 IN>;
};
};
+
+ pinctrl_sbc_serial1_rts: sbc_serial1_rts {
+ st,pins {
+ rts = <&pio3 1 ALT3 OUT>;
+ };
+ };
+
+ pinctrl_sbc_serial1_cts: sbc_serial1_cts {
+ st,pins {
+ cts = <&pio3 0 ALT3 IN>;
+ };
+ };
};
i2c10 {
@@ -478,6 +503,18 @@
rx = <&pio15 1 ALT1 IN>;
};
};
+
+ pinctrl_serial0_rts: serial0_rts {
+ st,pins {
+ rts = <&pio17 3 ALT1 OUT>;
+ };
+ };
+
+ pinctrl_serial0_cts: serial0_cts {
+ st,pins {
+ cts = <&pio17 2 ALT1 IN>;
+ };
+ };
};
mmc1 {
@@ -495,6 +532,18 @@
sd_wp = <&pio19 1 ALT6 IN>;
};
};
+
+ pinctrl_serial1_rts: serial1_rts {
+ st,pins {
+ rts = <&pio16 3 ALT1 OUT>;
+ };
+ };
+
+ pinctrl_serial1_cts: serial1_cts {
+ st,pins {
+ cts = <&pio16 2 ALT1 IN>;
+ };
+ };
};
@@ -505,6 +554,18 @@
scl = <&pio10 5 ALT2 BIDIR>;
};
};
+
+ pinctrl_serial2_rts: serial2_rts {
+ st,pins {
+ rts = <&pio15 3 ALT1 OUT>;
+ };
+ };
+
+ pinctrl_serial2_cts: serial2_cts {
+ st,pins {
+ cts = <&pio15 2 ALT1 IN>;
+ };
+ };
};
i2c1 {
@@ -1074,6 +1135,18 @@
rx = <&pio31 4 ALT1 IN>;
};
};
+
+ pinctrl_serial3_rts: serial3_rts {
+ st,pins {
+ rts = <&pio31 6 ALT1 OUT>;
+ };
+ };
+
+ pinctrl_serial3_cts: serial3_cts {
+ st,pins {
+ cts = <&pio31 5 ALT1 IN>;
+ };
+ };
};
};
--
1.9.1
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| From | Peter Griffin <peter.griffin@linaro.org> |
|---|---|
| Date | 2016-03-25 16:40 +0100 |
| Subject | [PATCH 4/4] ARM: STi: DT: STiH407: Add DT node for eeprom |
| Message-ID | <rgC0a-3JW-13@gated-at.bofh.it> |
| In reply to | #1364742 |
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
arch/arm/boot/dts/stihxxx-b2120.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 133375b..0d7c6dd 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -58,6 +58,15 @@
i2c@9845000 {
status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@50 {
+ compatible = "at,24c256";
+ pagesize = <64>;
+ reg = <0x50>;
+ };
};
i2c@9540000 {
--
1.9.1
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| From | Lee Jones <lee.jones@linaro.org> |
|---|---|
| Date | 2016-03-29 11:20 +0200 |
| Subject | Re: [PATCH 4/4] ARM: STi: DT: STiH407: Add DT node for eeprom |
| Message-ID | <rhXYE-3S8-37@gated-at.bofh.it> |
| In reply to | #1364745 |
More information is required in the commit message.
What do we use the EEPROM for? What information is contained within?
What stops working if we don't support it? What starts working if we
do?
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> ---
> arch/arm/boot/dts/stihxxx-b2120.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
> index 133375b..0d7c6dd 100644
> --- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
> +++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
> @@ -58,6 +58,15 @@
>
> i2c@9845000 {
> status = "okay";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + eeprom@50 {
> + compatible = "at,24c256";
> + pagesize = <64>;
> + reg = <0x50>;
> + };
> };
>
> i2c@9540000 {
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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