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Groups > linux.kernel > #1355567 > unrolled thread

[PATCH V7 00/12] Add T210 support in Tegra soctherm

Started byWei Ni <wni@nvidia.com>
First post2016-03-11 04:20 +0100
Last post2016-03-15 06:50 +0100
Articles 9 — 2 participants

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Contents

  [PATCH V7 00/12] Add T210 support in Tegra soctherm Wei Ni <wni@nvidia.com> - 2016-03-11 04:20 +0100
    [PATCH V7 02/12] thermal: tegra: combine sensor group-related data Wei Ni <wni@nvidia.com> - 2016-03-11 04:20 +0100
    [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack Wei Ni <wni@nvidia.com> - 2016-03-11 04:20 +0100
      Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack Eduardo Valentin <edubezval@gmail.com> - 2016-03-14 21:10 +0100
        Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack Wei Ni <wni@nvidia.com> - 2016-03-15 07:30 +0100
          Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack Eduardo Valentin <edubezval@gmail.com> - 2016-03-15 21:00 +0100
            Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack Wei Ni <wni@nvidia.com> - 2016-03-16 04:50 +0100
    Re: [PATCH V7 00/12] Add T210 support in Tegra soctherm Eduardo Valentin <edubezval@gmail.com> - 2016-03-14 22:10 +0100
      Re: [PATCH V7 00/12] Add T210 support in Tegra soctherm Wei Ni <wni@nvidia.com> - 2016-03-15 06:50 +0100

#1355567 — [PATCH V7 00/12] Add T210 support in Tegra soctherm

FromWei Ni <wni@nvidia.com>
Date2016-03-11 04:20 +0100
Subject[PATCH V7 00/12] Add T210 support in Tegra soctherm
Message-ID<rblCG-8hC-11@gated-at.bofh.it>
This patchset adds following functions for tegra_soctherm driver:
1. add T210 support.
2. export debugfs to show some registers.
3. add thermtrip funciton.
4. add suspend/resume function.

The v6 series is in:
https://lkml.org/lkml/2016/2/22/66
The v5 series is in:
http://www.spinics.net/lists/linux-tegra/msg25079.html
The v4 series is in:
http://www.spinics.net/lists/linux-tegra/msg24972.html
The V3 series is in:
http://www.spinics.net/lists/linux-tegra/msg24911.html
The V2 series is in:
http://www.spinics.net/lists/linux-tegra/msg24901.html
The V1 series is in:
http://www.spinics.net/lists/linux-tegra/msg24808.html

Main changes from V6:
1. rebased patches on Eduardo's
[PATCH 00/13] thermal: convert users of thermal_zone_of_sensor_register to devm_

Main changes from V5:
1. Change to use linux thermal framework to implement
thermtrip funciton, per Rob's comment.
2. Add .set_trip_temp() in of-thermal driver, so that
we can set trips on hardware.

Main changes from V4:
1. Change description of devicetree binding per Rob's comment.
2. Call of_node_put to decrement refcount of the node.

Main changes from V3:
1. Change structures to "const" in chip specific files.
2. Minor changes per Thieery's comments.

Main changes from V2:
1. Fix build error in patch [1/11].
2. Use of_get_child_by_name instead of of_find_node_by_name in patch [8/11].
3. Use debugfs_remove_recursive to remove debugfs in patch [6/11].

Main changes from V1:
1. Use the new type to handl different Tegra chips in one driver, which suggested by Thierry.
2. Changes per Thieery's other comments.

Wei Ni (12):
  thermal: tegra: move tegra thermal files into tegra directory
  thermal: tegra: combine sensor group-related data
  thermal: tegra: get rid of PDIV/HOTSPOT hack
  thermal: tegra: split tegra_soctherm driver
  thermal: tegra: add Tegra210 specific SOC_THERM driver
  thermal: tegra: add a debugfs to show registers
  thermal: of-thermal: allow setting trip_temp on hardware
  of: add notes of critical trips for soctherm
  thermal: tegra: add thermtrip function
  thermal: tegra: add PM support
  arm64: tegra: add soctherm node for Tegra210
  arm: tegra: set critical trips for Tegra124

 .../devicetree/bindings/thermal/tegra-soctherm.txt |  12 +
 arch/arm/boot/dts/tegra124.dtsi                    |  16 +
 arch/arm64/boot/dts/nvidia/tegra210.dtsi           |  60 ++
 drivers/thermal/Kconfig                            |  12 +-
 drivers/thermal/Makefile                           |   2 +-
 drivers/thermal/of-thermal.c                       |   8 +
 drivers/thermal/tegra/Kconfig                      |  13 +
 drivers/thermal/tegra/Makefile                     |   5 +
 drivers/thermal/tegra/soctherm-fuse.c              | 169 +++++
 drivers/thermal/tegra/soctherm.c                   | 681 +++++++++++++++++++++
 drivers/thermal/tegra/soctherm.h                   | 123 ++++
 drivers/thermal/tegra/tegra124-soctherm.c          | 196 ++++++
 drivers/thermal/tegra/tegra210-soctherm.c          | 197 ++++++
 drivers/thermal/tegra_soctherm.c                   | 463 --------------
 include/dt-bindings/thermal/tegra124-soctherm.h    |   1 +
 include/linux/thermal.h                            |   1 +
 16 files changed, 1485 insertions(+), 474 deletions(-)
 create mode 100644 drivers/thermal/tegra/Kconfig
 create mode 100644 drivers/thermal/tegra/Makefile
 create mode 100644 drivers/thermal/tegra/soctherm-fuse.c
 create mode 100644 drivers/thermal/tegra/soctherm.c
 create mode 100644 drivers/thermal/tegra/soctherm.h
 create mode 100644 drivers/thermal/tegra/tegra124-soctherm.c
 create mode 100644 drivers/thermal/tegra/tegra210-soctherm.c
 delete mode 100644 drivers/thermal/tegra_soctherm.c

-- 
1.9.1

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#1355570 — [PATCH V7 02/12] thermal: tegra: combine sensor group-related data

FromWei Ni <wni@nvidia.com>
Date2016-03-11 04:20 +0100
Subject[PATCH V7 02/12] thermal: tegra: combine sensor group-related data
Message-ID<rblMm-8se-17@gated-at.bofh.it>
In reply to#1355567
Combine sensor group-related data structures into struct
tegra_tsensor_group. This provides a single location for
sensor group data storage.
More sensor group data will be added in subsequent patches.

Signed-off-by: Wei Ni <wni@nvidia.com>
---
 drivers/thermal/tegra/tegra-soctherm.c          | 145 +++++++++++++++++++-----
 include/dt-bindings/thermal/tegra124-soctherm.h |   1 +
 2 files changed, 119 insertions(+), 27 deletions(-)

diff --git a/drivers/thermal/tegra/tegra-soctherm.c b/drivers/thermal/tegra/tegra-soctherm.c
index 0018ccd51de4..b3ec0faa2bee 100644
--- a/drivers/thermal/tegra/tegra-soctherm.c
+++ b/drivers/thermal/tegra/tegra-soctherm.c
@@ -28,6 +28,7 @@
 #include <linux/thermal.h>
 
 #include <soc/tegra/fuse.h>
+#include <dt-bindings/thermal/tegra124-soctherm.h>
 
 #define SENSOR_CONFIG0				0
 #define SENSOR_CONFIG0_STOP			BIT(0)
@@ -48,12 +49,24 @@
 
 #define SENSOR_PDIV				0x1c0
 #define SENSOR_PDIV_T124			0x8888
+#define SENSOR_PDIV_CPU_MASK			(0xf << 12)
+#define SENSOR_PDIV_GPU_MASK			(0xf << 8)
+#define SENSOR_PDIV_MEM_MASK			(0xf << 4)
+#define SENSOR_PDIV_PLLX_MASK			(0xf << 0)
+
 #define SENSOR_HOTSPOT_OFF			0x1c4
 #define SENSOR_HOTSPOT_OFF_T124			0x00060600
+#define SENSOR_HOTSPOT_CPU_MASK			(0xff << 16)
+#define SENSOR_HOTSPOT_GPU_MASK			(0xff << 8)
+#define SENSOR_HOTSPOT_MEM_MASK			(0xff << 0)
+
 #define SENSOR_TEMP1				0x1c8
+#define SENSOR_TEMP1_CPU_TEMP_MASK		(0xffff << 16)
+#define SENSOR_TEMP1_GPU_TEMP_MASK		0xffff
 #define SENSOR_TEMP2				0x1cc
+#define SENSOR_TEMP2_MEM_TEMP_MASK		(0xffff << 16)
+#define SENSOR_TEMP2_PLLX_TEMP_MASK		0xffff
 
-#define SENSOR_TEMP_MASK			0xffff
 #define READBACK_VALUE_MASK			0xff00
 #define READBACK_VALUE_SHIFT			8
 #define READBACK_ADD_HALF			BIT(7)
@@ -77,8 +90,36 @@
 #define NOMINAL_CALIB_FT_T124			105
 #define NOMINAL_CALIB_CP_T124			25
 
+/* get val from register(r) mask bits(m) */
+#define REG_GET_MASK(r, m)	(((r) & (m)) >> (ffs(m) - 1))
+/* set val(v) to mask bits(m) of register(r) */
+#define REG_SET_MASK(r, m, v)	(((r) & ~(m)) | \
+				 (((v) & (m >> (ffs(m) - 1))) << (ffs(m) - 1)))
+
+/**
+ * struct tegra_tsensor_group - SOC_THERM sensor group data
+ * @name: short name of the temperature sensor group
+ * @id: numeric ID of the temperature sensor group
+ * @sensor_temp_offset: offset of the SENSOR_TEMP* register
+ * @sensor_temp_mask: bit mask for this sensor group in SENSOR_TEMP* register
+ * @pdiv: the sensor count post-divider to use during runtime
+ * @pdiv_ate: the sensor count post-divider used during automated test
+ * @pdiv_mask: register bitfield mask for the PDIV field for this sensor
+ * @pllx_hotspot_diff: hotspot offset from the PLLX sensor, must be 0 for
+    PLLX sensor group
+ * @pllx_hotspot_mask: register bitfield mask for the HOTSPOT field
+ */
+struct tegra_tsensor_group {
+	const char	*name;
+	u8		id;
+	u16		sensor_temp_offset;
+	u32		sensor_temp_mask;
+	u32		pdiv, pdiv_ate, pdiv_mask;
+	u32		pllx_hotspot_diff, pllx_hotspot_mask;
+};
+
 struct tegra_tsensor_configuration {
-	u32 tall, tsample, tiddq_en, ten_count, pdiv, tsample_ate, pdiv_ate;
+	u32 tall, tiddq_en, ten_count, tsample, tsample_ate;
 };
 
 struct tegra_tsensor {
@@ -86,21 +127,74 @@ struct tegra_tsensor {
 	u32 base, calib_fuse_offset;
 	/* Correction values used to modify values read from calibration fuses */
 	s32 fuse_corr_alpha, fuse_corr_beta;
+	const struct tegra_tsensor_group *group;
 };
 
 struct tegra_thermctl_zone {
 	void __iomem *reg;
-	unsigned int shift;
+	u32 mask;
 };
 
 static const struct tegra_tsensor_configuration t124_tsensor_config = {
 	.tall = 16300,
-	.tsample = 120,
 	.tiddq_en = 1,
 	.ten_count = 1,
-	.pdiv = 8,
+	.tsample = 120,
 	.tsample_ate = 480,
-	.pdiv_ate = 8
+};
+
+static const struct tegra_tsensor_group tegra124_tsensor_group_cpu = {
+	.id				= TEGRA124_SOCTHERM_SENSOR_CPU,
+	.name				= "cpu",
+	.sensor_temp_offset		= SENSOR_TEMP1,
+	.sensor_temp_mask		= SENSOR_TEMP1_CPU_TEMP_MASK,
+	.pdiv				= 8,
+	.pdiv_ate			= 8,
+	.pdiv_mask			= SENSOR_PDIV_CPU_MASK,
+	.pllx_hotspot_diff		= 10,
+	.pllx_hotspot_mask		= SENSOR_HOTSPOT_CPU_MASK,
+};
+
+static const struct tegra_tsensor_group tegra124_tsensor_group_gpu = {
+	.id				= TEGRA124_SOCTHERM_SENSOR_GPU,
+	.name				= "gpu",
+	.sensor_temp_offset		= SENSOR_TEMP1,
+	.sensor_temp_mask		= SENSOR_TEMP1_GPU_TEMP_MASK,
+	.pdiv				= 8,
+	.pdiv_ate			= 8,
+	.pdiv_mask			= SENSOR_PDIV_GPU_MASK,
+	.pllx_hotspot_diff		= 5,
+	.pllx_hotspot_mask		= SENSOR_HOTSPOT_GPU_MASK,
+};
+
+static const struct tegra_tsensor_group tegra124_tsensor_group_pll = {
+	.id				= TEGRA124_SOCTHERM_SENSOR_PLLX,
+	.name				= "pll",
+	.sensor_temp_offset		= SENSOR_TEMP2,
+	.sensor_temp_mask		= SENSOR_TEMP2_PLLX_TEMP_MASK,
+	.pdiv				= 8,
+	.pdiv_ate			= 8,
+	.pdiv_mask			= SENSOR_PDIV_PLLX_MASK,
+	.pllx_hotspot_diff		= 0,
+	.pllx_hotspot_mask		= SENSOR_HOTSPOT_MEM_MASK,
+};
+
+static const struct tegra_tsensor_group tegra124_tsensor_group_mem = {
+	.id				= TEGRA124_SOCTHERM_SENSOR_MEM,
+	.name				= "mem",
+	.sensor_temp_offset		= SENSOR_TEMP2,
+	.sensor_temp_mask		= SENSOR_TEMP2_MEM_TEMP_MASK,
+	.pdiv				= 8,
+	.pdiv_ate			= 8,
+	.pdiv_mask			= SENSOR_PDIV_MEM_MASK,
+};
+
+static const struct tegra_tsensor_group *
+tegra124_tsensor_groups[TEGRA124_SOCTHERM_SENSOR_NUM] = {
+	&tegra124_tsensor_group_cpu,
+	&tegra124_tsensor_group_gpu,
+	&tegra124_tsensor_group_pll,
+	&tegra124_tsensor_group_mem,
 };
 
 static const struct tegra_tsensor t124_tsensors[] = {
@@ -110,6 +204,7 @@ static const struct tegra_tsensor t124_tsensors[] = {
 		.calib_fuse_offset = 0x098,
 		.fuse_corr_alpha = 1135400,
 		.fuse_corr_beta = -6266900,
+		.group = &tegra124_tsensor_group_cpu,
 	},
 	{
 		.config = &t124_tsensor_config,
@@ -117,6 +212,7 @@ static const struct tegra_tsensor t124_tsensors[] = {
 		.calib_fuse_offset = 0x084,
 		.fuse_corr_alpha = 1122220,
 		.fuse_corr_beta = -5700700,
+		.group = &tegra124_tsensor_group_cpu,
 	},
 	{
 		.config = &t124_tsensor_config,
@@ -124,6 +220,7 @@ static const struct tegra_tsensor t124_tsensors[] = {
 		.calib_fuse_offset = 0x088,
 		.fuse_corr_alpha = 1127000,
 		.fuse_corr_beta = -6768200,
+		.group = &tegra124_tsensor_group_cpu,
 	},
 	{
 		.config = &t124_tsensor_config,
@@ -131,6 +228,7 @@ static const struct tegra_tsensor t124_tsensors[] = {
 		.calib_fuse_offset = 0x12c,
 		.fuse_corr_alpha = 1110900,
 		.fuse_corr_beta = -6232000,
+		.group = &tegra124_tsensor_group_cpu,
 	},
 	{
 		.config = &t124_tsensor_config,
@@ -138,6 +236,7 @@ static const struct tegra_tsensor t124_tsensors[] = {
 		.calib_fuse_offset = 0x158,
 		.fuse_corr_alpha = 1122300,
 		.fuse_corr_beta = -5936400,
+		.group = &tegra124_tsensor_group_mem,
 	},
 	{
 		.config = &t124_tsensor_config,
@@ -145,6 +244,7 @@ static const struct tegra_tsensor t124_tsensors[] = {
 		.calib_fuse_offset = 0x15c,
 		.fuse_corr_alpha = 1145700,
 		.fuse_corr_beta = -7124600,
+		.group = &tegra124_tsensor_group_mem,
 	},
 	{
 		.config = &t124_tsensor_config,
@@ -152,6 +252,7 @@ static const struct tegra_tsensor t124_tsensors[] = {
 		.calib_fuse_offset = 0x154,
 		.fuse_corr_alpha = 1120100,
 		.fuse_corr_beta = -6000500,
+		.group = &tegra124_tsensor_group_gpu,
 	},
 	{
 		.config = &t124_tsensor_config,
@@ -159,6 +260,7 @@ static const struct tegra_tsensor t124_tsensors[] = {
 		.calib_fuse_offset = 0x160,
 		.fuse_corr_alpha = 1106500,
 		.fuse_corr_beta = -6729300,
+		.group = &tegra124_tsensor_group_pll,
 	},
 };
 
@@ -167,8 +269,6 @@ struct tegra_soctherm {
 	struct clk *clock_tsensor;
 	struct clk *clock_soctherm;
 	void __iomem *regs;
-
-#define ZONE_NUMBER		4
 };
 
 struct tsensor_shared_calibration {
@@ -237,8 +337,8 @@ calculate_tsensor_calibration(const struct tegra_tsensor *sensor,
 	delta_sens = actual_tsensor_ft - actual_tsensor_cp;
 	delta_temp = shared->actual_temp_ft - shared->actual_temp_cp;
 
-	mult = sensor->config->pdiv * sensor->config->tsample_ate;
-	div = sensor->config->tsample * sensor->config->pdiv_ate;
+	mult = sensor->group->pdiv * sensor->config->tsample_ate;
+	div = sensor->config->tsample * sensor->group->pdiv_ate;
 
 	therma = div64_s64_precise((s64) delta_temp * (1LL << 13) * mult,
 				   (s64) delta_sens * div);
@@ -311,7 +411,8 @@ static int tegra_thermctl_get_temp(void *data, int *out_temp)
 	struct tegra_thermctl_zone *zone = data;
 	u32 val;
 
-	val = (readl(zone->reg) >> zone->shift) & SENSOR_TEMP_MASK;
+	val = readl(zone->reg);
+	val = REG_GET_MASK(val, zone->mask);
 	*out_temp = translate_temp(val);
 
 	return 0;
@@ -327,18 +428,6 @@ static const struct of_device_id tegra_soctherm_of_match[] = {
 };
 MODULE_DEVICE_TABLE(of, tegra_soctherm_of_match);
 
-struct thermctl_zone_desc {
-	unsigned int offset;
-	unsigned int shift;
-};
-
-static const struct thermctl_zone_desc t124_thermctl_temp_zones[] = {
-	{ SENSOR_TEMP1, 16 },
-	{ SENSOR_TEMP2, 16 },
-	{ SENSOR_TEMP1, 0 },
-	{ SENSOR_TEMP2, 0 }
-};
-
 static int tegra_soctherm_probe(struct platform_device *pdev)
 {
 	struct tegra_soctherm *tegra;
@@ -349,6 +438,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
 	int err;
 
 	const struct tegra_tsensor *tsensors = t124_tsensors;
+	const struct tegra_tsensor_group **ttgs = tegra124_tsensor_groups;
 
 	tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL);
 	if (!tegra)
@@ -408,7 +498,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
 
 	/* Initialize thermctl sensors */
 
-	for (i = 0; i < ZONE_NUMBER; ++i) {
+	for (i = 0; i < TEGRA124_SOCTHERM_SENSOR_NUM; ++i) {
 		struct tegra_thermctl_zone *zone =
 			devm_kzalloc(&pdev->dev, sizeof(*zone), GFP_KERNEL);
 		if (!zone) {
@@ -416,10 +506,11 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
 			goto disable_clocks;
 		}
 
-		zone->reg = tegra->regs + t124_thermctl_temp_zones[i].offset;
-		zone->shift = t124_thermctl_temp_zones[i].shift;
+		zone->reg = tegra->regs + ttgs[i]->sensor_temp_offset;
+		zone->mask = ttgs[i]->sensor_temp_mask;
 
-		z = devm_thermal_zone_of_sensor_register(&pdev->dev, i, zone,
+		z = devm_thermal_zone_of_sensor_register(&pdev->dev,
+							 ttgs[i]->id, zone,
 							 &tegra_of_thermal_ops);
 		if (IS_ERR(z)) {
 			err = PTR_ERR(z);
diff --git a/include/dt-bindings/thermal/tegra124-soctherm.h b/include/dt-bindings/thermal/tegra124-soctherm.h
index 85aaf66690f9..729ab9fc325e 100644
--- a/include/dt-bindings/thermal/tegra124-soctherm.h
+++ b/include/dt-bindings/thermal/tegra124-soctherm.h
@@ -9,5 +9,6 @@
 #define TEGRA124_SOCTHERM_SENSOR_MEM 1
 #define TEGRA124_SOCTHERM_SENSOR_GPU 2
 #define TEGRA124_SOCTHERM_SENSOR_PLLX 3
+#define TEGRA124_SOCTHERM_SENSOR_NUM 4
 
 #endif
-- 
1.9.1

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#1355573 — [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack

FromWei Ni <wni@nvidia.com>
Date2016-03-11 04:20 +0100
Subject[PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack
Message-ID<rblMn-8se-25@gated-at.bofh.it>
In reply to#1355567
Get rid of T124-specific PDIV/HOTSPOT hack.
tegra-soctherm.c contained a hack to set the SENSOR_PDIV and
SENSOR_HOTSPOT_OFFSET registers - it just did two writes of
T124-specific opaque values.  Convert these into a form that can be
substituted on a per-chip basis, and into structure fields that have
at least some independent meaning.

Signed-off-by: Wei Ni <wni@nvidia.com>
---
 drivers/thermal/tegra/tegra-soctherm.c | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/thermal/tegra/tegra-soctherm.c b/drivers/thermal/tegra/tegra-soctherm.c
index b3ec0faa2bee..b4b791ebfbb6 100644
--- a/drivers/thermal/tegra/tegra-soctherm.c
+++ b/drivers/thermal/tegra/tegra-soctherm.c
@@ -48,14 +48,12 @@
 #define SENSOR_CONFIG2_THERMB_SHIFT		0
 
 #define SENSOR_PDIV				0x1c0
-#define SENSOR_PDIV_T124			0x8888
 #define SENSOR_PDIV_CPU_MASK			(0xf << 12)
 #define SENSOR_PDIV_GPU_MASK			(0xf << 8)
 #define SENSOR_PDIV_MEM_MASK			(0xf << 4)
 #define SENSOR_PDIV_PLLX_MASK			(0xf << 0)
 
 #define SENSOR_HOTSPOT_OFF			0x1c4
-#define SENSOR_HOTSPOT_OFF_T124			0x00060600
 #define SENSOR_HOTSPOT_CPU_MASK			(0xff << 16)
 #define SENSOR_HOTSPOT_GPU_MASK			(0xff << 8)
 #define SENSOR_HOTSPOT_MEM_MASK			(0xff << 0)
@@ -436,6 +434,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
 	struct resource *res;
 	unsigned int i;
 	int err;
+	u32 pdiv, hotspot;
 
 	const struct tegra_tsensor *tsensors = t124_tsensors;
 	const struct tegra_tsensor_group **ttgs = tegra124_tsensor_groups;
@@ -493,8 +492,19 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
 			goto disable_clocks;
 	}
 
-	writel(SENSOR_PDIV_T124, tegra->regs + SENSOR_PDIV);
-	writel(SENSOR_HOTSPOT_OFF_T124, tegra->regs + SENSOR_HOTSPOT_OFF);
+	/* Program pdiv and hotspot offsets per THERM */
+	pdiv = readl(tegra->regs + SENSOR_PDIV);
+	hotspot = readl(tegra->regs + SENSOR_HOTSPOT_OFF);
+	for (i = 0; i < TEGRA124_SOCTHERM_SENSOR_NUM; ++i) {
+		pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask,
+				    ttgs[i]->pdiv);
+		if (ttgs[i]->id != TEGRA124_SOCTHERM_SENSOR_PLLX)
+			hotspot =  REG_SET_MASK(hotspot,
+						ttgs[i]->pllx_hotspot_mask,
+						ttgs[i]->pllx_hotspot_diff);
+	}
+	writel(pdiv, tegra->regs + SENSOR_PDIV);
+	writel(hotspot, tegra->regs + SENSOR_HOTSPOT_OFF);
 
 	/* Initialize thermctl sensors */
 
-- 
1.9.1

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#1357588 — Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack

FromEduardo Valentin <edubezval@gmail.com>
Date2016-03-14 21:10 +0100
SubjectRe: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack
Message-ID<rcGYq-9Q-9@gated-at.bofh.it>
In reply to#1355573

[Multipart message — attachments visible in raw view] — view raw

On Fri, Mar 11, 2016 at 11:09:14AM +0800, Wei Ni wrote:
> Get rid of T124-specific PDIV/HOTSPOT hack.
> tegra-soctherm.c contained a hack to set the SENSOR_PDIV and
> SENSOR_HOTSPOT_OFFSET registers - it just did two writes of
> T124-specific opaque values.  Convert these into a form that can be
> substituted on a per-chip basis, and into structure fields that have
> at least some independent meaning.
> 
> Signed-off-by: Wei Ni <wni@nvidia.com>
> ---
>  drivers/thermal/tegra/tegra-soctherm.c | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/thermal/tegra/tegra-soctherm.c b/drivers/thermal/tegra/tegra-soctherm.c
> index b3ec0faa2bee..b4b791ebfbb6 100644
> --- a/drivers/thermal/tegra/tegra-soctherm.c
> +++ b/drivers/thermal/tegra/tegra-soctherm.c
> @@ -48,14 +48,12 @@
>  #define SENSOR_CONFIG2_THERMB_SHIFT		0
>  
>  #define SENSOR_PDIV				0x1c0
> -#define SENSOR_PDIV_T124			0x8888
>  #define SENSOR_PDIV_CPU_MASK			(0xf << 12)
>  #define SENSOR_PDIV_GPU_MASK			(0xf << 8)
>  #define SENSOR_PDIV_MEM_MASK			(0xf << 4)
>  #define SENSOR_PDIV_PLLX_MASK			(0xf << 0)
>  
>  #define SENSOR_HOTSPOT_OFF			0x1c4
> -#define SENSOR_HOTSPOT_OFF_T124			0x00060600
>  #define SENSOR_HOTSPOT_CPU_MASK			(0xff << 16)
>  #define SENSOR_HOTSPOT_GPU_MASK			(0xff << 8)
>  #define SENSOR_HOTSPOT_MEM_MASK			(0xff << 0)
> @@ -436,6 +434,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
>  	struct resource *res;
>  	unsigned int i;
>  	int err;
> +	u32 pdiv, hotspot;
>  
>  	const struct tegra_tsensor *tsensors = t124_tsensors;
>  	const struct tegra_tsensor_group **ttgs = tegra124_tsensor_groups;
> @@ -493,8 +492,19 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
>  			goto disable_clocks;
>  	}
>  
> -	writel(SENSOR_PDIV_T124, tegra->regs + SENSOR_PDIV);
> -	writel(SENSOR_HOTSPOT_OFF_T124, tegra->regs + SENSOR_HOTSPOT_OFF);
> +	/* Program pdiv and hotspot offsets per THERM */
> +	pdiv = readl(tegra->regs + SENSOR_PDIV);
> +	hotspot = readl(tegra->regs + SENSOR_HOTSPOT_OFF);
> +	for (i = 0; i < TEGRA124_SOCTHERM_SENSOR_NUM; ++i) {
> +		pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask,
> +				    ttgs[i]->pdiv);
> +		if (ttgs[i]->id != TEGRA124_SOCTHERM_SENSOR_PLLX)
> +			hotspot =  REG_SET_MASK(hotspot,
> +						ttgs[i]->pllx_hotspot_mask,
> +						ttgs[i]->pllx_hotspot_diff);
> +	}
> +	writel(pdiv, tegra->regs + SENSOR_PDIV);
> +	writel(hotspot, tegra->regs + SENSOR_HOTSPOT_OFF);

Is the above logic the same for all supported chips? e.g. do we always
skip pllx for hotspot configuration?


>  
>  	/* Initialize thermctl sensors */
>  
> -- 
> 1.9.1
>

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#1357824 — Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack

FromWei Ni <wni@nvidia.com>
Date2016-03-15 07:30 +0100
SubjectRe: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack
Message-ID<rcQEq-6J1-3@gated-at.bofh.it>
In reply to#1357588

On 2016年03月15日 04:05, Eduardo Valentin wrote:
> * PGP Signed by an unknown key
> 
> On Fri, Mar 11, 2016 at 11:09:14AM +0800, Wei Ni wrote:
>> Get rid of T124-specific PDIV/HOTSPOT hack.
>> tegra-soctherm.c contained a hack to set the SENSOR_PDIV and
>> SENSOR_HOTSPOT_OFFSET registers - it just did two writes of
>> T124-specific opaque values.  Convert these into a form that can be
>> substituted on a per-chip basis, and into structure fields that have
>> at least some independent meaning.
>>
>> Signed-off-by: Wei Ni <wni@nvidia.com>
>> ---
>>  drivers/thermal/tegra/tegra-soctherm.c | 18 ++++++++++++++----
>>  1 file changed, 14 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/thermal/tegra/tegra-soctherm.c b/drivers/thermal/tegra/tegra-soctherm.c
>> index b3ec0faa2bee..b4b791ebfbb6 100644
>> --- a/drivers/thermal/tegra/tegra-soctherm.c
>> +++ b/drivers/thermal/tegra/tegra-soctherm.c
>> @@ -48,14 +48,12 @@
>>  #define SENSOR_CONFIG2_THERMB_SHIFT		0
>>  
>>  #define SENSOR_PDIV				0x1c0
>> -#define SENSOR_PDIV_T124			0x8888
>>  #define SENSOR_PDIV_CPU_MASK			(0xf << 12)
>>  #define SENSOR_PDIV_GPU_MASK			(0xf << 8)
>>  #define SENSOR_PDIV_MEM_MASK			(0xf << 4)
>>  #define SENSOR_PDIV_PLLX_MASK			(0xf << 0)
>>  
>>  #define SENSOR_HOTSPOT_OFF			0x1c4
>> -#define SENSOR_HOTSPOT_OFF_T124			0x00060600
>>  #define SENSOR_HOTSPOT_CPU_MASK			(0xff << 16)
>>  #define SENSOR_HOTSPOT_GPU_MASK			(0xff << 8)
>>  #define SENSOR_HOTSPOT_MEM_MASK			(0xff << 0)
>> @@ -436,6 +434,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
>>  	struct resource *res;
>>  	unsigned int i;
>>  	int err;
>> +	u32 pdiv, hotspot;
>>  
>>  	const struct tegra_tsensor *tsensors = t124_tsensors;
>>  	const struct tegra_tsensor_group **ttgs = tegra124_tsensor_groups;
>> @@ -493,8 +492,19 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
>>  			goto disable_clocks;
>>  	}
>>  
>> -	writel(SENSOR_PDIV_T124, tegra->regs + SENSOR_PDIV);
>> -	writel(SENSOR_HOTSPOT_OFF_T124, tegra->regs + SENSOR_HOTSPOT_OFF);
>> +	/* Program pdiv and hotspot offsets per THERM */
>> +	pdiv = readl(tegra->regs + SENSOR_PDIV);
>> +	hotspot = readl(tegra->regs + SENSOR_HOTSPOT_OFF);
>> +	for (i = 0; i < TEGRA124_SOCTHERM_SENSOR_NUM; ++i) {
>> +		pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask,
>> +				    ttgs[i]->pdiv);
>> +		if (ttgs[i]->id != TEGRA124_SOCTHERM_SENSOR_PLLX)
>> +			hotspot =  REG_SET_MASK(hotspot,
>> +						ttgs[i]->pllx_hotspot_mask,
>> +						ttgs[i]->pllx_hotspot_diff);
>> +	}
>> +	writel(pdiv, tegra->regs + SENSOR_PDIV);
>> +	writel(hotspot, tegra->regs + SENSOR_HOTSPOT_OFF);
> 
> Is the above logic the same for all supported chips? e.g. do we always
> skip pllx for hotspot configuration?

Yes, this logic support Tegra124, Tegra210, and Tegra132 which I will send out
in next series.

> 
> 
>>  
>>  	/* Initialize thermctl sensors */
>>  
>> -- 
>> 1.9.1
>>
> 
> * Unknown Key
> * 0x7DA4E256
>

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#1358216 — Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack

FromEduardo Valentin <edubezval@gmail.com>
Date2016-03-15 21:00 +0100
SubjectRe: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack
Message-ID<rd3ih-6Hm-1@gated-at.bofh.it>
In reply to#1357824

[Multipart message — attachments visible in raw view] — view raw

On Tue, Mar 15, 2016 at 02:21:53PM +0800, Wei Ni wrote:
> 
> 
> On 2016年03月15日 04:05, Eduardo Valentin wrote:
> > * PGP Signed by an unknown key
> > 
> > On Fri, Mar 11, 2016 at 11:09:14AM +0800, Wei Ni wrote:
> >> Get rid of T124-specific PDIV/HOTSPOT hack.
> >> tegra-soctherm.c contained a hack to set the SENSOR_PDIV and
> >> SENSOR_HOTSPOT_OFFSET registers - it just did two writes of
> >> T124-specific opaque values.  Convert these into a form that can be
> >> substituted on a per-chip basis, and into structure fields that have
> >> at least some independent meaning.
> >>
> >> Signed-off-by: Wei Ni <wni@nvidia.com>
> >> ---
> >>  drivers/thermal/tegra/tegra-soctherm.c | 18 ++++++++++++++----
> >>  1 file changed, 14 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/thermal/tegra/tegra-soctherm.c b/drivers/thermal/tegra/tegra-soctherm.c
> >> index b3ec0faa2bee..b4b791ebfbb6 100644
> >> --- a/drivers/thermal/tegra/tegra-soctherm.c
> >> +++ b/drivers/thermal/tegra/tegra-soctherm.c
> >> @@ -48,14 +48,12 @@
> >>  #define SENSOR_CONFIG2_THERMB_SHIFT		0
> >>  
> >>  #define SENSOR_PDIV				0x1c0
> >> -#define SENSOR_PDIV_T124			0x8888
> >>  #define SENSOR_PDIV_CPU_MASK			(0xf << 12)
> >>  #define SENSOR_PDIV_GPU_MASK			(0xf << 8)
> >>  #define SENSOR_PDIV_MEM_MASK			(0xf << 4)
> >>  #define SENSOR_PDIV_PLLX_MASK			(0xf << 0)
> >>  
> >>  #define SENSOR_HOTSPOT_OFF			0x1c4
> >> -#define SENSOR_HOTSPOT_OFF_T124			0x00060600
> >>  #define SENSOR_HOTSPOT_CPU_MASK			(0xff << 16)
> >>  #define SENSOR_HOTSPOT_GPU_MASK			(0xff << 8)
> >>  #define SENSOR_HOTSPOT_MEM_MASK			(0xff << 0)
> >> @@ -436,6 +434,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
> >>  	struct resource *res;
> >>  	unsigned int i;
> >>  	int err;
> >> +	u32 pdiv, hotspot;
> >>  
> >>  	const struct tegra_tsensor *tsensors = t124_tsensors;
> >>  	const struct tegra_tsensor_group **ttgs = tegra124_tsensor_groups;
> >> @@ -493,8 +492,19 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
> >>  			goto disable_clocks;
> >>  	}
> >>  
> >> -	writel(SENSOR_PDIV_T124, tegra->regs + SENSOR_PDIV);
> >> -	writel(SENSOR_HOTSPOT_OFF_T124, tegra->regs + SENSOR_HOTSPOT_OFF);
> >> +	/* Program pdiv and hotspot offsets per THERM */
> >> +	pdiv = readl(tegra->regs + SENSOR_PDIV);
> >> +	hotspot = readl(tegra->regs + SENSOR_HOTSPOT_OFF);
> >> +	for (i = 0; i < TEGRA124_SOCTHERM_SENSOR_NUM; ++i) {
> >> +		pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask,
> >> +				    ttgs[i]->pdiv);
> >> +		if (ttgs[i]->id != TEGRA124_SOCTHERM_SENSOR_PLLX)
> >> +			hotspot =  REG_SET_MASK(hotspot,
> >> +						ttgs[i]->pllx_hotspot_mask,
> >> +						ttgs[i]->pllx_hotspot_diff);
> >> +	}
> >> +	writel(pdiv, tegra->regs + SENSOR_PDIV);
> >> +	writel(hotspot, tegra->regs + SENSOR_HOTSPOT_OFF);
> > 
> > Is the above logic the same for all supported chips? e.g. do we always
> > skip pllx for hotspot configuration?
> 
> Yes, this logic support Tegra124, Tegra210, and Tegra132 which I will send out
> in next series.


Ok. Could you please add a comment then explaining why pllx is not
needed for the hotspot configuration?

> 
> > 
> > 
> >>  
> >>  	/* Initialize thermctl sensors */
> >>  
> >> -- 
> >> 1.9.1
> >>
> > 
> > * Unknown Key
> > * 0x7DA4E256
> >

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#1358510 — Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack

FromWei Ni <wni@nvidia.com>
Date2016-03-16 04:50 +0100
SubjectRe: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack
Message-ID<rdaD8-3du-1@gated-at.bofh.it>
In reply to#1358216

On 2016年03月16日 03:56, Eduardo Valentin wrote:
> * PGP Signed by an unknown key
> 
> On Tue, Mar 15, 2016 at 02:21:53PM +0800, Wei Ni wrote:
>>
>>
>> On 2016年03月15日 04:05, Eduardo Valentin wrote:
>>>> Old Signed by an unknown key
>>>
>>> On Fri, Mar 11, 2016 at 11:09:14AM +0800, Wei Ni wrote:
>>>> Get rid of T124-specific PDIV/HOTSPOT hack.
>>>> tegra-soctherm.c contained a hack to set the SENSOR_PDIV and
>>>> SENSOR_HOTSPOT_OFFSET registers - it just did two writes of
>>>> T124-specific opaque values.  Convert these into a form that can be
>>>> substituted on a per-chip basis, and into structure fields that have
>>>> at least some independent meaning.
>>>>
>>>> Signed-off-by: Wei Ni <wni@nvidia.com>
>>>> ---
>>>>  drivers/thermal/tegra/tegra-soctherm.c | 18 ++++++++++++++----
>>>>  1 file changed, 14 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/drivers/thermal/tegra/tegra-soctherm.c b/drivers/thermal/tegra/tegra-soctherm.c
>>>> index b3ec0faa2bee..b4b791ebfbb6 100644
>>>> --- a/drivers/thermal/tegra/tegra-soctherm.c
>>>> +++ b/drivers/thermal/tegra/tegra-soctherm.c
>>>> @@ -48,14 +48,12 @@
>>>>  #define SENSOR_CONFIG2_THERMB_SHIFT		0
>>>>  
>>>>  #define SENSOR_PDIV				0x1c0
>>>> -#define SENSOR_PDIV_T124			0x8888
>>>>  #define SENSOR_PDIV_CPU_MASK			(0xf << 12)
>>>>  #define SENSOR_PDIV_GPU_MASK			(0xf << 8)
>>>>  #define SENSOR_PDIV_MEM_MASK			(0xf << 4)
>>>>  #define SENSOR_PDIV_PLLX_MASK			(0xf << 0)
>>>>  
>>>>  #define SENSOR_HOTSPOT_OFF			0x1c4
>>>> -#define SENSOR_HOTSPOT_OFF_T124			0x00060600
>>>>  #define SENSOR_HOTSPOT_CPU_MASK			(0xff << 16)
>>>>  #define SENSOR_HOTSPOT_GPU_MASK			(0xff << 8)
>>>>  #define SENSOR_HOTSPOT_MEM_MASK			(0xff << 0)
>>>> @@ -436,6 +434,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
>>>>  	struct resource *res;
>>>>  	unsigned int i;
>>>>  	int err;
>>>> +	u32 pdiv, hotspot;
>>>>  
>>>>  	const struct tegra_tsensor *tsensors = t124_tsensors;
>>>>  	const struct tegra_tsensor_group **ttgs = tegra124_tsensor_groups;
>>>> @@ -493,8 +492,19 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
>>>>  			goto disable_clocks;
>>>>  	}
>>>>  
>>>> -	writel(SENSOR_PDIV_T124, tegra->regs + SENSOR_PDIV);
>>>> -	writel(SENSOR_HOTSPOT_OFF_T124, tegra->regs + SENSOR_HOTSPOT_OFF);
>>>> +	/* Program pdiv and hotspot offsets per THERM */
>>>> +	pdiv = readl(tegra->regs + SENSOR_PDIV);
>>>> +	hotspot = readl(tegra->regs + SENSOR_HOTSPOT_OFF);
>>>> +	for (i = 0; i < TEGRA124_SOCTHERM_SENSOR_NUM; ++i) {
>>>> +		pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask,
>>>> +				    ttgs[i]->pdiv);
>>>> +		if (ttgs[i]->id != TEGRA124_SOCTHERM_SENSOR_PLLX)
>>>> +			hotspot =  REG_SET_MASK(hotspot,
>>>> +						ttgs[i]->pllx_hotspot_mask,
>>>> +						ttgs[i]->pllx_hotspot_diff);
>>>> +	}
>>>> +	writel(pdiv, tegra->regs + SENSOR_PDIV);
>>>> +	writel(hotspot, tegra->regs + SENSOR_HOTSPOT_OFF);
>>>
>>> Is the above logic the same for all supported chips? e.g. do we always
>>> skip pllx for hotspot configuration?
>>
>> Yes, this logic support Tegra124, Tegra210, and Tegra132 which I will send out
>> in next series.
> 
> 
> Ok. Could you please add a comment then explaining why pllx is not
> needed for the hotspot configuration?

This is the hotspot offset from PLLX, so we doesn't need to configure for PLLX,
the Tegra DRM introduced it.
I will add comment for it.

> 
>>
>>>
>>>
>>>>  
>>>>  	/* Initialize thermctl sensors */
>>>>  
>>>> -- 
>>>> 1.9.1
>>>>
>>>
>>> * Unknown Key
>>> * 0x7DA4E256
>>>
> 
> * Unknown Key
> * 0x7DA4E256
>

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#1357629

FromEduardo Valentin <edubezval@gmail.com>
Date2016-03-14 22:10 +0100
Message-ID<rcHUu-LG-21@gated-at.bofh.it>
In reply to#1355567

[Multipart message — attachments visible in raw view] — view raw

On Fri, Mar 11, 2016 at 11:09:11AM +0800, Wei Ni wrote:
> This patchset adds following functions for tegra_soctherm driver:
> 1. add T210 support.

It would be good to update the compatible string in the binding
documentation.

> 2. export debugfs to show some registers.
> 3. add thermtrip funciton.
> 4. add suspend/resume function.

Thanks for your effort in keeping up with upstream. I think overall the
series is good, I had only very few comments (in response to each
patch).

BR,

Eduardo Valentin


> 
> 
> -- 
> 1.9.1
>

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#1357811

FromWei Ni <wni@nvidia.com>
Date2016-03-15 06:50 +0100
Message-ID<rcQ1H-6eo-1@gated-at.bofh.it>
In reply to#1357629

On 2016年03月15日 05:01, Eduardo Valentin wrote:
> * PGP Signed by an unknown key
> 
> On Fri, Mar 11, 2016 at 11:09:11AM +0800, Wei Ni wrote:
>> This patchset adds following functions for tegra_soctherm driver:
>> 1. add T210 support.
> 
> It would be good to update the compatible string in the binding
> documentation.

The commit "193c9d23a0f0 Documentation: DT bindings: add more Tegra chip
compatible strings" already add compatible string for Tegra210.

> 
>> 2. export debugfs to show some registers.
>> 3. add thermtrip funciton.
>> 4. add suspend/resume function.
> 
> Thanks for your effort in keeping up with upstream. I think overall the
> series is good, I had only very few comments (in response to each
> patch).

Thanks for your review. I will check these comments, and update my patches in
next few days.

Wei.

> 
> BR,
> 
> Eduardo Valentin
> 
> 
>>
>>
>> -- 
>> 1.9.1
>>
> 
> * Unknown Key
> * 0x7DA4E256
>

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