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| Started by | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| First post | 2016-03-09 11:30 +0100 |
| Last post | 2016-03-09 11:30 +0100 |
| Articles | 4 on this page of 24 — 5 participants |
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[PATCH v2 00/18] Add Initial support for PLX Technology OX810SE Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
[PATCH v2 03/18] irqchip: versatile-fpga: add new arm,rps-irq compatible Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
Re: [PATCH v2 03/18] irqchip: versatile-fpga: add new arm,rps-irq compatible Marc Zyngier <marc.zyngier@arm.com> - 2016-03-15 12:50 +0100
[PATCH v2 18/18] arm: boot: dts: Add Western Digital My Book World Edition device tree Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
[PATCH v2 08/18] dt-bindings: Add PLX Technology Reset Controller bindings Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
Re: [PATCH v2 08/18] dt-bindings: Add PLX Technology Reset Controller bindings Rob Herring <robh@kernel.org> - 2016-03-17 18:20 +0100
[PATCH v2 13/18] arm: Add new mach-oxnas Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
[PATCH v2 07/18] reset: Add PLX Technology Reset Controller driver Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
[PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Rob Herring <robh@kernel.org> - 2016-03-17 18:10 +0100
Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Robin Murphy <robin.murphy@arm.com> - 2016-03-17 19:10 +0100
Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Rob Herring <robh@kernel.org> - 2016-03-17 20:10 +0100
Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Robin Murphy <robin.murphy@arm.com> - 2016-03-17 20:30 +0100
Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Neil Armstrong <narmstrong@baylibre.com> - 2016-03-22 10:30 +0100
Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Robin Murphy <robin.murphy@arm.com> - 2016-03-22 13:10 +0100
Re: [PATCH v2 02/18] dt-bindings: timer: sp804: add timer-width property Neil Armstrong <narmstrong@baylibre.com> - 2016-03-22 15:40 +0100
[PATCH v2 14/18] arm: Add build support for mach-oxnas Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
[PATCH v2 06/18] dt-bindings: Add Oxford Semiconductors to vendor prefixes Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
Re: [PATCH v2 06/18] dt-bindings: Add Oxford Semiconductors to vendor prefixes Rob Herring <robh@kernel.org> - 2016-03-17 18:20 +0100
[PATCH v2 04/18] dt-bindings: irq: arm,versatile-fpga: add arm,rps-irq compatible string Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
Re: [PATCH v2 04/18] dt-bindings: irq: arm,versatile-fpga: add arm,rps-irq compatible string Rob Herring <robh@kernel.org> - 2016-03-17 18:20 +0100
[PATCH v2 01/18] clocksource: sp804: Add support for non-32bit width counter Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
Re: [PATCH v2 01/18] clocksource: sp804: Add support for non-32bit width counter Daniel Lezcano <daniel.lezcano@linaro.org> - 2016-03-17 17:50 +0100
[PATCH v2 17/18] dt-bindings: Add Western Digital to vendor prefixes Neil Armstrong <narmstrong@baylibre.com> - 2016-03-09 11:30 +0100
Page 2 of 2 — ← Prev page 1 [2]
| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2016-03-17 18:20 +0100 |
| Subject | Re: [PATCH v2 04/18] dt-bindings: irq: arm,versatile-fpga: add arm,rps-irq compatible string |
| Message-ID | <rdJKy-1PB-1@gated-at.bofh.it> |
| In reply to | #1353967 |
On Wed, Mar 09, 2016 at 11:24:06AM +0100, Neil Armstrong wrote: > Under the OX810SE, this same controller is used as "Reference Peripheral > Specification" Interrupt Controller, so add new compatible string. > > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > .../devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt > index c9cf605..2fe78d5 100644 > --- a/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt > +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,versatile-fpga-irq.txt > @@ -6,7 +6,7 @@ controllers are OR:ed together and fed to the CPU tile's IRQ input. Each > instance can handle up to 32 interrupts. > > Required properties: > -- compatible: "arm,versatile-fpga-irq" > +- compatible: "arm,versatile-fpga-irq" or "arm,rps-irq" Use a compatible string that reflects the actual implementation not a spec. The current string is a bad example as it already refers to multiple implementations. Rob
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| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2016-03-09 11:30 +0100 |
| Subject | [PATCH v2 01/18] clocksource: sp804: Add support for non-32bit width counter |
| Message-ID | <raJxq-6vl-87@gated-at.bofh.it> |
| In reply to | #1353954 |
Some vendor variants can implement norrower counter width, add
an optional DT property changing the clocksource width and the
clockevent mask, but keeping 32bit as default for legacy interface.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/clocksource/timer-sp804.c | 38 +++++++++++++++++++++++++++-----------
include/clocksource/timer-sp804.h | 11 ++++++-----
2 files changed, 33 insertions(+), 16 deletions(-)
diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c
index 5f45b9a..8acf524 100644
--- a/drivers/clocksource/timer-sp804.c
+++ b/drivers/clocksource/timer-sp804.c
@@ -80,7 +80,8 @@ void __init sp804_timer_disable(void __iomem *base)
void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
const char *name,
struct clk *clk,
- int use_sched_clock)
+ int use_sched_clock,
+ unsigned width)
{
long rate;
@@ -93,6 +94,9 @@ void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
}
}
+ if (!width || width > 32)
+ width = 32;
+
rate = sp804_get_clock_rate(clk);
if (rate < 0)
@@ -106,11 +110,11 @@ void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
base + TIMER_CTRL);
clocksource_mmio_init(base + TIMER_VALUE, name,
- rate, 200, 32, clocksource_mmio_readl_down);
+ rate, 200, width, clocksource_mmio_readl_down);
if (use_sched_clock) {
sched_clock_base = base;
- sched_clock_register(sp804_read, 32, rate);
+ sched_clock_register(sp804_read, width, rate);
}
}
@@ -186,7 +190,9 @@ static struct irqaction sp804_timer_irq = {
.dev_id = &sp804_clockevent,
};
-void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struct clk *clk, const char *name)
+void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq,
+ struct clk *clk, const char *name,
+ unsigned width)
{
struct clock_event_device *evt = &sp804_clockevent;
long rate;
@@ -199,6 +205,9 @@ void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struc
return;
}
+ if (!width || width > 32)
+ width = 32;
+
rate = sp804_get_clock_rate(clk);
if (rate < 0)
return;
@@ -212,7 +221,7 @@ void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struc
writel(0, base + TIMER_CTRL);
setup_irq(irq, &sp804_timer_irq);
- clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
+ clockevents_config_and_register(evt, rate, 0xf, GENMASK(width-1, 0));
}
static void __init sp804_of_init(struct device_node *np)
@@ -223,6 +232,7 @@ static void __init sp804_of_init(struct device_node *np)
u32 irq_num = 0;
struct clk *clk1, *clk2;
const char *name = of_get_property(np, "compatible", NULL);
+ u32 width = 32;
base = of_iomap(np, 0);
if (WARN_ON(!base))
@@ -254,14 +264,19 @@ static void __init sp804_of_init(struct device_node *np)
if (irq <= 0)
goto err;
+ /* Some vendor variants can have a different counter width */
+ of_property_read_u32(np, "arm,timer-width", &width);
+
of_property_read_u32(np, "arm,sp804-has-irq", &irq_num);
if (irq_num == 2) {
- __sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name);
- __sp804_clocksource_and_sched_clock_init(base, name, clk1, 1);
+ __sp804_clockevents_init(base + TIMER_2_BASE, irq,
+ clk2, name, width);
+ __sp804_clocksource_and_sched_clock_init(base, name,
+ clk1, 1, width);
} else {
- __sp804_clockevents_init(base, irq, clk1 , name);
+ __sp804_clockevents_init(base, irq, clk1, name, width);
__sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE,
- name, clk2, 1);
+ name, clk2, 1, width);
}
initialized = true;
@@ -293,13 +308,14 @@ static void __init integrator_cp_of_init(struct device_node *np)
goto err;
if (!init_count)
- __sp804_clocksource_and_sched_clock_init(base, name, clk, 0);
+ __sp804_clocksource_and_sched_clock_init(base, name,
+ clk, 0, 32);
else {
irq = irq_of_parse_and_map(np, 0);
if (irq <= 0)
goto err;
- __sp804_clockevents_init(base, irq, clk, name);
+ __sp804_clockevents_init(base, irq, clk, name, 32);
}
init_count++;
diff --git a/include/clocksource/timer-sp804.h b/include/clocksource/timer-sp804.h
index 1f8a1ca..ad71fcb 100644
--- a/include/clocksource/timer-sp804.h
+++ b/include/clocksource/timer-sp804.h
@@ -4,25 +4,26 @@
struct clk;
void __sp804_clocksource_and_sched_clock_init(void __iomem *,
- const char *, struct clk *, int);
+ const char *, struct clk *,
+ int, unsigned);
void __sp804_clockevents_init(void __iomem *, unsigned int,
- struct clk *, const char *);
+ struct clk *, const char *, unsigned);
void sp804_timer_disable(void __iomem *);
static inline void sp804_clocksource_init(void __iomem *base, const char *name)
{
- __sp804_clocksource_and_sched_clock_init(base, name, NULL, 0);
+ __sp804_clocksource_and_sched_clock_init(base, name, NULL, 0, 32);
}
static inline void sp804_clocksource_and_sched_clock_init(void __iomem *base,
const char *name)
{
- __sp804_clocksource_and_sched_clock_init(base, name, NULL, 1);
+ __sp804_clocksource_and_sched_clock_init(base, name, NULL, 1, 32);
}
static inline void sp804_clockevents_init(void __iomem *base, unsigned int irq, const char *name)
{
- __sp804_clockevents_init(base, irq, NULL, name);
+ __sp804_clockevents_init(base, irq, NULL, name, 32);
}
#endif
--
1.9.1
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| From | Daniel Lezcano <daniel.lezcano@linaro.org> |
|---|---|
| Date | 2016-03-17 17:50 +0100 |
| Subject | Re: [PATCH v2 01/18] clocksource: sp804: Add support for non-32bit width counter |
| Message-ID | <rdJhy-1oX-49@gated-at.bofh.it> |
| In reply to | #1353968 |
On 03/09/2016 11:24 AM, Neil Armstrong wrote:
> Some vendor variants can implement norrower counter width, add
> an optional DT property changing the clocksource width and the
> clockevent mask, but keeping 32bit as default for legacy interface.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> drivers/clocksource/timer-sp804.c | 38 +++++++++++++++++++++++++++-----------
> include/clocksource/timer-sp804.h | 11 ++++++-----
> 2 files changed, 33 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c
> index 5f45b9a..8acf524 100644
> --- a/drivers/clocksource/timer-sp804.c
> +++ b/drivers/clocksource/timer-sp804.c
> @@ -80,7 +80,8 @@ void __init sp804_timer_disable(void __iomem *base)
> void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
> const char *name,
> struct clk *clk,
> - int use_sched_clock)
> + int use_sched_clock,
> + unsigned width)
> {
> long rate;
>
> @@ -93,6 +94,9 @@ void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
> }
> }
>
> + if (!width || width > 32)
> + width = 32;
> +
check comment below in the caller function.
> rate = sp804_get_clock_rate(clk);
>
> if (rate < 0)
> @@ -106,11 +110,11 @@ void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
> base + TIMER_CTRL);
>
> clocksource_mmio_init(base + TIMER_VALUE, name,
> - rate, 200, 32, clocksource_mmio_readl_down);
> + rate, 200, width, clocksource_mmio_readl_down);
>
> if (use_sched_clock) {
> sched_clock_base = base;
> - sched_clock_register(sp804_read, 32, rate);
> + sched_clock_register(sp804_read, width, rate);
> }
> }
>
> @@ -186,7 +190,9 @@ static struct irqaction sp804_timer_irq = {
> .dev_id = &sp804_clockevent,
> };
>
> -void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struct clk *clk, const char *name)
> +void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq,
> + struct clk *clk, const char *name,
> + unsigned width)
> {
> struct clock_event_device *evt = &sp804_clockevent;
> long rate;
> @@ -199,6 +205,9 @@ void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struc
> return;
> }
>
> + if (!width || width > 32)
> + width = 32;
Check comment below in the caller function.
> rate = sp804_get_clock_rate(clk);
> if (rate < 0)
> return;
> @@ -212,7 +221,7 @@ void __init __sp804_clockevents_init(void __iomem *base, unsigned int irq, struc
> writel(0, base + TIMER_CTRL);
>
> setup_irq(irq, &sp804_timer_irq);
> - clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);
> + clockevents_config_and_register(evt, rate, 0xf, GENMASK(width-1, 0));
This GENMASK is strange here. Nothing else than this ?
> }
>
> static void __init sp804_of_init(struct device_node *np)
> @@ -223,6 +232,7 @@ static void __init sp804_of_init(struct device_node *np)
> u32 irq_num = 0;
> struct clk *clk1, *clk2;
> const char *name = of_get_property(np, "compatible", NULL);
> + u32 width = 32;
>
> base = of_iomap(np, 0);
> if (WARN_ON(!base))
> @@ -254,14 +264,19 @@ static void __init sp804_of_init(struct device_node *np)
> if (irq <= 0)
> goto err;
>
> + /* Some vendor variants can have a different counter width */
> + of_property_read_u32(np, "arm,timer-width", &width);
> +
Better to do the sanity check when the value is read.
Here, you can default to 32 if the width is 0 instead of initializing to
32 then read the property and call __sp804_clockevents_init which in
turn check zero or more and set it to 32 again.
> of_property_read_u32(np, "arm,sp804-has-irq", &irq_num);
> if (irq_num == 2) {
> - __sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name);
> - __sp804_clocksource_and_sched_clock_init(base, name, clk1, 1);
> + __sp804_clockevents_init(base + TIMER_2_BASE, irq,
> + clk2, name, width);
> + __sp804_clocksource_and_sched_clock_init(base, name,
> + clk1, 1, width);
> } else {
> - __sp804_clockevents_init(base, irq, clk1 , name);
> + __sp804_clockevents_init(base, irq, clk1, name, width);
> __sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE,
> - name, clk2, 1);
> + name, clk2, 1, width);
> }
> initialized = true;
>
> @@ -293,13 +308,14 @@ static void __init integrator_cp_of_init(struct device_node *np)
> goto err;
>
> if (!init_count)
> - __sp804_clocksource_and_sched_clock_init(base, name, clk, 0);
> + __sp804_clocksource_and_sched_clock_init(base, name,
> + clk, 0, 32);
> else {
> irq = irq_of_parse_and_map(np, 0);
> if (irq <= 0)
> goto err;
>
> - __sp804_clockevents_init(base, irq, clk, name);
> + __sp804_clockevents_init(base, irq, clk, name, 32);
> }
>
> init_count++;
> diff --git a/include/clocksource/timer-sp804.h b/include/clocksource/timer-sp804.h
> index 1f8a1ca..ad71fcb 100644
> --- a/include/clocksource/timer-sp804.h
> +++ b/include/clocksource/timer-sp804.h
> @@ -4,25 +4,26 @@
> struct clk;
>
> void __sp804_clocksource_and_sched_clock_init(void __iomem *,
> - const char *, struct clk *, int);
> + const char *, struct clk *,
> + int, unsigned);
> void __sp804_clockevents_init(void __iomem *, unsigned int,
> - struct clk *, const char *);
> + struct clk *, const char *, unsigned);
> void sp804_timer_disable(void __iomem *);
>
> static inline void sp804_clocksource_init(void __iomem *base, const char *name)
> {
> - __sp804_clocksource_and_sched_clock_init(base, name, NULL, 0);
> + __sp804_clocksource_and_sched_clock_init(base, name, NULL, 0, 32);
> }
>
> static inline void sp804_clocksource_and_sched_clock_init(void __iomem *base,
> const char *name)
> {
> - __sp804_clocksource_and_sched_clock_init(base, name, NULL, 1);
> + __sp804_clocksource_and_sched_clock_init(base, name, NULL, 1, 32);
> }
>
> static inline void sp804_clockevents_init(void __iomem *base, unsigned int irq, const char *name)
> {
> - __sp804_clockevents_init(base, irq, NULL, name);
> + __sp804_clockevents_init(base, irq, NULL, name, 32);
>
> }
> #endif
>
--
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| From | Neil Armstrong <narmstrong@baylibre.com> |
|---|---|
| Date | 2016-03-09 11:30 +0100 |
| Subject | [PATCH v2 17/18] dt-bindings: Add Western Digital to vendor prefixes |
| Message-ID | <raJxq-6vl-89@gated-at.bofh.it> |
| In reply to | #1353954 |
Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 188671f..968d3f4 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -249,6 +249,7 @@ via VIA Technologies, Inc. virtio Virtual I/O Device Specification, developed by the OASIS consortium vivante Vivante Corporation voipac Voipac Technologies s.r.o. +wd Western Digital Corp. wexler Wexler winbond Winbond Electronics corp. wlf Wolfson Microelectronics -- 1.9.1
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