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[PATCH V2 net 0/6] net: hns: hns driver updates

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  [PATCH V2 net 0/6] net: hns: hns driver updates Daode Huang <huangdaode@hisilicon.com> - 2016-03-11 10:00 +0100
    [PATCH V2 net 5/6] net: hns: fixed service-ges setting MAC-addr bug Daode Huang <huangdaode@hisilicon.com> - 2016-03-11 10:00 +0100
    [PATCH V2 net 2/6] net: hns: fixes the hw interrupt bug in using napi Daode Huang <huangdaode@hisilicon.com> - 2016-03-11 10:00 +0100
    [PATCH V2 net 6/6] net: hns: bug fix of getting hilink status Daode Huang <huangdaode@hisilicon.com> - 2016-03-11 10:00 +0100
    [PATCH V2 net 4/6] net: hns: adds uc match for debug port Daode Huang <huangdaode@hisilicon.com> - 2016-03-11 10:00 +0100
    [PATCH V2 net 1/6] net: hns: bug fix about the overflow of mss Daode Huang <huangdaode@hisilicon.com> - 2016-03-11 10:00 +0100
    Re: [PATCH V2 net 0/6] net: hns: hns driver updates Daode Huang <huangdaode@hisilicon.com> - 2016-03-15 03:00 +0100
      Re: [PATCH V2 net 0/6] net: hns: hns driver updates David Miller <davem@davemloft.net> - 2016-03-15 03:50 +0100
        Re: [PATCH V2 net 0/6] net: hns: hns driver updates Daode Huang <huangdaode@hisilicon.com> - 2016-03-15 07:50 +0100

#1355719 — [PATCH V2 net 0/6] net: hns: hns driver updates

Hi Dave,

This patch series are hisilicon network driver bug fix.
please merge them to the net repo.
Thanks

Daode Huang
---
changlog
v2: some minor change according to 
    MBR Sergei <sergei.shtylyov@cogentembedded.com> in
    [patch 3/6] [patch 4/6].

v1: initial version.

Daode Huang (6):
  net: hns: bug fix about the overflow of mss
  net: hns: fixes the hw interrupt bug in using napi
  net: hns: fixed portid bug in sending manage pkt
  net: hns: adds uc match for debug port
  net: hns: fixed service-ges setting MAC-addr bug
  net: hns: bug fix of getting hilink status

 drivers/net/ethernet/hisilicon/hns/hnae.h          |  3 ++
 drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c  |  1 +
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c | 29 +++++++++++----
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 41 ++++++++++++----------
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  |  4 +++
 drivers/net/ethernet/hisilicon/hns/hns_enet.c      | 32 +++++++++--------
 6 files changed, 70 insertions(+), 40 deletions(-)

-- 
1.9.1

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#1355721 — [PATCH V2 net 5/6] net: hns: fixed service-ges setting MAC-addr bug

from: Sheng Li <lisheng011@huawei.com>

Service gmacs can not set mac add, this patch will fix the bug.

Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
Signed-off-by: Sheng Li <lisheng011@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c
index 2591a51..eb86178 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c
@@ -414,18 +414,17 @@ static void hns_gmac_set_mac_addr(void *mac_drv, char *mac_addr)
 {
 	struct mac_driver *drv = (struct mac_driver *)mac_drv;
 
-	if (drv->mac_id >= DSAF_SERVICE_NW_NUM) {
-		u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
+	u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
 
-		u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
-			| (mac_addr[3] << 16) | (mac_addr[2] << 24);
+	u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
+		| (mac_addr[3] << 16) | (mac_addr[2] << 24);
 
-		u32 val = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
-		u32 sta_addr_en = dsaf_get_bit(val, GMAC_ADDR_EN_B);
-		dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val);
-		dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG,
-			       high_val | (sta_addr_en << GMAC_ADDR_EN_B));
-	}
+	u32 val = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
+	u32 sta_addr_en = dsaf_get_bit(val, GMAC_ADDR_EN_B);
+
+	dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val);
+	dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG,
+		       high_val | (sta_addr_en << GMAC_ADDR_EN_B));
 }
 
 static int hns_gmac_config_loopback(void *mac_drv, enum hnae_loop loop_mode,
-- 
1.9.1

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#1355723 — [PATCH V2 net 2/6] net: hns: fixes the hw interrupt bug in using napi

In V1 chip, common_poll should check and clean fbd pkts, because it
can not pend irq to clean them if there is no new pkt comes in.
But V2 chip hw fixes this bug, and will pend irq itself to do this.
So, for V2 chip, we set ring_data->fini_process to NULL.

Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
Signed-off-by: Sheng Li <lisheng011@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns/hns_enet.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_enet.c b/drivers/net/ethernet/hisilicon/hns/hns_enet.c
index 9d46d57..6250a42 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_enet.c
@@ -946,8 +946,8 @@ static int hns_nic_common_poll(struct napi_struct *napi, int budget)
 		napi_complete(napi);
 		ring_data->ring->q->handle->dev->ops->toggle_ring_irq(
 			ring_data->ring, 0);
-
-		ring_data->fini_process(ring_data);
+		if (ring_data->fini_process)
+			ring_data->fini_process(ring_data);
 		return 0;
 	}
 
@@ -1710,6 +1710,7 @@ static int hns_nic_init_ring_data(struct hns_nic_priv *priv)
 {
 	struct hnae_handle *h = priv->ae_handle;
 	struct hns_nic_ring_data *rd;
+	bool is_ver1 = AE_IS_VER1(priv->enet_ver);
 	int i;
 
 	if (h->q_num > NIC_MAX_Q_PER_VF) {
@@ -1727,7 +1728,7 @@ static int hns_nic_init_ring_data(struct hns_nic_priv *priv)
 		rd->queue_index = i;
 		rd->ring = &h->qs[i]->tx_ring;
 		rd->poll_one = hns_nic_tx_poll_one;
-		rd->fini_process = hns_nic_tx_fini_pro;
+		rd->fini_process = is_ver1 ? hns_nic_tx_fini_pro : NULL;
 
 		netif_napi_add(priv->netdev, &rd->napi,
 			       hns_nic_common_poll, NIC_TX_CLEAN_MAX_NUM);
@@ -1739,7 +1740,7 @@ static int hns_nic_init_ring_data(struct hns_nic_priv *priv)
 		rd->ring = &h->qs[i - h->q_num]->rx_ring;
 		rd->poll_one = hns_nic_rx_poll_one;
 		rd->ex_process = hns_nic_rx_up_pro;
-		rd->fini_process = hns_nic_rx_fini_pro;
+		rd->fini_process = is_ver1 ? hns_nic_rx_fini_pro : NULL;
 
 		netif_napi_add(priv->netdev, &rd->napi,
 			       hns_nic_common_poll, NIC_RX_CLEAN_MAX_NUM);
-- 
1.9.1

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#1355726 — [PATCH V2 net 6/6] net: hns: bug fix of getting hilink status

There are some differences in hilink status defination between
v1 and v2 chips.
for v1 chip, all ports connected to the same hilink share the same
hilink status register bit.
but for v2, all ports have separately hilink status register bit. And
the register addr is also changed.
So this patch fixes the bug.

Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
Signed-off-by: Sheng Li <lisheng011@huawei.com>
---
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 41 ++++++++++++----------
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  |  2 ++
 2 files changed, 24 insertions(+), 19 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
index 607c3be..8c32ff6 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c
@@ -240,35 +240,38 @@ void hns_ppe_com_srst(struct ppe_common_cb *ppe_common, u32 val)
 /**
  * hns_mac_get_sds_mode - get phy ifterface form serdes mode
  * @mac_cb: mac control block
- * retuen phy interface
+ * return phy interface
  */
 phy_interface_t hns_mac_get_phy_if(struct hns_mac_cb *mac_cb)
 {
-	u32 hilink3_mode;
-	u32 hilink4_mode;
+	u32 reg, mode, shift;
 	void __iomem *sys_ctl_vaddr = mac_cb->sys_ctl_vaddr;
-	int dev_id = mac_cb->mac_id;
+	int mac_id = mac_cb->mac_id;
 	phy_interface_t phy_if = PHY_INTERFACE_MODE_NA;
+	bool is_ver1 = AE_IS_VER1(mac_cb->dsaf_dev->dsaf_ver);
 
-	hilink3_mode = dsaf_read_reg(sys_ctl_vaddr, HNS_MAC_HILINK3_REG);
-	hilink4_mode = dsaf_read_reg(sys_ctl_vaddr, HNS_MAC_HILINK4_REG);
-	if (dev_id >= 0 && dev_id <= 3) {
-		if (hilink4_mode == 0)
-			phy_if = PHY_INTERFACE_MODE_SGMII;
-		else
+	/* for hip05 soc, port6,7 only support ge mode */
+	if (is_ver1 && (mac_id >= 6 && mac_id <= 7)) {
+		phy_if = PHY_INTERFACE_MODE_SGMII;
+	} else	if (mac_id >= 0 && mac_id <= 3) {
+		reg = is_ver1 ? HNS_MAC_HILINK4_REG : HNS_MAC_HILINK4V2_REG;
+		mode = dsaf_read_reg(sys_ctl_vaddr, reg);
+		/* mac_id 0, 1, 2, 3 ---> hilink4 lane 0, 1, 2, 3 */
+		shift = is_ver1 ? 0 : mac_id;
+		if (dsaf_get_bit(mode, shift))
 			phy_if = PHY_INTERFACE_MODE_XGMII;
-	} else if (dev_id >= 4 && dev_id <= 5) {
-		if (hilink3_mode == 0)
-			phy_if = PHY_INTERFACE_MODE_SGMII;
 		else
+			phy_if = PHY_INTERFACE_MODE_SGMII;
+	} else if (mac_id >= 4 && mac_id <= 7) {
+		reg = is_ver1 ? HNS_MAC_HILINK3_REG : HNS_MAC_HILINK3V2_REG;
+		mode = dsaf_read_reg(sys_ctl_vaddr, reg);
+		/* mac_id 4, 5, 6, 7 ---> hilink3 lane 2, 3, 0, 1 */
+		shift = is_ver1 ? 0 : (mac_id <= 5 ? mac_id - 2 : mac_id - 6);
+		if (dsaf_get_bit(mode, shift))
 			phy_if = PHY_INTERFACE_MODE_XGMII;
-	} else {
-		phy_if = PHY_INTERFACE_MODE_SGMII;
+		else
+			phy_if = PHY_INTERFACE_MODE_SGMII;
 	}
-
-	dev_dbg(mac_cb->dev,
-		"hilink3_mode=%d, hilink4_mode=%d dev_id=%d, phy_if=%d\n",
-		hilink3_mode, hilink4_mode, dev_id, phy_if);
 	return phy_if;
 }
 
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
index bf62687..e2206f9 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
@@ -103,6 +103,8 @@
 /*serdes offset**/
 #define HNS_MAC_HILINK3_REG DSAF_SUB_SC_HILINK3_CRG_CTRL0_REG
 #define HNS_MAC_HILINK4_REG DSAF_SUB_SC_HILINK4_CRG_CTRL0_REG
+#define HNS_MAC_HILINK3V2_REG DSAF_SUB_SC_HILINK3_CRG_CTRL1_REG
+#define HNS_MAC_HILINK4V2_REG DSAF_SUB_SC_HILINK4_CRG_CTRL1_REG
 #define HNS_MAC_LANE0_CTLEDFE_REG 0x000BFFCCULL
 #define HNS_MAC_LANE1_CTLEDFE_REG 0x000BFFBCULL
 #define HNS_MAC_LANE2_CTLEDFE_REG 0x000BFFACULL
-- 
1.9.1

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#1355728 — [PATCH V2 net 4/6] net: hns: adds uc match for debug port

This patch adds uc match for debug port by:
1)Enables uc match of debug port when initializing gmac
2)Enables uc match of mac address register2

Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
---
changlog:
v2: fix the SoB name and code sytle according to Sergei .
---
drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c | 18 +++++++++++++++++-
 drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  |  2 ++
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c
index b8517b0..2591a51 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c
@@ -290,6 +290,16 @@ static int hns_gmac_adjust_link(void *mac_drv, enum mac_speed speed,
 	return 0;
 }
 
+static void hns_gmac_set_uc_match(void *mac_drv, u16 en)
+{
+	struct mac_driver *drv = (struct mac_driver *)mac_drv;
+
+	dsaf_set_dev_bit(drv, GMAC_REC_FILT_CONTROL_REG,
+			 GMAC_UC_MATCH_EN_B, !en);
+	dsaf_set_dev_bit(drv, GMAC_STATION_ADDR_HIGH_2_REG,
+			 GMAC_ADDR_EN_B, !en);
+}
+
 static void hns_gmac_init(void *mac_drv)
 {
 	u32 port;
@@ -305,6 +315,8 @@ static void hns_gmac_init(void *mac_drv)
 	mdelay(10);
 	hns_gmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX);
 	hns_gmac_tx_loop_pkt_dis(mac_drv);
+	if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
+		hns_gmac_set_uc_match(mac_drv, 0);
 }
 
 void hns_gmac_update_stats(void *mac_drv)
@@ -407,8 +419,12 @@ static void hns_gmac_set_mac_addr(void *mac_drv, char *mac_addr)
 
 		u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
 			| (mac_addr[3] << 16) | (mac_addr[2] << 24);
+
+		u32 val = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
+		u32 sta_addr_en = dsaf_get_bit(val, GMAC_ADDR_EN_B);
 		dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val);
-		dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG, high_val);
+		dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG,
+			       high_val | (sta_addr_en << GMAC_ADDR_EN_B));
 	}
 }
 
diff --git a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
index 60d695d..bf62687 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
+++ b/drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h
@@ -922,6 +922,8 @@
 #define GMAC_LP_REG_CF2MI_LP_EN_B	2
 
 #define GMAC_MODE_CHANGE_EB_B	0
+#define GMAC_UC_MATCH_EN_B	0
+#define GMAC_ADDR_EN_B		16
 
 #define GMAC_RECV_CTRL_STRIP_PAD_EN_B	3
 #define GMAC_RECV_CTRL_RUNT_PKT_EN_B	4
-- 
1.9.1

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#1355733 — [PATCH V2 net 1/6] net: hns: bug fix about the overflow of mss

When set MTU to the minimum value 68, there are increasing number
of error packets occur, which is caused by the overflowed value of
mss. This patch fix the bug.

Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
---
 drivers/net/ethernet/hisilicon/hns/hns_enet.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns/hns_enet.c b/drivers/net/ethernet/hisilicon/hns/hns_enet.c
index 3f77ff7..9d46d57 100644
--- a/drivers/net/ethernet/hisilicon/hns/hns_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns/hns_enet.c
@@ -48,7 +48,6 @@ static void fill_v2_desc(struct hnae_ring *ring, void *priv,
 	struct iphdr *iphdr;
 	struct ipv6hdr *ipv6hdr;
 	struct sk_buff *skb;
-	int skb_tmp_len;
 	__be16 protocol;
 	u8 bn_pid = 0;
 	u8 rrcfv = 0;
@@ -90,13 +89,13 @@ static void fill_v2_desc(struct hnae_ring *ring, void *priv,
 				hnae_set_bit(rrcfv, HNSV2_TXD_L4CS_B, 1);
 
 				/* check for tcp/udp header */
-				if (iphdr->protocol == IPPROTO_TCP) {
+				if (iphdr->protocol == IPPROTO_TCP &&
+				    skb_is_gso(skb)) {
 					hnae_set_bit(tvsvsn,
 						     HNSV2_TXD_TSE_B, 1);
-					skb_tmp_len = SKB_TMP_LEN(skb);
 					l4_len = tcp_hdrlen(skb);
-					mss = mtu - skb_tmp_len - ETH_FCS_LEN;
-					paylen = skb->len - skb_tmp_len;
+					mss = skb_shinfo(skb)->gso_size;
+					paylen = skb->len - SKB_TMP_LEN(skb);
 				}
 			} else if (skb->protocol == htons(ETH_P_IPV6)) {
 				hnae_set_bit(tvsvsn, HNSV2_TXD_IPV6_B, 1);
@@ -104,13 +103,13 @@ static void fill_v2_desc(struct hnae_ring *ring, void *priv,
 				hnae_set_bit(rrcfv, HNSV2_TXD_L4CS_B, 1);
 
 				/* check for tcp/udp header */
-				if (ipv6hdr->nexthdr == IPPROTO_TCP) {
+				if (ipv6hdr->nexthdr == IPPROTO_TCP &&
+				    skb_is_gso(skb) && skb_is_gso_v6(skb)) {
 					hnae_set_bit(tvsvsn,
 						     HNSV2_TXD_TSE_B, 1);
-					skb_tmp_len = SKB_TMP_LEN(skb);
 					l4_len = tcp_hdrlen(skb);
-					mss = mtu - skb_tmp_len - ETH_FCS_LEN;
-					paylen = skb->len - skb_tmp_len;
+					mss = skb_shinfo(skb)->gso_size;
+					paylen = skb->len - SKB_TMP_LEN(skb);
 				}
 			}
 			desc->tx.ip_offset = ip_offset;
-- 
1.9.1

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#1357744

Hi Dave,

Could you please help me to review this patch set?
I am so sorry to send the patches in parallel to you, which increases 
you workload,
So next time we will pay more attention to it,  and learn more about 
kernel patch submitting.
Thanks.

MBR, Daode

On 2016/3/11 17:10, Daode Huang wrote:
> Hi Dave,
>
> This patch series are hisilicon network driver bug fix.
> please merge them to the net repo.
> Thanks
>
> Daode Huang
> ---
> changlog
> v2: some minor change according to
>      MBR Sergei <sergei.shtylyov@cogentembedded.com> in
>      [patch 3/6] [patch 4/6].
>
> v1: initial version.
>
> Daode Huang (6):
>    net: hns: bug fix about the overflow of mss
>    net: hns: fixes the hw interrupt bug in using napi
>    net: hns: fixed portid bug in sending manage pkt
>    net: hns: adds uc match for debug port
>    net: hns: fixed service-ges setting MAC-addr bug
>    net: hns: bug fix of getting hilink status
>
>   drivers/net/ethernet/hisilicon/hns/hnae.h          |  3 ++
>   drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c  |  1 +
>   drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c | 29 +++++++++++----
>   drivers/net/ethernet/hisilicon/hns/hns_dsaf_misc.c | 41 ++++++++++++----------
>   drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h  |  4 +++
>   drivers/net/ethernet/hisilicon/hns/hns_enet.c      | 32 +++++++++--------
>   6 files changed, 70 insertions(+), 40 deletions(-)
>

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#1357776

From: Daode Huang <huangdaode@hisilicon.com>
Date: Tue, 15 Mar 2016 09:56:02 +0800

> Could you please help me to review this patch set?

I am not reviewing anything until you guys sort out your submission
scheme, and resend these fresh using that central maintainer.

I am also not the only person in the world who is supposed to review
all of this stuff, other developers need to help with the review
process as well.

So it is never appropriate to ask me, and only me, to review your
work.

Thanks.

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#1357829

hi Dave,

Thanks for your reply, I am so sorry to interrupt your work.
Yes, the patch set should be reviewed by all the other developers.
I should not only ask you to review the patch.

I will resend all these patch after 4.6-rc-1 is released.
Thanks.

Daode.

.

On 2016/3/15 10:45, David Miller wrote:
> From: Daode Huang <huangdaode@hisilicon.com>
> Date: Tue, 15 Mar 2016 09:56:02 +0800
>
>> Could you please help me to review this patch set?
> I am not reviewing anything until you guys sort out your submission
> scheme, and resend these fresh using that central maintainer.
>
> I am also not the only person in the world who is supposed to review
> all of this stuff, other developers need to help with the review
> process as well.
>
> So it is never appropriate to ask me, and only me, to review your
> work.
>
> Thanks.
>
> .
>

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