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| Started by | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| First post | 2016-07-27 16:20 +0200 |
| Last post | 2016-07-29 00:00 +0200 |
| Articles | 2 — 2 participants |
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[PATCH 2/2] thermal: rockchip: optimize sensor auto accessing period Caesar Wang <wxt@rock-chips.com> - 2016-07-27 16:20 +0200
Re: [PATCH 2/2] thermal: rockchip: optimize sensor auto accessing period Stephen Barber <smbarber@chromium.org> - 2016-07-29 00:00 +0200
| From | Caesar Wang <wxt@rock-chips.com> |
|---|---|
| Date | 2016-07-27 16:20 +0200 |
| Subject | [PATCH 2/2] thermal: rockchip: optimize sensor auto accessing period |
| Message-ID | <rZxQJ-ug-7@gated-at.bofh.it> |
From: Rocky Hao <rocky.hao@rock-chips.com>
In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
is too big for soc tempeture control. Setting 2.5 ms will speed up
temperature accessing speed but introduce no more cpu's computing overhead.
We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
because normal temperature update speed is also our consern in IPA.
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
---
drivers/thermal/rockchip_thermal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index a90423d..1f165c9 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -213,8 +213,8 @@ struct rockchip_thermal_data {
#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
#define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */
#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */
-#define TSADCV3_AUTO_PERIOD_TIME 187500 /* 250ms */
-#define TSADCV3_AUTO_PERIOD_HT_TIME 37500 /* 50ms */
+#define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */
+#define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */
#define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
--
1.9.1
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| From | Stephen Barber <smbarber@chromium.org> |
|---|---|
| Date | 2016-07-29 00:00 +0200 |
| Message-ID | <s01vs-3Eo-9@gated-at.bofh.it> |
| In reply to | #1451296 |
On Wed, Jul 27, 2016 at 7:10 AM, Caesar Wang <wxt@rock-chips.com> wrote:
> From: Rocky Hao <rocky.hao@rock-chips.com>
>
> In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
> is too big for soc tempeture control. Setting 2.5 ms will speed up
> temperature accessing speed but introduce no more cpu's computing overhead.
> We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
> because normal temperature update speed is also our consern in IPA.
>
> Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> Cc: Zhang Rui <rui.zhang@intel.com>
> Cc: Eduardo Valentin <edubezval@gmail.com>
> Cc: Heiko Stuebner <heiko@sntech.de>
> Cc: linux-pm@vger.kernel.org
>
> ---
>
> drivers/thermal/rockchip_thermal.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index a90423d..1f165c9 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -213,8 +213,8 @@ struct rockchip_thermal_data {
> #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
> #define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */
> #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */
> -#define TSADCV3_AUTO_PERIOD_TIME 187500 /* 250ms */
> -#define TSADCV3_AUTO_PERIOD_HT_TIME 37500 /* 50ms */
> +#define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */
> +#define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */
>
> #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
>
> --
> 1.9.1
>
Tested-by: Stephen Barber <smbarber@chromium.org>
Steve
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