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Re: Why does BIOS assign memory to 16 byte BAR

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  Re: Why does BIOS assign memory to 16 byte BAR Bjorn Helgaas <helgaas@kernel.org> - 2016-07-22 17:20 +0200
    Re: Why does BIOS assign memory to 16 byte BAR Bjorn Helgaas <helgaas@kernel.org> - 2016-07-22 18:00 +0200

#1448629 — Re: Why does BIOS assign memory to 16 byte BAR

Hi Bharat,

On Fri, Jul 22, 2016 at 09:24:22AM +0000, Bharat Kumar Gogada wrote:
> Hi,
> 
> I'm observing that on x86 BIOS successfully assigns memory if an End point requests
> BAR of size 16byte.
> 
> But as per Spec:
> The minimum memory address range requested by a BAR is 128 bytes.

Can you provide the spec reference for this?  I don't see it in PCI
r3.0.

PCI r3.0, sec 6.2.5.1, shows bits 4-31 of a memory BAR as writable,
which would correspond to a minimum size of 16 bytes.

> Why BIOS is successfully allocating region to 16 byte BAR requests?

If you want to know why the BIOS does this, you'd have to ask the BIOS
writer.

If you were to ask about *Linux*, I'd say we should not gratuitously
enforce things in the spec merely for the sake of being compliant with
the letter of the spec.  We should enforce things that are logically
required or that are required for compatibility, security, etc.  But
if the spec contained an arbitrary restriction  for no good reason,
and real-world hardware violated that restriction, I'd say Linux
should accommodate the hardware.

Bjorn

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#1448658

On Fri, Jul 22, 2016 at 10:15:46AM -0500, Bjorn Helgaas wrote:
> Hi Bharat,
> 
> On Fri, Jul 22, 2016 at 09:24:22AM +0000, Bharat Kumar Gogada wrote:
> > Hi,
> > 
> > I'm observing that on x86 BIOS successfully assigns memory if an End point requests
> > BAR of size 16byte.
> > 
> > But as per Spec:
> > The minimum memory address range requested by a BAR is 128 bytes.
> 
> Can you provide the spec reference for this?  I don't see it in PCI
> r3.0.
>
> PCI r3.0, sec 6.2.5.1, shows bits 4-31 of a memory BAR as writable,
> which would correspond to a minimum size of 16 bytes.

The reference above is to the conventional PCI spec.  I happened to
trip over a note in PCIe r3.0, sec 1.3.2.2, that for a PCI Express
endpoint, "the minimum memory address range requested by a BAR is 128
bytes."

I don't think linux currently enforces this minimum.

Bjorn

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