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Groups > linux.kernel > #1441248 > unrolled thread
| Started by | Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
|---|---|
| First post | 2016-07-12 13:10 +0200 |
| Last post | 2016-07-13 10:10 +0200 |
| Articles | 5 — 4 participants |
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[PATCH v1 1/1] x86/pci: Use MRFLD abbreviation for Merrifield Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-07-12 13:10 +0200
Re: [PATCH v1 1/1] x86/pci: Use MRFLD abbreviation for Merrifield Ingo Molnar <mingo@kernel.org> - 2016-07-13 09:30 +0200
Re: [PATCH v1 1/1] x86/pci: Use MRFLD abbreviation for Merrifield Bjorn Helgaas <helgaas@kernel.org> - 2016-07-18 18:50 +0200
Re: [PATCH v1 1/1] x86/pci: Use MRFLD abbreviation for Merrifield Ingo Molnar <mingo@kernel.org> - 2016-07-18 19:40 +0200
[tip:x86/platform] x86/pci: Use MRFLD abbreviation for Merrifield tip-bot for Andy Shevchenko <tipbot@zytor.com> - 2016-07-13 10:10 +0200
| From | Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
|---|---|
| Date | 2016-07-12 13:10 +0200 |
| Subject | [PATCH v1 1/1] x86/pci: Use MRFLD abbreviation for Merrifield |
| Message-ID | <rU3JD-44Q-7@gated-at.bofh.it> |
Everywhere in the kernel the MRFLD is used as abbreviation of Intel Merrifield. Do the same in intel_mid_pci.c module. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- arch/x86/pci/intel_mid_pci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c index 5413d6a..5a18aed 100644 --- a/arch/x86/pci/intel_mid_pci.c +++ b/arch/x86/pci/intel_mid_pci.c @@ -36,8 +36,8 @@ #define PCIE_CAP_OFFSET 0x100 /* Quirks for the listed devices */ -#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 -#define PCI_DEVICE_ID_INTEL_MRFL_HSU 0x1191 +#define PCI_DEVICE_ID_INTEL_MRFLD_MMC 0x1190 +#define PCI_DEVICE_ID_INTEL_MRFLD_HSU 0x1191 /* Fixed BAR fields */ #define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00 /* Fixed BAR (TBD) */ @@ -229,7 +229,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) * Skip HS UART common registers device since it has * IRQ0 assigned and not used by the kernel. */ - if (dev->device == PCI_DEVICE_ID_INTEL_MRFL_HSU) + if (dev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU) return -EBUSY; /* * TNG has IRQ0 assigned to eMMC controller. But there @@ -238,7 +238,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) * eMMC gets it. The rest of devices still could be * enabled without interrupt line being allocated. */ - if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC) + if (dev->device != PCI_DEVICE_ID_INTEL_MRFLD_MMC) return 0; } break; -- 2.8.1
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| From | Ingo Molnar <mingo@kernel.org> |
|---|---|
| Date | 2016-07-13 09:30 +0200 |
| Message-ID | <rUmMj-8ia-35@gated-at.bofh.it> |
| In reply to | #1441248 |
Bjorn, we already have a few incidental changes to arch/x86/pci/intel_mid_pci.c pending in the tip:x86/platform tree: e99a0745bdf8 x86/pci, x86/platform/intel_mid_pci: Remove duplicate power off code 5823d0893ec2 x86/platform/intel-mid: Add Power Management Unit driver bb27570525a7 x86/platform/intel_mid_pci: Rework IRQ0 workaround mind if I carry this patch too, or would you like to carry it in the PCI tree? Thanks, Ingo * Andy Shevchenko <andriy.shevchenko@linux.intel.com> wrote: > Everywhere in the kernel the MRFLD is used as abbreviation of Intel Merrifield. > Do the same in intel_mid_pci.c module. > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > --- > arch/x86/pci/intel_mid_pci.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c > index 5413d6a..5a18aed 100644 > --- a/arch/x86/pci/intel_mid_pci.c > +++ b/arch/x86/pci/intel_mid_pci.c > @@ -36,8 +36,8 @@ > #define PCIE_CAP_OFFSET 0x100 > > /* Quirks for the listed devices */ > -#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 > -#define PCI_DEVICE_ID_INTEL_MRFL_HSU 0x1191 > +#define PCI_DEVICE_ID_INTEL_MRFLD_MMC 0x1190 > +#define PCI_DEVICE_ID_INTEL_MRFLD_HSU 0x1191 > > /* Fixed BAR fields */ > #define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00 /* Fixed BAR (TBD) */ > @@ -229,7 +229,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) > * Skip HS UART common registers device since it has > * IRQ0 assigned and not used by the kernel. > */ > - if (dev->device == PCI_DEVICE_ID_INTEL_MRFL_HSU) > + if (dev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU) > return -EBUSY; > /* > * TNG has IRQ0 assigned to eMMC controller. But there > @@ -238,7 +238,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) > * eMMC gets it. The rest of devices still could be > * enabled without interrupt line being allocated. > */ > - if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC) > + if (dev->device != PCI_DEVICE_ID_INTEL_MRFLD_MMC) > return 0; > } > break; > -- > 2.8.1 >
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| From | Bjorn Helgaas <helgaas@kernel.org> |
|---|---|
| Date | 2016-07-18 18:50 +0200 |
| Message-ID | <rWjTY-fe-31@gated-at.bofh.it> |
| In reply to | #1442101 |
On Wed, Jul 13, 2016 at 09:24:35AM +0200, Ingo Molnar wrote: > > Bjorn, we already have a few incidental changes to arch/x86/pci/intel_mid_pci.c > pending in the tip:x86/platform tree: > > e99a0745bdf8 x86/pci, x86/platform/intel_mid_pci: Remove duplicate power off code > 5823d0893ec2 x86/platform/intel-mid: Add Power Management Unit driver > bb27570525a7 x86/platform/intel_mid_pci: Rework IRQ0 workaround > > mind if I carry this patch too, or would you like to carry it in the PCI tree? Sorry for the late response; I've been on vacation. Feel free to merge thisp patch with your other changes. > * Andy Shevchenko <andriy.shevchenko@linux.intel.com> wrote: > > > Everywhere in the kernel the MRFLD is used as abbreviation of Intel Merrifield. > > Do the same in intel_mid_pci.c module. > > > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > --- > > arch/x86/pci/intel_mid_pci.c | 8 ++++---- > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c > > index 5413d6a..5a18aed 100644 > > --- a/arch/x86/pci/intel_mid_pci.c > > +++ b/arch/x86/pci/intel_mid_pci.c > > @@ -36,8 +36,8 @@ > > #define PCIE_CAP_OFFSET 0x100 > > > > /* Quirks for the listed devices */ > > -#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 > > -#define PCI_DEVICE_ID_INTEL_MRFL_HSU 0x1191 > > +#define PCI_DEVICE_ID_INTEL_MRFLD_MMC 0x1190 > > +#define PCI_DEVICE_ID_INTEL_MRFLD_HSU 0x1191 > > > > /* Fixed BAR fields */ > > #define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00 /* Fixed BAR (TBD) */ > > @@ -229,7 +229,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) > > * Skip HS UART common registers device since it has > > * IRQ0 assigned and not used by the kernel. > > */ > > - if (dev->device == PCI_DEVICE_ID_INTEL_MRFL_HSU) > > + if (dev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU) > > return -EBUSY; > > /* > > * TNG has IRQ0 assigned to eMMC controller. But there > > @@ -238,7 +238,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) > > * eMMC gets it. The rest of devices still could be > > * enabled without interrupt line being allocated. > > */ > > - if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC) > > + if (dev->device != PCI_DEVICE_ID_INTEL_MRFLD_MMC) > > return 0; > > } > > break; > > -- > > 2.8.1 > >
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| From | Ingo Molnar <mingo@kernel.org> |
|---|---|
| Date | 2016-07-18 19:40 +0200 |
| Message-ID | <rWkGm-MC-11@gated-at.bofh.it> |
| In reply to | #1445636 |
* Bjorn Helgaas <helgaas@kernel.org> wrote: > On Wed, Jul 13, 2016 at 09:24:35AM +0200, Ingo Molnar wrote: > > > > Bjorn, we already have a few incidental changes to arch/x86/pci/intel_mid_pci.c > > pending in the tip:x86/platform tree: > > > > e99a0745bdf8 x86/pci, x86/platform/intel_mid_pci: Remove duplicate power off code > > 5823d0893ec2 x86/platform/intel-mid: Add Power Management Unit driver > > bb27570525a7 x86/platform/intel_mid_pci: Rework IRQ0 workaround > > > > mind if I carry this patch too, or would you like to carry it in the PCI tree? > > Sorry for the late response; I've been on vacation. > > Feel free to merge this patch with your other changes. Will do, thanks! Ingo
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| From | tip-bot for Andy Shevchenko <tipbot@zytor.com> |
|---|---|
| Date | 2016-07-13 10:10 +0200 |
| Subject | [tip:x86/platform] x86/pci: Use MRFLD abbreviation for Merrifield |
| Message-ID | <rUnoZ-kO-9@gated-at.bofh.it> |
| In reply to | #1441248 |
Commit-ID: 707a605b5a1732e548f4ff51ccf0199a14d95f0f Gitweb: http://git.kernel.org/tip/707a605b5a1732e548f4ff51ccf0199a14d95f0f Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com> AuthorDate: Tue, 12 Jul 2016 14:04:22 +0300 Committer: Ingo Molnar <mingo@kernel.org> CommitDate: Wed, 13 Jul 2016 09:24:51 +0200 x86/pci: Use MRFLD abbreviation for Merrifield Everywhere in the kernel the MRFLD is used as abbreviation of Intel Merrifield. Do the same in intel_mid_pci.c module. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/1468321462-136016-1-git-send-email-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org> --- arch/x86/pci/intel_mid_pci.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c index 5413d6a..5a18aed 100644 --- a/arch/x86/pci/intel_mid_pci.c +++ b/arch/x86/pci/intel_mid_pci.c @@ -36,8 +36,8 @@ #define PCIE_CAP_OFFSET 0x100 /* Quirks for the listed devices */ -#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 -#define PCI_DEVICE_ID_INTEL_MRFL_HSU 0x1191 +#define PCI_DEVICE_ID_INTEL_MRFLD_MMC 0x1190 +#define PCI_DEVICE_ID_INTEL_MRFLD_HSU 0x1191 /* Fixed BAR fields */ #define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00 /* Fixed BAR (TBD) */ @@ -229,7 +229,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) * Skip HS UART common registers device since it has * IRQ0 assigned and not used by the kernel. */ - if (dev->device == PCI_DEVICE_ID_INTEL_MRFL_HSU) + if (dev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU) return -EBUSY; /* * TNG has IRQ0 assigned to eMMC controller. But there @@ -238,7 +238,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) * eMMC gets it. The rest of devices still could be * enabled without interrupt line being allocated. */ - if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC) + if (dev->device != PCI_DEVICE_ID_INTEL_MRFLD_MMC) return 0; } break;
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