Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1443302 > unrolled thread
| Started by | William Wu <william.wu@rock-chips.com> |
|---|---|
| First post | 2016-07-14 11:10 +0200 |
| Last post | 2016-07-14 11:10 +0200 |
| Articles | 4 — 2 participants |
Back to article view | Back to linux.kernel
[PATCH v7 0/5] support rockchip dwc3 driver William Wu <william.wu@rock-chips.com> - 2016-07-14 11:10 +0200
[PATCH v7 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk William Wu <william.wu@rock-chips.com> - 2016-07-14 11:10 +0200
Re: [PATCH v7 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk Rob Herring <robh@kernel.org> - 2016-07-17 01:00 +0200
[PATCH v7 1/5] usb: dwc3: of-simple: add compatible for rockchip rk3399 William Wu <william.wu@rock-chips.com> - 2016-07-14 11:10 +0200
| From | William Wu <william.wu@rock-chips.com> |
|---|---|
| Date | 2016-07-14 11:10 +0200 |
| Subject | [PATCH v7 0/5] support rockchip dwc3 driver |
| Message-ID | <rUKOC-7Jy-5@gated-at.bofh.it> |
This series add support for rockchip dwc3 driver, and add additional optional properties for specific platforms (e.g., rockchip rk3399 platform). William Wu (5): usb: dwc3: of-simple: add compatible for rockchip rk3399 usb: dwc3: add dis_u2_freeclk_exists_quirk usb: dwc3: make usb2 phy utmi interface configurable in DT usb: dwc3: add dis_del_phy_power_chg_quirk usb: dwc3: rockchip: add devicetree bindings documentation Documentation/devicetree/bindings/usb/dwc3.txt | 8 +++ .../devicetree/bindings/usb/rockchip,dwc3.txt | 59 ++++++++++++++++++++++ drivers/usb/dwc3/core.c | 35 +++++++++++++ drivers/usb/dwc3/core.h | 18 +++++++ drivers/usb/dwc3/dwc3-of-simple.c | 1 + 5 files changed, 121 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/rockchip,dwc3.txt -- 1.9.1
[toc] | [next] | [standalone]
| From | William Wu <william.wu@rock-chips.com> |
|---|---|
| Date | 2016-07-14 11:10 +0200 |
| Subject | [PATCH v7 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk |
| Message-ID | <rUKOC-7Jy-35@gated-at.bofh.it> |
| In reply to | #1443302 |
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
Changes in v7:
- None
Changes in v6:
- use '-' instead of '_' in dts (Rob Herring)
Changes in v5:
- None
Changes in v4:
- rebase on top of balbi testing/next, remove pdata (balbi)
Changes in v3:
- None
Changes in v2:
- None
Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++
drivers/usb/dwc3/core.c | 5 +++++
drivers/usb/dwc3/core.h | 5 +++++
3 files changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 7d7ce08..020b0e9 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -39,6 +39,9 @@ Optional properties:
disabling the suspend signal to the PHY.
- snps,dis_rxdet_inp3_quirk: when set core will disable receiver detection
in PHY P3 power state.
+ - snps,dis-u2-freeclk-exists-quirk: when set, clear the u2_freeclk_exists
+ in GUSB2PHYCFG, specify that USB2 PHY doesn't provide
+ a free-running PHY clock.
- snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
utmi_l1_suspend_n, false when asserts utmi_sleep_n
- snps,hird-threshold: HIRD threshold
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 9466431..0b7bfd2 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -500,6 +500,9 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
if (dwc->dis_enblslpm_quirk)
reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
+ if (dwc->dis_u2_freeclk_exists_quirk)
+ reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
+
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
return 0;
@@ -924,6 +927,8 @@ static int dwc3_probe(struct platform_device *pdev)
"snps,dis_enblslpm_quirk");
dwc->dis_rxdet_inp3_quirk = device_property_read_bool(dev,
"snps,dis_rxdet_inp3_quirk");
+ dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev,
+ "snps,dis-u2-freeclk-exists-quirk");
dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
"snps,tx_de_emphasis_quirk");
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 45d6de5..f321a5c 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -199,6 +199,7 @@
/* Global USB2 PHY Configuration Register */
#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
+#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30)
#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6)
#define DWC3_GUSB2PHYCFG_ULPI_UTMI (1 << 4)
#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8)
@@ -799,6 +800,9 @@ struct dwc3_scratchpad_array {
* @dis_u2_susphy_quirk: set if we disable usb2 suspend phy
* @dis_enblslpm_quirk: set if we clear enblslpm in GUSB2PHYCFG,
* disabling the suspend signal to the PHY.
+ * @dis_u2_freeclk_exists_quirk : set if we clear u2_freeclk_exists
+ * in GUSB2PHYCFG, specify that USB2 PHY doesn't
+ * provide a free-running PHY clock.
* @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
* @tx_de_emphasis: Tx de-emphasis value
* 0 - -6dB de-emphasis
@@ -942,6 +946,7 @@ struct dwc3 {
unsigned dis_u2_susphy_quirk:1;
unsigned dis_enblslpm_quirk:1;
unsigned dis_rxdet_inp3_quirk:1;
+ unsigned dis_u2_freeclk_exists_quirk:1;
unsigned tx_de_emphasis_quirk:1;
unsigned tx_de_emphasis:2;
--
1.9.1
[toc] | [prev] | [next] | [standalone]
| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2016-07-17 01:00 +0200 |
| Subject | Re: [PATCH v7 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk |
| Message-ID | <rVGIV-1dj-7@gated-at.bofh.it> |
| In reply to | #1443306 |
On Thu, Jul 14, 2016 at 04:59:19PM +0800, William Wu wrote: > Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, > which specifies whether the USB2.0 PHY provides a free-running > PHY clock, which is active when the clock control input is active. > > Signed-off-by: William Wu <william.wu@rock-chips.com> > --- > Changes in v7: > - None > > Changes in v6: > - use '-' instead of '_' in dts (Rob Herring) > > Changes in v5: > - None > > Changes in v4: > - rebase on top of balbi testing/next, remove pdata (balbi) > > Changes in v3: > - None > > Changes in v2: > - None > > Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ > drivers/usb/dwc3/core.c | 5 +++++ > drivers/usb/dwc3/core.h | 5 +++++ > 3 files changed, 13 insertions(+) Acked-by: Rob Herring <robh@kernel.org>
[toc] | [prev] | [next] | [standalone]
| From | William Wu <william.wu@rock-chips.com> |
|---|---|
| Date | 2016-07-14 11:10 +0200 |
| Subject | [PATCH v7 1/5] usb: dwc3: of-simple: add compatible for rockchip rk3399 |
| Message-ID | <rUKOC-7Jy-33@gated-at.bofh.it> |
| In reply to | #1443302 |
Rockchip platform merely enable usb3 clocks and
populate its children. So we can use this generic
glue layer to support Rockchip dwc3.
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- change compatible from "rockchip,dwc3" to "rockchip,rk3399-dwc3" (Heiko)
Changes in v4:
- None
Changes in v3:
- None
Changes in v2:
- sort the list of_dwc3_simple_match (Doug)
drivers/usb/dwc3/dwc3-of-simple.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c
index 9743353..05c9349 100644
--- a/drivers/usb/dwc3/dwc3-of-simple.c
+++ b/drivers/usb/dwc3/dwc3-of-simple.c
@@ -161,6 +161,7 @@ static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
static const struct of_device_id of_dwc3_simple_match[] = {
{ .compatible = "qcom,dwc3" },
+ { .compatible = "rockchip,rk3399-dwc3" },
{ .compatible = "xlnx,zynqmp-dwc3" },
{ /* Sentinel */ }
};
--
1.9.1
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web