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Re: [PATCH v4] gpio: add Intel WhiskeyCove GPIO driver

Started byBin Gao <bin.gao@linux.intel.com>
First post2016-07-12 02:10 +0200
Last post2016-07-12 02:10 +0200
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  Re: [PATCH v4] gpio: add Intel WhiskeyCove GPIO driver Bin Gao <bin.gao@linux.intel.com> - 2016-07-12 02:10 +0200

#1440973 — Re: [PATCH v4] gpio: add Intel WhiskeyCove GPIO driver

FromBin Gao <bin.gao@linux.intel.com>
Date2016-07-12 02:10 +0200
SubjectRe: [PATCH v4] gpio: add Intel WhiskeyCove GPIO driver
Message-ID<rTTqW-5Lo-7@gated-at.bofh.it>
On Wed, Jul 06, 2016 at 10:57:19AM +0200, Linus Walleij wrote:
> > +       gpiochip_irqchip_add(&wg->chip, &wcove_irqchip, 0,
> > +                            handle_simple_irq, IRQ_TYPE_NONE);
> 
> Reexamine the use of handle_simple_irq() here. We have two kinds of
> irq hardware: those with one register for ACKing and reading the status
> of an IRQ, and those with two registers for it: one where you ACK the
> IRQ (so it can immediately re-trigger) and one to read the status of
> whether it happened. Sometimes different handling is needed for
> levek and edge IRQs even (c.f. gpio-pl061.c).
> 
> Only the hardware with just one register for both things should use
> handle_simple_irq(). This seems to be the case here but I want you
> to verify.

Yes, our case is handle_simple_irq(), not handle_edge_irq(), handle_level_irq() or
handle_fasteoi_irq(), etc. because there is no ACK mechanism inside the
GPIO controller's interrupt logic - all we need to do is read the status
register to get the status and write-to-clear the status register so that
a new interrupt can be triggered, i.e. there is only one register for both.

> 
> Yours,
> Linus Walleij

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