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Groups > linux.kernel > #1440808 > unrolled thread
| Started by | Yeshaswi M R Gowda <yeshaswi@chelsio.com> |
|---|---|
| First post | 2016-07-11 20:30 +0200 |
| Last post | 2016-07-12 10:40 +0200 |
| Articles | 5 — 3 participants |
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[PATCH 0/3] crypto/chcr: Add Chelsio Crypto Driver Yeshaswi M R Gowda <yeshaswi@chelsio.com> - 2016-07-11 20:30 +0200
[PATCH 3/3] crypto: Added Chelsio Menu to the Kconfig file Yeshaswi M R Gowda <yeshaswi@chelsio.com> - 2016-07-11 20:40 +0200
Re: [PATCH 3/3] crypto: Added Chelsio Menu to the Kconfig file Herbert Xu <herbert@gondor.apana.org.au> - 2016-07-12 10:50 +0200
Re: [PATCH 2/3] chcr: Support for Chelsio's Crypto Hardware Joe Perches <joe@perches.com> - 2016-07-11 21:00 +0200
Re: [PATCH 2/3] chcr: Support for Chelsio's Crypto Hardware Herbert Xu <herbert@gondor.apana.org.au> - 2016-07-12 10:40 +0200
| From | Yeshaswi M R Gowda <yeshaswi@chelsio.com> |
|---|---|
| Date | 2016-07-11 20:30 +0200 |
| Subject | [PATCH 0/3] crypto/chcr: Add Chelsio Crypto Driver |
| Message-ID | <rTO7T-2fM-9@gated-at.bofh.it> |
Hi Herbert, This patch series contains 3 patches that add support for Chelsio's Crypto Hardware. The patch series has been created against Herbert Xu's tree (crypto-2.6). It includes patches for Chelsio Low Level Driver(cxgb4) and adds the new crypto Upper Layer Driver(chcr) under a new directory drivers/crypto/chelsio. The first of the patch series implements necessary changes in the Chelsio LLD for queue allocation, deallocation and registration of the ULD. The second patch implements the Chelsio crypto driver. The third patch contains the changes to the driver/crypto/Kconfig and drivers/crypto/Makefile to enable the Chelsio Crypto driver. We have included all the maintainers of respective drivers. Kindly review the changes and provide feedback on the same. Yeshaswi M R Gowda (3): cxgb4: Add Chelsio LLD support Chelsio Crypto ULD chcr: Support for Chelsio's Crypto Hardware crypto: Added Chelsio Menu to the Kconfig file drivers/crypto/Kconfig | 2 + drivers/crypto/Makefile | 1 + drivers/crypto/chelsio/Kconfig | 19 + drivers/crypto/chelsio/Makefile | 4 + drivers/crypto/chelsio/chcr_algo.c | 1531 +++++++++++++++++++++++ drivers/crypto/chelsio/chcr_algo.h | 502 ++++++++ drivers/crypto/chelsio/chcr_core.c | 273 ++++ drivers/crypto/chelsio/chcr_core.h | 85 ++ drivers/crypto/chelsio/chcr_crypto.h | 255 ++++ drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 22 +- drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 71 +- drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h | 10 + drivers/net/ethernet/chelsio/cxgb4/sge.c | 64 + drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 437 +++++++ drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 125 ++ 15 files changed, 3393 insertions(+), 8 deletions(-) create mode 100644 drivers/crypto/chelsio/Kconfig create mode 100644 drivers/crypto/chelsio/Makefile create mode 100644 drivers/crypto/chelsio/chcr_algo.c create mode 100644 drivers/crypto/chelsio/chcr_algo.h create mode 100644 drivers/crypto/chelsio/chcr_core.c create mode 100644 drivers/crypto/chelsio/chcr_core.h create mode 100644 drivers/crypto/chelsio/chcr_crypto.h -- 1.7.10.1
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| From | Yeshaswi M R Gowda <yeshaswi@chelsio.com> |
|---|---|
| Date | 2016-07-11 20:40 +0200 |
| Subject | [PATCH 3/3] crypto: Added Chelsio Menu to the Kconfig file |
| Message-ID | <rTOhz-2j1-13@gated-at.bofh.it> |
| In reply to | #1440808 |
Adds the config entry for the Chelsio Crypto Driver, Makefile changes for the same. Signed-off-by: Yeshaswi M R Gowda <yeshaswi@chelsio.com> --- drivers/crypto/Kconfig | 2 ++ drivers/crypto/Makefile | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index d77ba2f..b44faf0 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig @@ -537,4 +537,6 @@ config CRYPTO_DEV_ROCKCHIP This driver interfaces with the hardware crypto accelerator. Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. +source "drivers/crypto/chelsio/Kconfig" + endif # CRYPTO_HW diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile index 3c6432d..ad7250f 100644 --- a/drivers/crypto/Makefile +++ b/drivers/crypto/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/ obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/ obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/ obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/ +obj-$(CONFIG_CRYPTO_DEV_CHELSIO) += chelsio/ -- 1.7.10.1
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| From | Herbert Xu <herbert@gondor.apana.org.au> |
|---|---|
| Date | 2016-07-12 10:50 +0200 |
| Subject | Re: [PATCH 3/3] crypto: Added Chelsio Menu to the Kconfig file |
| Message-ID | <rU1ya-2wR-9@gated-at.bofh.it> |
| In reply to | #1440813 |
On Tue, Jul 12, 2016 at 03:30:41AM +0800, kbuild test robot wrote: > Hi, > > [auto build test WARNING on net-next/master] > [also build test WARNING on v4.7-rc7 next-20160711] > [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] Yeshaswi, please fix these warnings/errors even though they're compile-only. Thanks, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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| From | Joe Perches <joe@perches.com> |
|---|---|
| Date | 2016-07-11 21:00 +0200 |
| Subject | Re: [PATCH 2/3] chcr: Support for Chelsio's Crypto Hardware |
| Message-ID | <rTOAV-2pF-3@gated-at.bofh.it> |
| In reply to | #1440808 |
On Mon, 2016-07-11 at 11:28 -0700, Yeshaswi M R Gowda wrote:
> The Chelsio's Crypto Hardware can perform the following operations:
> SHA1, SHA224, SHA256, SHA384 and SHA512, HMAC(SHA1), HMAC(SHA224),
> HMAC(SHA256), HMAC(SHA384), HAMC(SHA512), AES-128-CBC, AES-192-CBC,
> AES-256-CBC, AES-128-XTS, AES-256-XTS
>
> This patch implements the driver for above mentioned features.
trivial notes:
> diff --git a/drivers/crypto/chelsio/chcr_algo.c b/drivers/crypto/chelsio/chcr_algo.c
[]
> +int chcr_handle_resp(struct crypto_async_request *req, unsigned char *input,
> + int error_status)
> +{
[]
> + case CRYPTO_ALG_TYPE_BLKCIPHER:
> + ctx_req.req.ablk_req = (struct ablkcipher_request *)req;
> + ctx_req.ctx.ablk_ctx =
> + ablkcipher_request_ctx(ctx_req.req.ablk_req);
> + if (error_status)
> + goto dma_unmap_blkcipher;
> + fw6_pld = (struct cpl_fw6_pld *)input;
> + memcpy(ctx_req.req.ablk_req->info, &fw6_pld->data[2],
> + AES_BLOCK_SIZE);
> +dma_unmap_blkcipher:
> + dma_unmap_sg(&u_ctx->lldi.pdev->dev, ctx_req.req.ablk_req->dst,
> + ABLK_CTX(ctx)->dst_nents, DMA_FROM_DEVICE);
> + if (ctx_req.ctx.ablk_ctx->skb) {
> + kfree_skb(ctx_req.ctx.ablk_ctx->skb);
> + ctx_req.ctx.ablk_ctx->skb = NULL;
> + }
> + break;
This case label is only used here right?
This would be better without the goto
[]
> + if (IS_ERR(base_hash)) {
> + pr_err("Can not allocate sha-generic algo.\n");
> + return (void *)base_hash;
> + }
Please add
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
before any #include to prefix any pr_<level> uses.
[]
> +/*
> + * chcr_register_alg - Register crypto algorithms with kernel framework.
> + */
> +static int chcr_register_alg(void)
> +{
> + struct crypto_alg ai;
> + int err = 0, i;
> + char *name = NULL;
> +
> + for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
> + if (driver_algs[i].is_registered)
> + continue;
> + switch (driver_algs[i].type & CRYPTO_ALG_TYPE_MASK) {
> + case CRYPTO_ALG_TYPE_ABLKCIPHER:
> + err = crypto_register_alg(&driver_algs[i].alg.crypto);
> + name = driver_algs[i].alg.crypto.cra_driver_name;
> + break;
> + case CRYPTO_ALG_TYPE_AHASH:
This could be clearer with a temporary for
driver_algs[i].alg.hash
<whatever type *> hash = &driver_algs[i].alg.hash;
> + driver_algs[i].alg.hash.update = chcr_ahash_update;
hash->update = chcr_ahash_update;
etc...
> + driver_algs[i].alg.hash.final = chcr_ahash_final;
> + driver_algs[i].alg.hash.finup = chcr_ahash_finup;
> + driver_algs[i].alg.hash.digest = chcr_ahash_digest;
> + driver_algs[i].alg.hash.export = chcr_ahash_export;
> + driver_algs[i].alg.hash.import = chcr_ahash_import;
> + driver_algs[i].alg.hash.halg.statesize =
> + sizeof(struct chcr_ahash_req_ctx);
Even with this sort of change, a lot of barely >80 column lines
are split making the code a bit less readable.
It might be better to avoid splitting these long lines and
ignore the >80 column limits occasionally.
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| From | Herbert Xu <herbert@gondor.apana.org.au> |
|---|---|
| Date | 2016-07-12 10:40 +0200 |
| Subject | Re: [PATCH 2/3] chcr: Support for Chelsio's Crypto Hardware |
| Message-ID | <rU1ou-2tG-7@gated-at.bofh.it> |
| In reply to | #1440808 |
On Mon, Jul 11, 2016 at 11:28:07AM -0700, Yeshaswi M R Gowda wrote: > > + u_ctx = ULD_CTX(ctx); > + if (cxgb4_is_crypto_q_full(u_ctx->lldi.ports[0], ctx->tx_channel_id)) > + return -EBUSY; You cannot just return -EBUSY. If the request has the MAY_BACKLOG bit set, it must be queued regardless, but you should return -EBUSY in order to throttle the user and then call the completion function with -EINPROGRESS once the queue can accept more requests from the user. Cheers, -- Email: Herbert Xu <herbert@gondor.apana.org.au> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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