Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1440473 > unrolled thread
| Started by | Rajendra Nayak <rnayak@codeaurora.org> |
|---|---|
| First post | 2016-07-11 13:00 +0200 |
| Last post | 2016-07-11 13:00 +0200 |
| Articles | 1 — 1 participant |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
[PATCH 5/6] clk: qcom: Add support for PLLs with early output Rajendra Nayak <rnayak@codeaurora.org> - 2016-07-11 13:00 +0200
| From | Rajendra Nayak <rnayak@codeaurora.org> |
|---|---|
| Date | 2016-07-11 13:00 +0200 |
| Subject | [PATCH 5/6] clk: qcom: Add support for PLLs with early output |
| Message-ID | <rTH6q-5VY-15@gated-at.bofh.it> |
Some PLLs can have an additional early output (apart from
the main and aux outputs). Add support for the PLL driver
so it can be used to initialize/configure the early output
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
drivers/clk/qcom/clk-pll.c | 2 ++
drivers/clk/qcom/clk-pll.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/clk/qcom/clk-pll.c b/drivers/clk/qcom/clk-pll.c
index 08d2fa2..b463432 100644
--- a/drivers/clk/qcom/clk-pll.c
+++ b/drivers/clk/qcom/clk-pll.c
@@ -268,6 +268,7 @@ static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap,
val |= config->mn_ena_mask;
val |= config->main_output_mask;
val |= config->aux_output_mask;
+ val |= config->early_output_mask;
mask = config->vco_mask;
mask |= config->pre_div_mask;
@@ -275,6 +276,7 @@ static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap,
mask |= config->mn_ena_mask;
mask |= config->main_output_mask;
mask |= config->aux_output_mask;
+ mask |= config->early_output_mask;
regmap_update_bits(regmap, pll->config_reg, mask, val);
}
diff --git a/drivers/clk/qcom/clk-pll.h b/drivers/clk/qcom/clk-pll.h
index 083727e..dbe22a9 100644
--- a/drivers/clk/qcom/clk-pll.h
+++ b/drivers/clk/qcom/clk-pll.h
@@ -81,6 +81,7 @@ struct pll_config {
u32 mn_ena_mask;
u32 main_output_mask;
u32 aux_output_mask;
+ u32 early_output_mask;
};
void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap,
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
Back to top | Article view | linux.kernel
csiph-web