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[PATCH] dmaengine: xilinx: Fix race condition in axi dma cyclic dma mode

Started byKedareswara rao Appana <appana.durga.rao@xilinx.com>
First post2016-07-09 10:50 +0200
Last post2016-07-12 06:30 +0200
Articles 2 — 2 participants

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  [PATCH] dmaengine: xilinx: Fix race condition in axi dma cyclic dma mode Kedareswara rao Appana <appana.durga.rao@xilinx.com> - 2016-07-09 10:50 +0200
    Re: [PATCH] dmaengine: xilinx: Fix race condition in axi dma cyclic  dma mode Vinod Koul <vinod.koul@intel.com> - 2016-07-12 06:30 +0200

#1439920 — [PATCH] dmaengine: xilinx: Fix race condition in axi dma cyclic dma mode

FromKedareswara rao Appana <appana.durga.rao@xilinx.com>
Date2016-07-09 10:50 +0200
Subject[PATCH] dmaengine: xilinx: Fix race condition in axi dma cyclic dma mode
Message-ID<rSW7v-xK-3@gated-at.bofh.it>
In cyclic DMA mode need to link the tail bd segment
with the head bd segment to process bd's in cyclic.

Current driver is doing this only for tx channel
needs to update the same for rx channel case also.

This patch fixes the same.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
---
 drivers/dma/xilinx/xilinx_dma.c |    9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index cf47347..4e223d0 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -1895,14 +1895,15 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_dma_cyclic(
 	reg |= XILINX_DMA_CR_CYCLIC_BD_EN_MASK;
 	dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg);
 
+	segment = list_last_entry(&desc->segments,
+				  struct xilinx_axidma_tx_segment,
+				  node);
+	segment->hw.next_desc = (u32) head_segment->phys;
+
 	/* For the last DMA_MEM_TO_DEV transfer, set EOP */
 	if (direction == DMA_MEM_TO_DEV) {
 		head_segment->hw.control |= XILINX_DMA_BD_SOP;
-		segment = list_last_entry(&desc->segments,
-					  struct xilinx_axidma_tx_segment,
-					  node);
 		segment->hw.control |= XILINX_DMA_BD_EOP;
-		segment->hw.next_desc = (u32) head_segment->phys;
 	}
 
 	return &desc->async_tx;
-- 
1.7.1

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#1441059 — Re: [PATCH] dmaengine: xilinx: Fix race condition in axi dma cyclic dma mode

FromVinod Koul <vinod.koul@intel.com>
Date2016-07-12 06:30 +0200
SubjectRe: [PATCH] dmaengine: xilinx: Fix race condition in axi dma cyclic dma mode
Message-ID<rTXux-8oe-1@gated-at.bofh.it>
In reply to#1439920
On Sat, Jul 09, 2016 at 02:09:48PM +0530, Kedareswara rao Appana wrote:
> In cyclic DMA mode need to link the tail bd segment
> with the head bd segment to process bd's in cyclic.
> 
> Current driver is doing this only for tx channel
> needs to update the same for rx channel case also.

Applied, thanks

-- 
~Vinod

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