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Groups > linux.kernel > #1439378 > unrolled thread
| Started by | Paolo Bonzini <pbonzini@redhat.com> |
|---|---|
| First post | 2016-07-08 14:10 +0200 |
| Last post | 2016-07-08 15:00 +0200 |
| Articles | 2 — 2 participants |
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[PATCH 2/2] KVM: x86: zero MSR_IA32_FEATURE_CONTROL on reset Paolo Bonzini <pbonzini@redhat.com> - 2016-07-08 14:10 +0200
Re: [PATCH 2/2] KVM: x86: zero MSR_IA32_FEATURE_CONTROL on reset Haozhong Zhang <haozhong.zhang@intel.com> - 2016-07-08 15:00 +0200
| From | Paolo Bonzini <pbonzini@redhat.com> |
|---|---|
| Date | 2016-07-08 14:10 +0200 |
| Subject | [PATCH 2/2] KVM: x86: zero MSR_IA32_FEATURE_CONTROL on reset |
| Message-ID | <rSCLx-4Br-91@gated-at.bofh.it> |
Reported-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
arch/x86/kvm/x86.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 388d9ffd7551..c01b0b3a06aa 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -7494,6 +7494,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
if (!init_event) {
kvm_pmu_reset(vcpu);
vcpu->arch.smbase = 0x30000;
+ vcpu->arch.msr_ia32_feature_control = 0;
}
memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
--
1.8.3.1
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| From | Haozhong Zhang <haozhong.zhang@intel.com> |
|---|---|
| Date | 2016-07-08 15:00 +0200 |
| Message-ID | <rSDxU-4TG-31@gated-at.bofh.it> |
| In reply to | #1439378 |
On 07/08/16 14:01, Paolo Bonzini wrote:
> Reported-by: Laszlo Ersek <lersek@redhat.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
> arch/x86/kvm/x86.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 388d9ffd7551..c01b0b3a06aa 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -7494,6 +7494,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
> if (!init_event) {
> kvm_pmu_reset(vcpu);
> vcpu->arch.smbase = 0x30000;
> + vcpu->arch.msr_ia32_feature_control = 0;
> }
>
> memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
> --
> 1.8.3.1
>
Actually I'm not sure whether zeroing MSR_IA32_FEATURE_CONTROL on
reset is the accurate behavior.
I know as Laszlo reported that Intel SDM says
VMXON is also controlled by the IA32_FEATURE_CONTROL MSR (MSR
address 3AH). This MSR is *cleared to zero* when a logical processor
is reset
However, when the later section "ARCHITECTURAL MSRS" in Chapter
"MODEL-SPECIFIC REGISTERS (MSRS)" explains the Lock bit of
MSR_IA32_FEATURE_CONTROL in Table "IA-32 Architectural MSRs", it says
... once the Lock bit is set, the entire IA32_FEATURE_CONTROL
contents are *preserved* across RESET when PWRGOOD is not
deasserted.
This looks like a conflict. I'm asking my Intel colleagues for the
accurate behavior.
Thanks,
Haozhong
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