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[PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree

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  [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
    [PATCH v5 13/22] sh: irqchip: SH7751 IRQCHIP Driver Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
    [PATCH v5 11/22] sh: SH7750/51 CPG Driver Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
    [PATCH v5 04/22] sh: Use P1SEGADDR Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
      Re: [PATCH v5 04/22] sh: Use P1SEGADDR Rich Felker <dalias@libc.org> - 2016-07-04 03:50 +0200
        Re: [PATCH v5 04/22] sh: Use P1SEGADDR Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-06 16:20 +0200
          Re: [PATCH v5 04/22] sh: Use P1SEGADDR Rich Felker <dalias@libc.org> - 2016-07-06 17:00 +0200
    [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751 Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
      Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751 Rob Herring <robh@kernel.org> - 2016-07-05 18:00 +0200
        Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751 Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-06 18:20 +0200
    [PATCH v5 10/22] sh: Add board specific initialize of of-generic Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
      Re: [PATCH v5 10/22] sh: Add board specific initialize of of-generic Rich Felker <dalias@libc.org> - 2016-07-04 03:40 +0200
        Re: [PATCH v5 10/22] sh: Add board specific initialize of of-generic Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-06 16:30 +0200
    [PATCH v5 08/22] sh: Disable board specific code on device tree mode Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
    [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
      Re: [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel Rich Felker <dalias@libc.org> - 2016-07-04 04:00 +0200
        Re: [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-06 18:20 +0200
    [PATCH v5 09/22] sh: Use GENERIC_IOMAP on device tree mode Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 18:50 +0200
    [PATCH v5 05/22] sh: command line passing chosen/bootargs in devicetree Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200
    [PATCH v5 03/22] sh: set preset_lpj Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200
    [PATCH v5 17/22] pci: PCI_HOST_GENERIC enable for SH Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200
    [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200
      Re: [PATCH v5 01/22] sh: Add sh-specific  early_init_dt_reserve_memory_arch Rich Felker <dalias@libc.org> - 2016-07-04 04:10 +0200
        Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-06 16:00 +0200
          Re: [PATCH v5 01/22] sh: Add sh-specific  early_init_dt_reserve_memory_arch Rich Felker <dalias@libc.org> - 2016-07-06 17:00 +0200
    [PATCH v5 14/22] sh: SH7751 core dtsi Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200
    [PATCH v5 06/22] sh: FDT address save before bank change Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200
    [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200
      Re: [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> - 2016-07-03 21:10 +0200
        Re: [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-06 18:20 +0200
    [PATCH v5 22/22] sh: Renesas RTS7751R2Dplus (a,k.a R2Dplus) DeviceTree Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200
    [PATCH v5 18/22] sh: Add separate DTB build rule Yoshinori Sato <ysato@users.sourceforge.jp> - 2016-07-03 19:00 +0200

Page 2 of 2 — ← Prev page 1 [2]

#1435997 — [PATCH v5 17/22] pci: PCI_HOST_GENERIC enable for SH

Changes v4
none

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 drivers/pci/host/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index df60505..83184eb 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -83,7 +83,7 @@ config PCI_HOST_COMMON
 
 config PCI_HOST_GENERIC
 	bool "Generic PCI host controller"
-	depends on (ARM || ARM64) && OF
+	depends on (ARM || ARM64 || SUPERH) && OF
 	select PCI_HOST_COMMON
 	help
 	  Say Y here if you want to support a simple generic PCI host
-- 
2.7.0

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#1435999 — [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch

sh used P1 address space in early device tree.
So need convert P1 to physical address before reserve memory.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 arch/sh/boards/of-generic.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 57d45dc..8dbf978 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -15,6 +15,7 @@
 #include <linux/clocksource.h>
 #include <linux/irqchip.h>
 #include <linux/clk-provider.h>
+#include <linux/memblock.h>
 #include <asm/machvec.h>
 #include <asm/rtc.h>
 
@@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
 	return 0;
 }
 arch_initcall_sync(sh_of_device_init);
+
+int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
+					     phys_addr_t size, bool nomap)
+{
+	if (nomap)
+		return memblock_remove(base, size);
+
+	if (base >= P1SEG)
+		base &= ~P1SEG;
+	return memblock_reserve(base, size);
+}
-- 
2.7.0

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#1436117 — Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch

On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> sh used P1 address space in early device tree.
> So need convert P1 to physical address before reserve memory.
> 
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
>  arch/sh/boards/of-generic.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> index 57d45dc..8dbf978 100644
> --- a/arch/sh/boards/of-generic.c
> +++ b/arch/sh/boards/of-generic.c
> @@ -15,6 +15,7 @@
>  #include <linux/clocksource.h>
>  #include <linux/irqchip.h>
>  #include <linux/clk-provider.h>
> +#include <linux/memblock.h>
>  #include <asm/machvec.h>
>  #include <asm/rtc.h>
>  
> @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
>  	return 0;
>  }
>  arch_initcall_sync(sh_of_device_init);
> +
> +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> +					     phys_addr_t size, bool nomap)
> +{
> +	if (nomap)
> +		return memblock_remove(base, size);
> +
> +	if (base >= P1SEG)
> +		base &= ~P1SEG;
> +	return memblock_reserve(base, size);
> +}
> -- 

I think we need a consistent form of physical memory addressing in the
DT that doesn't require this. Hard-coding details of the segmented
memory model all over the place does not look like a good idea; it's
going to badly break anything with full 32-bit which I believe some
SH-4 models had (those with PMB?) and which J3/J4 will almost
certainly have.

Rich

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#1437744 — Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch

On Mon, 04 Jul 2016 11:03:50 +0900,
Rich Felker wrote:
> 
> On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> > sh used P1 address space in early device tree.
> > So need convert P1 to physical address before reserve memory.
> > 
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> >  arch/sh/boards/of-generic.c | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> > 
> > diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> > index 57d45dc..8dbf978 100644
> > --- a/arch/sh/boards/of-generic.c
> > +++ b/arch/sh/boards/of-generic.c
> > @@ -15,6 +15,7 @@
> >  #include <linux/clocksource.h>
> >  #include <linux/irqchip.h>
> >  #include <linux/clk-provider.h>
> > +#include <linux/memblock.h>
> >  #include <asm/machvec.h>
> >  #include <asm/rtc.h>
> >  
> > @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> >  	return 0;
> >  }
> >  arch_initcall_sync(sh_of_device_init);
> > +
> > +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> > +					     phys_addr_t size, bool nomap)
> > +{
> > +	if (nomap)
> > +		return memblock_remove(base, size);
> > +
> > +	if (base >= P1SEG)
> > +		base &= ~P1SEG;
> > +	return memblock_reserve(base, size);
> > +}
> > -- 
> 
> I think we need a consistent form of physical memory addressing in the
> DT that doesn't require this. Hard-coding details of the segmented
> memory model all over the place does not look like a good idea; it's
> going to badly break anything with full 32-bit which I believe some
> SH-4 models had (those with PMB?) and which J3/J4 will almost
> certainly have.

Even 32 bits mode are assigned to the same area now.
But lookup PMB more better.

It add "#ifdef CONFIG_29BIT".
Thanks.

> Rich
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

-- 
Yoshinori Sato
<ysato@users.sourceforge.jp>

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#1437783 — Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch

On Wed, Jul 06, 2016 at 10:53:23PM +0900, Yoshinori Sato wrote:
> On Mon, 04 Jul 2016 11:03:50 +0900,
> Rich Felker wrote:
> > 
> > On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> > > sh used P1 address space in early device tree.
> > > So need convert P1 to physical address before reserve memory.
> > > 
> > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > > ---
> > >  arch/sh/boards/of-generic.c | 12 ++++++++++++
> > >  1 file changed, 12 insertions(+)
> > > 
> > > diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> > > index 57d45dc..8dbf978 100644
> > > --- a/arch/sh/boards/of-generic.c
> > > +++ b/arch/sh/boards/of-generic.c
> > > @@ -15,6 +15,7 @@
> > >  #include <linux/clocksource.h>
> > >  #include <linux/irqchip.h>
> > >  #include <linux/clk-provider.h>
> > > +#include <linux/memblock.h>
> > >  #include <asm/machvec.h>
> > >  #include <asm/rtc.h>
> > >  
> > > @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> > >  	return 0;
> > >  }
> > >  arch_initcall_sync(sh_of_device_init);
> > > +
> > > +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> > > +					     phys_addr_t size, bool nomap)
> > > +{
> > > +	if (nomap)
> > > +		return memblock_remove(base, size);
> > > +
> > > +	if (base >= P1SEG)
> > > +		base &= ~P1SEG;
> > > +	return memblock_reserve(base, size);
> > > +}
> > > -- 
> > 
> > I think we need a consistent form of physical memory addressing in the
> > DT that doesn't require this. Hard-coding details of the segmented
> > memory model all over the place does not look like a good idea; it's
> > going to badly break anything with full 32-bit which I believe some
> > SH-4 models had (those with PMB?) and which J3/J4 will almost
> > certainly have.
> 
> Even 32 bits mode are assigned to the same area now.
> But lookup PMB more better.
> 
> It add "#ifdef CONFIG_29BIT".
> Thanks.

I still don't think there should be any sh-specific code here. Can you
explain why you think it's needed with an example including real
addresses and how they'd get mapped incorrectly without this patch?

Rich

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#1436000 — [PATCH v5 14/22] sh: SH7751 core dtsi

SH7751 core and internal peripheral define.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 arch/sh/boot/dts/include/dt-bindings               |  1 +
 arch/sh/boot/dts/sh7751.dtsi                       | 83 ++++++++++++++++++++++
 include/dt-bindings/clock/renesas-sh7750.h         | 26 +++++++
 include/dt-bindings/interrupt-controller/sh_intc.h |  2 +
 4 files changed, 112 insertions(+)
 create mode 120000 arch/sh/boot/dts/include/dt-bindings
 create mode 100644 arch/sh/boot/dts/sh7751.dtsi
 create mode 100644 include/dt-bindings/clock/renesas-sh7750.h
 create mode 100644 include/dt-bindings/interrupt-controller/sh_intc.h

diff --git a/arch/sh/boot/dts/include/dt-bindings b/arch/sh/boot/dts/include/dt-bindings
new file mode 120000
index 0000000..08c00e4
--- /dev/null
+++ b/arch/sh/boot/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../../include/dt-bindings
\ No newline at end of file
diff --git a/arch/sh/boot/dts/sh7751.dtsi b/arch/sh/boot/dts/sh7751.dtsi
new file mode 100644
index 0000000..713e72e
--- /dev/null
+++ b/arch/sh/boot/dts/sh7751.dtsi
@@ -0,0 +1,83 @@
+/*
+ * Device Tree Source for the SH7751
+ *
+ * Copyright (C) 2016 Yoshinori Sato
+ */
+
+#include <dt-bindings/interrupt-controller/sh_intc.h>
+#include <dt-bindings/clock/renesas-sh7750.h>
+
+/ {
+	oclk: oscillator {
+                #clock-cells = <0>;
+                compatible = "fixed-clock";
+                clock-frequency = <0>;
+        };
+	cpg: clock-controller@ffc00000 {
+                compatible = "renesas,sh7750-cpg";
+                clocks = <&oclk>;
+                #clock-cells = <1>;
+		renesas,mult = <12>;
+                reg = <0xffc00000 32>, <0xfe0a0000 16>;
+        };
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cpu@0 {
+		      compatible = "renesas,sh4", "renesas,sh";
+		      clock-frequency = <266666666>;
+		};
+	};
+	shintc: interrupt-controller@ffd00000 {
+		compatible = "renesas,sh7751-intc";
+		#interrupt-cells = <2>;
+		interrupt-controller;
+		reg = <0xffd00000 14>, <0xfe080000 128>;
+
+	};
+	sci0: serial@ffe00000 {
+		compatible = "renesas,sci";
+		reg = <0xffe00000 0x20>;
+		interrupts = <evt2irq(0x4e0) 0>,
+		             <evt2irq(0x500) 0>,
+		             <evt2irq(0x540) 0>,
+		             <evt2irq(0x520) 0>;
+		clocks = <&cpg SH7750_CLK_SCI>;
+		clock-names = "fck";
+		status = "disabled";
+	};
+	sci1: serial@ffe80000 {
+		compatible = "renesas,scif";
+		reg = <0xffe80000 0x100>;
+		interrupts = <evt2irq(0x700) 0>,
+			     <evt2irq(0x720) 0>,
+			     <evt2irq(0x760) 0>,
+			     <evt2irq(0x740) 0>;
+		clocks = <&cpg SH7750_CLK_SCIF>;
+		clock-names = "fck";
+		status = "disabled";
+	};
+	tmu: timer@ffd80000 {
+		compatible = "renesas,tmu";
+		reg = <0xffd80000 12>;
+		interrupts = <evt2irq(0x400) 0>,
+			     <evt2irq(0x420) 0>,
+			     <evt2irq(0x440) 0>;
+		clocks = <&cpg SH7750_CLK_TMU0>;
+		clock-names = "fck";
+		renesas,channels-mask = <0x03>;
+	};
+	pci: pci-controller@fe200000 {
+		compatible = "renesas,sh7751-pci";
+		device_type = "pci";
+		bus-range = <0 0>;
+		#address-cells = <2>;
+		#size-cells = <1>;
+		ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
+		         <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
+		reg = <0xfe200000 0x0400>, <0xff800000 0x0030>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0x1800 0 7>;
+		status = "disabled";
+	};
+};
diff --git a/include/dt-bindings/clock/renesas-sh7750.h b/include/dt-bindings/clock/renesas-sh7750.h
new file mode 100644
index 0000000..546c0b1
--- /dev/null
+++ b/include/dt-bindings/clock/renesas-sh7750.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2016 Yoshinori Sato
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DT_BINDINGS_CLOCK_RENESAS_SH7750_H__
+#define __DT_BINDINGS_CLOCK_RENESAS_SH7750_H__
+
+#define SH7750_CLK_SCI	0
+#define SH7750_CLK_RTC	1
+#define SH7750_CLK_TMU0	2
+#define SH7750_CLK_TMU1	3
+#define SH7750_CLK_TMU2	4
+#define SH7750_CLK_SCIF	5
+#define SH7750_CLK_DMAC	6
+#define SH7750_CLK_UBC	7
+#define SH7750_CLK_SQ	8
+#define SH7750_CLK_INTC 9
+#define SH7750_CLK_TMU3	10
+#define SH7750_CLK_TMU4	11
+#define SH7750_CLK_PCIC	12
+
+#endif /* __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ */
diff --git a/include/dt-bindings/interrupt-controller/sh_intc.h b/include/dt-bindings/interrupt-controller/sh_intc.h
new file mode 100644
index 0000000..8c9dcdc
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/sh_intc.h
@@ -0,0 +1,2 @@
+#define evt2irq(evt)		(((evt) >> 5) - 16)
+#define irq2evt(irq)		(((irq) + 16) << 5)
-- 
2.7.0

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#1436001 — [PATCH v5 06/22] sh: FDT address save before bank change

SH3/4 have register bank of R0-R7.
Preset FDT address assigned bank depend on boot loader.
Before setting a bank because we don't depend on a boot loader, it's evacuated.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 arch/sh/kernel/head_32.S | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index 974bc15..ef44fe8 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -58,6 +58,9 @@ ENTRY(empty_zero_page)
  *
  */
 ENTRY(_stext)
+#ifdef CONFIG_OF
+	mov	r4, r12		! Store device tree blob pointer
+#endif
 	!			Initialize Status Register
 	mov.l	1f, r0		! MD=1, RB=0, BL=0, IMASK=0xF
 	ldc	r0, sr
@@ -67,10 +70,6 @@ ENTRY(_stext)
 	ldc	r0, r6_bank
 #endif
 
-#ifdef CONFIG_OF
-	mov	r4, r12		! Store device tree blob pointer in r12
-#endif
-	
 	/*
 	 * Prefetch if possible to reduce cache miss penalty.
 	 *
-- 
2.7.0

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#1436003 — [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 arch/sh/boot/dts/Makefile    |  2 ++
 arch/sh/boot/dts/landisk.dts | 61 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 63 insertions(+)
 create mode 100644 arch/sh/boot/dts/landisk.dts

diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index 38fdc38..cf5aec4 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,5 +1,7 @@
 obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
 
+dtb-y += landisk.dtb
+
 dtstree		:= $(srctree)/$(src)
 clean-files := *.dtb.S
 always	    := $(dtb-y)
diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
new file mode 100644
index 0000000..3745ae0
--- /dev/null
+++ b/arch/sh/boot/dts/landisk.dts
@@ -0,0 +1,61 @@
+/dts-v1/;
+
+#include "sh7751.dtsi"
+
+/ {
+	model = "iodata,HDL-U";
+	compatible = "iodata,hdl-u";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&shintc>;
+	chosen {
+		stdout-path = "serial1:115200n8";
+	};
+	aliases {
+		serial0 = &sci0;
+		serial1 = &sci1;
+	};
+
+	memory@0c000000 {
+		device_type = "memory";
+		reg = <0x0c000000 0x4000000>;
+	};
+
+	cpldintc: cpld@b0000000 {
+		compatible = "iodata,landisk-intc";
+		#interrupt-cells = <1>;
+		#address-cells = <0>;
+		reg = <0xb0000000 8>;
+		interrupt-map=<0 &shintc evt2irq(0x2a0)>,
+		              <1 &shintc evt2irq(0x2c0)>,
+		              <2 &shintc evt2irq(0x2e0)>,
+			      <3 &shintc evt2irq(0x300)>,
+		              <4 &shintc evt2irq(0x320)>,
+			      <5 &shintc evt2irq(0x340)>,
+		              <6 &shintc evt2irq(0x360)>,
+			      <7 &shintc evt2irq(0x380)>;
+	};
+};
+
+&oclk {
+	clock-frequency = <22222222>;
+};
+
+&sci0 {
+	status = "ok";
+};
+
+&sci1 {
+	status = "ok";
+};
+
+&pci {
+	compatible = "renesas,sh7751-pci", "iodata,landisk-pci";
+	interrupt-map-mask = <0x1800 0 7>;
+	interrupt-map = <0x0000 0 1 &cpldintc 0>,
+	                <0x0800 0 1 &cpldintc 1>,
+	                <0x1000 0 1 &cpldintc 2>,
+	                <0x1000 0 2 &cpldintc 3>,
+	                <0x1000 0 3 &cpldintc 0>;
+	status = "ok";
+};
-- 
2.7.0

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#1436026 — Re: [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree

Hello.

On 07/03/2016 07:46 PM, Yoshinori Sato wrote:

> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

[...]

> diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
> new file mode 100644
> index 0000000..3745ae0
> --- /dev/null
> +++ b/arch/sh/boot/dts/landisk.dts
> @@ -0,0 +1,61 @@
[...]
> +&oclk {
> +	clock-frequency = <22222222>;
> +};
> +
> +&sci0 {
> +	status = "ok";

    Should be "okay". Sorry for overlooking it.

> +};
> +
> +&sci1 {
> +	status = "ok";

    Likewise.

[...]

MBR, Sergei

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#1437824 — Re: [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree

On Mon, 04 Jul 2016 04:00:59 +0900,
Sergei Shtylyov wrote:
> 
> Hello.
> 
> On 07/03/2016 07:46 PM, Yoshinori Sato wrote:
> 
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> 
> [...]
> 
> > diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
> > new file mode 100644
> > index 0000000..3745ae0
> > --- /dev/null
> > +++ b/arch/sh/boot/dts/landisk.dts
> > @@ -0,0 +1,61 @@
> [...]
> > +&oclk {
> > +	clock-frequency = <22222222>;
> > +};
> > +
> > +&sci0 {
> > +	status = "ok";
> 
>    Should be "okay". Sorry for overlooking it.
> 
> > +};
> > +
> > +&sci1 {
> > +	status = "ok";
> 
>    Likewise.
> 
> [...]
> 
> MBR, Sergei
>

Updated.
Thanks.

> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

-- 
Yoshinori Sato
<ysato@users.sourceforge.jp>

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#1436004 — [PATCH v5 22/22] sh: Renesas RTS7751R2Dplus (a,k.a R2Dplus) DeviceTree

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 arch/sh/boot/dts/Makefile    |  1 +
 arch/sh/boot/dts/r2dplus.dts | 85 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 86 insertions(+)
 create mode 100644 arch/sh/boot/dts/r2dplus.dts

diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index cf5aec4..e059ce2b 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,6 +1,7 @@
 obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
 
 dtb-y += landisk.dtb
+otb-y += r2dplus.dtb
 
 dtstree		:= $(srctree)/$(src)
 clean-files := *.dtb.S
diff --git a/arch/sh/boot/dts/r2dplus.dts b/arch/sh/boot/dts/r2dplus.dts
new file mode 100644
index 0000000..f9c01f9
--- /dev/null
+++ b/arch/sh/boot/dts/r2dplus.dts
@@ -0,0 +1,85 @@
+/dts-v1/;
+
+#include "sh7751.dtsi"
+
+/ {
+	model = "renesas,RTS7751R2D+";
+	compatible = "renesas,r2dplus";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	interrupt-parent = <&shintc>;
+	chosen {
+		stdout-path = "serial1:115200n8";
+	};
+	aliases {
+		serial1 = &sci1;
+	};
+
+	memory@0c000000 {
+		device_type = "memory";
+		reg = <0x0c000000 0x4000000>;
+	};
+
+	fpgaintc: fpga@a4000000 {
+		compatible = "renesas,r2dplus-intc";
+		#interrupt-cells = <1>;
+		#address-cells = <0>;
+		reg = <0xa4000000 0x40>;
+		interrupt-map=<0 &shintc evt2irq(0x200)>,
+		              <1 &shintc evt2irq(0x220)>,
+		              <2 &shintc evt2irq(0x240)>,
+			      <3 &shintc evt2irq(0x260)>,
+		              <4 &shintc evt2irq(0x280)>,
+			      <5 &shintc evt2irq(0x2a0)>,
+		              <6 &shintc evt2irq(0x2c0)>,
+			      <7 &shintc evt2irq(0x2e0)>,
+		              <8 &shintc evt2irq(0x300)>,
+			      <9 &shintc evt2irq(0x320)>,
+		              <10 &shintc evt2irq(0x340)>,
+			      <11 &shintc evt2irq(0x360)>,
+		              <12 &shintc evt2irq(0x380)>,
+			      <13 &shintc evt2irq(0x3a0)>,
+		              <14 &shintc evt2irq(0x3c0)>;
+	};
+
+	ide: ide@b4001000 {
+		compatible = "ata-generic";
+		reg = <0xb4001000 0x10>, <0xb400080c 0x02>;
+		interrupt-parent = <&fpgaintc>;
+		interrupts = <1 0>;
+		reg-shift = <1>;
+		pio-mode = <0>;
+	};
+
+	sm501: display@13e00000 {
+		compatible = "smi,sm501";
+		reg = <0x10000000 0x13dfffff>, <0x13e00000 0x13ffffff>;
+		interrupt-parent = <&fpgaintc>;
+		interrupts = <4 0>;
+		mode = "640x480-16@60";
+		edid = [00 ff ff ff ff ff ff 00 04 21 00 00 00 00 00 00
+		        01 00 01 04 00 00 00 00 08 00 00 00 00 00 00 00
+			00 00 00 20 00 00 01 40 01 00 01 00 01 00 01 00
+			01 00 01 00 01 00 d6 09 80 a0 20 e0 2d 10 10 60
+			a2 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00
+			00 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00
+			00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+			00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fd];
+		smi,devices = <1>;
+	};
+};
+
+&oclk {
+	clock-frequency = <60000000>;
+};
+
+&sci1 {
+	status = "ok";
+};
+
+&pci {
+	compatible = "renesas,sh7751-pci", "renesas.r2dplus-pci";
+	interrupt-map-mask = <0x1800 0 7>;
+	interrupt-map = <0x1000 0 1 &fpgaintc 3 0>;
+	status = "ok";
+};
-- 
2.7.0

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#1436005 — [PATCH v5 18/22] sh: Add separate DTB build rule

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
 arch/sh/Makefile          | 7 +++++++
 arch/sh/boot/dts/Makefile | 2 ++
 2 files changed, 9 insertions(+)

diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 8adffa8..a44e630 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -189,6 +189,13 @@ drivers-$(CONFIG_OPROFILE)	+= arch/sh/oprofile/
 
 boot := arch/sh/boot
 
+%.dtb %.dtb.S %.dtb.o: | scripts
+	$(Q)$(MAKE) $(build)=arch/sh/boot/dts arch/sh/boot/dts/$@
+
+PHONY += dtbs
+dtbs: scripts
+	$(Q)$(MAKE) $(build)=arch/sh/boot/dts
+
 cflags-y	+= $(foreach d, $(cpuincdir-y), -Iarch/sh/include/$(d)) \
 		   $(foreach d, $(machdir-y), -Iarch/sh/include/$(d))
 
diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index e5ce3a0..38fdc38 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,3 +1,5 @@
 obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
 
+dtstree		:= $(srctree)/$(src)
 clean-files := *.dtb.S
+always	    := $(dtb-y)
-- 
2.7.0

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