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Re: [alsa-devel] [PATCH v5 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

Started byMark Brown <broonie@kernel.org>
First post2016-06-30 14:20 +0200
Last post2016-07-04 04:30 +0200
Articles 3 — 2 participants

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  Re: [alsa-devel] [PATCH v5 6/9] ASoC: mediatek: add mt2701 platform  driver implementation. Mark Brown <broonie@kernel.org> - 2016-06-30 14:20 +0200
    Re: [alsa-devel] [PATCH v5 6/9] ASoC: mediatek: add mt2701 platform  driver implementation. Garlic Tseng <garlic.tseng@mediatek.com> - 2016-06-30 15:50 +0200
      Re: [alsa-devel] [PATCH v5 6/9] ASoC: mediatek: add mt2701 platform  driver implementation. Garlic Tseng <garlic.tseng@mediatek.com> - 2016-07-04 04:30 +0200

#1434494 — Re: [alsa-devel] [PATCH v5 6/9] ASoC: mediatek: add mt2701 platform driver implementation.

FromMark Brown <broonie@kernel.org>
Date2016-06-30 14:20 +0200
SubjectRe: [alsa-devel] [PATCH v5 6/9] ASoC: mediatek: add mt2701 platform driver implementation.
Message-ID<rPJ6O-12j-35@gated-at.bofh.it>

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On Fri, Jun 17, 2016 at 03:43:57PM +0800, Garlic Tseng wrote:

> +static int mt2701_afe_i2s_set_clkdiv(struct snd_soc_dai *dai, int div_id,
> +				     int div)
> +{

Why are we adding a set_clkdiv() operation?  I would expect the driver
to be able to figure things out automatically.

> +	case DIV_ID_MCLK_TO_BCK:
> +		afe_priv->i2s_path[i2s_num].div_mclk_to_bck = div;
> +		break;
> +	case DIV_ID_BCK_TO_LRCK:
> +		afe_priv->i2s_path[i2s_num].div_bck_to_lrck = div;
> +		break;

Especially in the case where we're configuring LRCLK, that's trivial
when we know the sample rate which we have to know anyway.

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#1434560

FromGarlic Tseng <garlic.tseng@mediatek.com>
Date2016-06-30 15:50 +0200
Message-ID<rPKvT-1LB-5@gated-at.bofh.it>
In reply to#1434494
On Wed, 2016-06-29 at 20:13 +0100, Mark Brown wrote:
> On Fri, Jun 17, 2016 at 03:43:57PM +0800, Garlic Tseng wrote:
> 
> > +static int mt2701_afe_i2s_set_clkdiv(struct snd_soc_dai *dai, int div_id,
> > +				     int div)
> > +{
> 
> Why are we adding a set_clkdiv() operation?  I would expect the driver
> to be able to figure things out automatically.
> 
> > +	case DIV_ID_MCLK_TO_BCK:
> > +		afe_priv->i2s_path[i2s_num].div_mclk_to_bck = div;
> > +		break;
> > +	case DIV_ID_BCK_TO_LRCK:
> > +		afe_priv->i2s_path[i2s_num].div_bck_to_lrck = div;
> > +		break;
> 
> Especially in the case where we're configuring LRCLK, that's trivial
> when we know the sample rate which we have to know anyway.

Oh... actually I want to say 'div_mclk_over_bck' and 'div_bck_over_lrck'
I'll fix the naming if we decide to reserve the set_clkdiv() operation.

For div_bck_over_lrck, yes we only support bck = 64fs now so I'll remove
it. Maybe in the future we'll allow bck = 32fs for some board and I'll
send patch on that time.

For div_mclk_over_bck, mt2635 can offer 128fs and 256fs mclk to codec,
and it depends on the board so I tend to let machine driver configure
it. However, maybe changing it to div_mclk_over_lrck will be better.
I'll do the change.

BTW, some patch is applied for the patchset so I need not to send the
new version but send another patchset, right?


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#1436119

FromGarlic Tseng <garlic.tseng@mediatek.com>
Date2016-07-04 04:30 +0200
Message-ID<rR1O1-8j6-5@gated-at.bofh.it>
In reply to#1434560
On Thu, 2016-06-30 at 21:39 +0800, Garlic Tseng wrote:
> On Wed, 2016-06-29 at 20:13 +0100, Mark Brown wrote:
> > On Fri, Jun 17, 2016 at 03:43:57PM +0800, Garlic Tseng wrote:
> > 
> > > +static int mt2701_afe_i2s_set_clkdiv(struct snd_soc_dai *dai, int div_id,
> > > +				     int div)
> > > +{
> > 
> > Why are we adding a set_clkdiv() operation?  I would expect the driver
> > to be able to figure things out automatically.
> > 
> > > +	case DIV_ID_MCLK_TO_BCK:
> > > +		afe_priv->i2s_path[i2s_num].div_mclk_to_bck = div;
> > > +		break;
> > > +	case DIV_ID_BCK_TO_LRCK:
> > > +		afe_priv->i2s_path[i2s_num].div_bck_to_lrck = div;
> > > +		break;
> > 
> > Especially in the case where we're configuring LRCLK, that's trivial
> > when we know the sample rate which we have to know anyway.
> 
> Oh... actually I want to say 'div_mclk_over_bck' and 'div_bck_over_lrck'
> I'll fix the naming if we decide to reserve the set_clkdiv() operation.
> (omit some comment)

Hi Mark, I recognize that we can set mclk by set_sysclk, fix bck to 64fs
and let lrck be the same as sample rate so yes we don't need set_clkdiv.

Thanks for comment, I'll fix that in the next patch.

Garlic

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