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| Started by | Jon Hunter <jonathanh@nvidia.com> |
|---|---|
| First post | 2016-06-30 13:00 +0200 |
| Last post | 2016-06-30 13:00 +0200 |
| Articles | 1 — 1 participant |
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[PATCH 4/4] arm64: tegra210: Add XUSB powergates Jon Hunter <jonathanh@nvidia.com> - 2016-06-30 13:00 +0200
| From | Jon Hunter <jonathanh@nvidia.com> |
|---|---|
| Date | 2016-06-30 13:00 +0200 |
| Subject | [PATCH 4/4] arm64: tegra210: Add XUSB powergates |
| Message-ID | <rPHRo-72-39@gated-at.bofh.it> |
The Tegra210 XUSB subsystem has 3 power partitions which are XUSBA
(super-speed logic), XUSBB (USB device logic) and XUSBC (USB host
logic). Populate the device-tree nodes for these XUSB partitions.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 65b829b762bb..efb0fd98b789 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -670,6 +670,30 @@
<&tegra_car TEGRA210_CLK_MIPI_CAL>;
#power-domain-cells = <0>;
};
+
+ pd_xusbss: xusba {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>;
+ clock-names = "xusb_ss";
+ resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
+ reset-names = "xusb_ss";
+ #power-domain-cells = <0>;
+ };
+
+ pd_xusbdev: xusbb {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>;
+ clock-names = "xusb_dev";
+ resets = <&tegra_car 95>;
+ reset-names = "xusb_dev";
+ #power-domain-cells = <0>;
+ };
+
+ pd_xusbhost: xusbc {
+ clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+ clock-names = "xusb_host";
+ resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
+ reset-names = "xusb_host";
+ #power-domain-cells = <0>;
+ };
};
};
--
2.1.4
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