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[PATCH v2 1/3] irqchip: exynos_combiner: fixup reg access on be

Started byMatthew Leach <matthew@mattleach.net>
First post2016-06-22 19:00 +0200
Last post2016-06-23 21:40 +0200
Articles 3 — 2 participants

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  [PATCH v2 1/3] irqchip: exynos_combiner: fixup reg access on be Matthew Leach <matthew@mattleach.net> - 2016-06-22 19:00 +0200
    Re: [PATCH v2 1/3] irqchip: exynos_combiner: fixup reg access on be Jason Cooper <jason@lakedaemon.net> - 2016-06-23 20:30 +0200
      Re: [PATCH v2 1/3] irqchip: exynos_combiner: fixup reg access on be Matthew Leach <matthew@mattleach.net> - 2016-06-23 21:40 +0200

#1428976 — [PATCH v2 1/3] irqchip: exynos_combiner: fixup reg access on be

FromMatthew Leach <matthew@mattleach.net>
Date2016-06-22 19:00 +0200
Subject[PATCH v2 1/3] irqchip: exynos_combiner: fixup reg access on be
Message-ID<rMTFn-5Zi-13@gated-at.bofh.it>
Use the byte-order aware big endian accessors, allowing for kernels
running under big-endian.

Signed-off-by: Matthew Leach <matthew@mattleach.net>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
CC: Thomas Gleixner <tglx@linutronix.de>
CC: Jason Cooper <jason@lakedaemon.net>
CC: Marc Zyngier <marc.zyngier@arm.com>
CC: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-samsung-soc@vger.kernel.org
---
 drivers/irqchip/exynos-combiner.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/irqchip/exynos-combiner.c b/drivers/irqchip/exynos-combiner.c
index ead15be..97ae34c 100644
--- a/drivers/irqchip/exynos-combiner.c
+++ b/drivers/irqchip/exynos-combiner.c
@@ -55,14 +55,14 @@ static void combiner_mask_irq(struct irq_data *data)
 {
 	u32 mask = 1 << (data->hwirq % 32);
 
-	__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
+	writel_relaxed(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
 }
 
 static void combiner_unmask_irq(struct irq_data *data)
 {
 	u32 mask = 1 << (data->hwirq % 32);
 
-	__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
+	writel_relaxed(mask, combiner_base(data) + COMBINER_ENABLE_SET);
 }
 
 static void combiner_handle_cascade_irq(struct irq_desc *desc)
@@ -75,7 +75,7 @@ static void combiner_handle_cascade_irq(struct irq_desc *desc)
 	chained_irq_enter(chip, desc);
 
 	spin_lock(&irq_controller_lock);
-	status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
+	status = readl_relaxed(chip_data->base + COMBINER_INT_STATUS);
 	spin_unlock(&irq_controller_lock);
 	status &= chip_data->irq_mask;
 
@@ -135,7 +135,7 @@ static void __init combiner_init_one(struct combiner_chip_data *combiner_data,
 	combiner_data->parent_irq = irq;
 
 	/* Disable all interrupts */
-	__raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
+	writel_relaxed(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
 }
 
 static int combiner_irq_domain_xlate(struct irq_domain *d,
@@ -218,7 +218,7 @@ static int combiner_suspend(void)
 
 	for (i = 0; i < max_nr; i++)
 		combiner_data[i].pm_save =
-			__raw_readl(combiner_data[i].base + COMBINER_ENABLE_SET);
+			readl_relaxed(combiner_data[i].base + COMBINER_ENABLE_SET);
 
 	return 0;
 }
@@ -235,10 +235,10 @@ static void combiner_resume(void)
 	int i;
 
 	for (i = 0; i < max_nr; i++) {
-		__raw_writel(combiner_data[i].irq_mask,
-			     combiner_data[i].base + COMBINER_ENABLE_CLEAR);
-		__raw_writel(combiner_data[i].pm_save,
-			     combiner_data[i].base + COMBINER_ENABLE_SET);
+		writel_relaxed(combiner_data[i].irq_mask,
+			       combiner_data[i].base + COMBINER_ENABLE_CLEAR);
+		writel_relaxed(combiner_data[i].pm_save,
+			       combiner_data[i].base + COMBINER_ENABLE_SET);
 	}
 }
 
-- 
2.8.3

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#1430039

FromJason Cooper <jason@lakedaemon.net>
Date2016-06-23 20:30 +0200
Message-ID<rNhy1-5wH-5@gated-at.bofh.it>
In reply to#1428976
Matt, Ben,

Both of you submitted similar patches for the same driver, same purpose.
Since Ben's hit my inbox first, I'll take his.

thx,

Jason.

On Wed, Jun 22, 2016 at 05:57:01PM +0100, Matthew Leach wrote:
> Use the byte-order aware big endian accessors, allowing for kernels
> running under big-endian.
> 
> Signed-off-by: Matthew Leach <matthew@mattleach.net>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> ---
> CC: Thomas Gleixner <tglx@linutronix.de>
> CC: Jason Cooper <jason@lakedaemon.net>
> CC: Marc Zyngier <marc.zyngier@arm.com>
> CC: Kukjin Kim <kgene@kernel.org>
> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> CC: linux-kernel@vger.kernel.org
> CC: linux-arm-kernel@lists.infradead.org
> CC: linux-samsung-soc@vger.kernel.org
> ---
>  drivers/irqchip/exynos-combiner.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/irqchip/exynos-combiner.c b/drivers/irqchip/exynos-combiner.c
> index ead15be..97ae34c 100644
> --- a/drivers/irqchip/exynos-combiner.c
> +++ b/drivers/irqchip/exynos-combiner.c
> @@ -55,14 +55,14 @@ static void combiner_mask_irq(struct irq_data *data)
>  {
>  	u32 mask = 1 << (data->hwirq % 32);
>  
> -	__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
> +	writel_relaxed(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
>  }
>  
>  static void combiner_unmask_irq(struct irq_data *data)
>  {
>  	u32 mask = 1 << (data->hwirq % 32);
>  
> -	__raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
> +	writel_relaxed(mask, combiner_base(data) + COMBINER_ENABLE_SET);
>  }
>  
>  static void combiner_handle_cascade_irq(struct irq_desc *desc)
> @@ -75,7 +75,7 @@ static void combiner_handle_cascade_irq(struct irq_desc *desc)
>  	chained_irq_enter(chip, desc);
>  
>  	spin_lock(&irq_controller_lock);
> -	status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
> +	status = readl_relaxed(chip_data->base + COMBINER_INT_STATUS);
>  	spin_unlock(&irq_controller_lock);
>  	status &= chip_data->irq_mask;
>  
> @@ -135,7 +135,7 @@ static void __init combiner_init_one(struct combiner_chip_data *combiner_data,
>  	combiner_data->parent_irq = irq;
>  
>  	/* Disable all interrupts */
> -	__raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
> +	writel_relaxed(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
>  }
>  
>  static int combiner_irq_domain_xlate(struct irq_domain *d,
> @@ -218,7 +218,7 @@ static int combiner_suspend(void)
>  
>  	for (i = 0; i < max_nr; i++)
>  		combiner_data[i].pm_save =
> -			__raw_readl(combiner_data[i].base + COMBINER_ENABLE_SET);
> +			readl_relaxed(combiner_data[i].base + COMBINER_ENABLE_SET);
>  
>  	return 0;
>  }
> @@ -235,10 +235,10 @@ static void combiner_resume(void)
>  	int i;
>  
>  	for (i = 0; i < max_nr; i++) {
> -		__raw_writel(combiner_data[i].irq_mask,
> -			     combiner_data[i].base + COMBINER_ENABLE_CLEAR);
> -		__raw_writel(combiner_data[i].pm_save,
> -			     combiner_data[i].base + COMBINER_ENABLE_SET);
> +		writel_relaxed(combiner_data[i].irq_mask,
> +			       combiner_data[i].base + COMBINER_ENABLE_CLEAR);
> +		writel_relaxed(combiner_data[i].pm_save,
> +			       combiner_data[i].base + COMBINER_ENABLE_SET);
>  	}
>  }
>  
> -- 
> 2.8.3
>

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#1430096

FromMatthew Leach <matthew@mattleach.net>
Date2016-06-23 21:40 +0200
Message-ID<rNiDM-6cT-17@gated-at.bofh.it>
In reply to#1430039
Jason Cooper <jason@lakedaemon.net> writes:

> Matt, Ben,

Hi Jason,

> Both of you submitted similar patches for the same driver, same
> purpose.  Since Ben's hit my inbox first, I'll take his.

Apologies.  I missed Ben sending in that patch.

Thanks,
-- 
Matt

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