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Groups > linux.kernel > #1421817 > unrolled thread

[PATCH v3 10/10] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in

Started byYakir Yang <ykk@rock-chips.com>
First post2016-06-14 13:50 +0200
Last post2016-06-23 16:30 +0200
Articles 9 — 3 participants

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Contents

  [PATCH v3 10/10] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in Yakir Yang <ykk@rock-chips.com> - 2016-06-14 13:50 +0200
    [PATCH v3.1 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name Yakir Yang <ykk@rock-chips.com> - 2016-06-22 04:40 +0200
    [PATCH v3.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf Yakir Yang <ykk@rock-chips.com> - 2016-06-22 04:40 +0200
      [PATCH v4 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf Yakir Yang <ykk@rock-chips.com> - 2016-06-23 03:50 +0200
      [PATCH v4 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name Yakir Yang <ykk@rock-chips.com> - 2016-06-23 03:50 +0200
        Re: [PATCH v4 2/2] dt-bindings: analogix_dp: rockchip: correct the  wrong compatible name Doug Anderson <dianders@chromium.org> - 2016-06-23 07:20 +0200
      [PATCH v4.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf Yakir Yang <ykk@rock-chips.com> - 2016-06-23 04:00 +0200
        Re: [PATCH v4.1 1/2] drm/rockchip: analogix_dp: introduce the pclk  for grf Doug Anderson <dianders@chromium.org> - 2016-06-23 07:20 +0200
    Re: [PATCH v3 10/10] drm/bridge: analogix_dp: fix no drm hpd event  when panel plug in Sean Paul <seanpaul@chromium.org> - 2016-06-23 16:30 +0200

#1421817 — [PATCH v3 10/10] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-14 13:50 +0200
Subject[PATCH v3 10/10] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
Message-ID<rJV0Z-4hM-15@gated-at.bofh.it>
The enum value of DP_IRQ_TYPE_HP_CABLE_IN is zero, but driver only
send drm hp event when the irq_type and the enum value is true.

if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN || ...)
	drm_helper_hpd_irq_event(dp->drm_dev);

So there would no drm hpd event when cable plug in, to fix that
just need to assign all hotplug enum with no-zero values.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
---
Changes in v3:
- Add reviewed flag from Stéphane.
    [https://chromium-review.googlesource.com/#/c/346319/15]
- Add tested flag from Javier

Changes in v2: None

 drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
index f09275d..b456380 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
@@ -127,10 +127,10 @@ enum analog_power_block {
 };
 
 enum dp_irq_type {
-	DP_IRQ_TYPE_HP_CABLE_IN,
-	DP_IRQ_TYPE_HP_CABLE_OUT,
-	DP_IRQ_TYPE_HP_CHANGE,
-	DP_IRQ_TYPE_UNKNOWN,
+	DP_IRQ_TYPE_HP_CABLE_IN  = BIT(0),
+	DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
+	DP_IRQ_TYPE_HP_CHANGE    = BIT(2),
+	DP_IRQ_TYPE_UNKNOWN      = BIT(3),
 };
 
 struct video_info {
-- 
1.9.1

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#1428354 — [PATCH v3.1 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-22 04:40 +0200
Subject[PATCH v3.1 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
Message-ID<rMGf8-5Rv-13@gated-at.bofh.it>
In reply to#1421817
The document about rockchip platform make a mistaken in available
compatible name of "rk3288-edp", we should correct it to "rk3288-dp"
which correspond to the compatible name in driver.

This mistaken was introduced in commit be91c36247089 ("dt-bindings:
add document for rockchip variant of analogix_dp").

Reported-by: Tomasz Figa <tfiga@chromium.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Hi all,

This is an external patch for analogix_dp misc cleanup thread [0]
[0]: https://patchwork.kernel.org/patch/9175613/

BR,
- Yakir

 .../devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt       | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 726c945..827cc36 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -2,7 +2,7 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
 ================================
 
 Required properties:
-- compatible: "rockchip,rk3288-edp",
+- compatible: "rockchip,rk3288-dp",
 	      "rockchip,rk3399-edp";
 
 - reg: physical base address of the controller and length
-- 
1.9.1

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#1428356 — [PATCH v3.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-22 04:40 +0200
Subject[PATCH v3.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf
Message-ID<rMGf8-5Rv-9@gated-at.bofh.it>
In reply to#1421817
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Hi all,

This is an external patch for analogix_dp misc cleanup thread [0]
[0]: https://patchwork.kernel.org/patch/9175613/

BR,
- Yakir

 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 787dc51..6a83f1a 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -56,6 +56,7 @@ struct rockchip_dp_device {
 	struct drm_display_mode  mode;
 
 	struct clk               *pclk;
+	struct clk               *grfclk;
 	struct regmap            *grf;
 	struct reset_control     *rst;
 
@@ -151,11 +152,20 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
 
 	dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
 
+	if (dp->grfclk) {
+		ret = clk_prepare_enable(dp->grfclk);
+		if (ret < 0) {
+			dev_err(dp->dev, "failed to enable grfclk %d\n", ret);
+			return;
+		}
+	}
+
 	ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
-	if (ret != 0) {
+	if (ret != 0)
 		dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
-		return;
-	}
+
+	if (dp->grfclk)
+		clk_disable_unprepare(dp->grfclk);
 }
 
 static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
@@ -235,6 +245,10 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp)
 		return PTR_ERR(dp->grf);
 	}
 
+	dp->grfclk = devm_clk_get(dev, "grf");
+	if (IS_ERR(dp->grfclk))
+		dp->grfclk = NULL;
+
 	dp->pclk = devm_clk_get(dev, "pclk");
 	if (IS_ERR(dp->pclk)) {
 		dev_err(dev, "failed to get pclk property\n");
-- 
1.9.1

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#1429392 — [PATCH v4 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-23 03:50 +0200
Subject[PATCH v4 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf
Message-ID<rN1Wi-2Yp-3@gated-at.bofh.it>
In reply to#1428356
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Hi all,

This is an external patch for analogix_dp misc cleanup thread [0]
[0]: https://patchwork.kernel.org/patch/9175613/

BR,
- Yakir

Changes in v4:
- Check the the error code properly, 'EPROBE_DEFER' should be returned,
  'ENOENT' should assign a NULL point to grfclk, other errors should be
  regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
- Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/351821/]

Changes in v3:
- Add this patch in v3

 .../display/rockchip/analogix_dp-rockchip.txt      |  6 ++++++
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 23 +++++++++++++++++++---
 2 files changed, 26 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 726c945..0b39256 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -28,6 +28,12 @@ Required properties:
     Port 0: contained 2 endpoints, connecting to the output of vop.
     Port 1: contained 1 endpoint, connecting to the input of panel.
 
+Optional property for different chips:
+- clocks: from common clock binding: handle to grf_vio clock.
+
+- clock-names: from common clock binding:
+	       Required elements: "grf"
+
 For the below properties, please refer to Analogix DP binding document:
  * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
 - phys (required)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 787dc51..864ef92 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -56,6 +56,7 @@ struct rockchip_dp_device {
 	struct drm_display_mode  mode;
 
 	struct clk               *pclk;
+	struct clk               *grfclk;
 	struct regmap            *grf;
 	struct reset_control     *rst;
 
@@ -151,11 +152,17 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
 
 	dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
 
-	ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
-	if (ret != 0) {
-		dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+	ret = clk_prepare_enable(dp->grfclk);
+	if (ret < 0) {
+		dev_err(dp->dev, "failed to enable grfclk %d\n", ret);
 		return;
 	}
+
+	ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
+	if (ret != 0)
+		dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+
+	clk_disable_unprepare(dp->grfclk);
 }
 
 static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
@@ -235,6 +242,16 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp)
 		return PTR_ERR(dp->grf);
 	}
 
+	dp->grfclk = devm_clk_get(dev, "grf");
+	if (PTR_ERR(dp->grfclk) == -ENOENT) {
+		dp->grfclk = NULL;
+	} else if (PTR_ERR(dp->grfclk) == -EPROBE_DEFER) {
+		return -EPROBE_DEFER;
+	} else if (IS_ERR(dp->grfclk)) {
+		dev_err(dev, "failed to get grf clock\n");
+		return PTR_ERR(dp->cfgclk);
+	}
+
 	dp->pclk = devm_clk_get(dev, "pclk");
 	if (IS_ERR(dp->pclk)) {
 		dev_err(dev, "failed to get pclk property\n");
-- 
1.9.1

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#1429393 — [PATCH v4 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-23 03:50 +0200
Subject[PATCH v4 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
Message-ID<rN1Wi-2Yp-1@gated-at.bofh.it>
In reply to#1428356
The document about rockchip platform make a mistaken in available
compatible name of "rk3288-edp", we should correct it to "rk3288-dp"
which correspond to the compatible name in driver.

This mistaken was introduced in commit be91c36247089 ("dt-bindings:
add document for rockchip variant of analogix_dp").

Reported-by: Tomasz Figa <tfiga@chromium.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Hi all,

This is an external patch for analogix_dp misc cleanup thread [0]
[0]: https://patchwork.kernel.org/patch/9175613/

BR,
- Yakir

Changes in v4: None
Changes in v3:
- Add this patch in v3

 .../devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt       | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 0b39256..01cced1 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -2,7 +2,7 @@ Rockchip RK3288 specific extensions to the Analogix Display Port
 ================================
 
 Required properties:
-- compatible: "rockchip,rk3288-edp",
+- compatible: "rockchip,rk3288-dp",
 	      "rockchip,rk3399-edp";
 
 - reg: physical base address of the controller and length
-- 
1.9.1

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#1429449 — Re: [PATCH v4 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name

FromDoug Anderson <dianders@chromium.org>
Date2016-06-23 07:20 +0200
SubjectRe: [PATCH v4 2/2] dt-bindings: analogix_dp: rockchip: correct the wrong compatible name
Message-ID<rN5dv-5px-1@gated-at.bofh.it>
In reply to#1429393
Hi,

On Wed, Jun 22, 2016 at 6:47 PM, Yakir Yang <ykk@rock-chips.com> wrote:
> The document about rockchip platform make a mistaken in available
> compatible name of "rk3288-edp", we should correct it to "rk3288-dp"
> which correspond to the compatible name in driver.
>
> This mistaken was introduced in commit be91c36247089 ("dt-bindings:
> add document for rockchip variant of analogix_dp").
>
> Reported-by: Tomasz Figa <tfiga@chromium.com>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
> Hi all,
>
> This is an external patch for analogix_dp misc cleanup thread [0]
> [0]: https://patchwork.kernel.org/patch/9175613/
>
> BR,
> - Yakir
>
> Changes in v4: None
> Changes in v3:
> - Add this patch in v3
>
>  .../devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt       | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Douglas Anderson <dianders@chromium.org>

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#1429397 — [PATCH v4.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf

FromYakir Yang <ykk@rock-chips.com>
Date2016-06-23 04:00 +0200
Subject[PATCH v4.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf
Message-ID<rN25Y-329-9@gated-at.bofh.it>
In reply to#1428356
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
---
Hi all,

This is an external patch for analogix_dp misc cleanup thread [0]
[0]: https://patchwork.kernel.org/patch/9175613/

BR,
- Yakir

Changes in v4.1:
- Fix compiled error, sorry.
  "dp->cgfclk"  -->  'dp->grfclk'

Changes in v4:
- Check the the error code properly, 'EPROBE_DEFER' should be returned,
  'ENOENT' should assign a NULL point to grfclk, other errors should be
  regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
- Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
    [https://chromium-review.googlesource.com/#/c/351821/]

Changes in v3:
- Add this patch in v3

 .../display/rockchip/analogix_dp-rockchip.txt      |  6 ++++++
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 23 +++++++++++++++++++---
 2 files changed, 26 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
index 726c945..0b39256 100644
--- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt
@@ -28,6 +28,12 @@ Required properties:
     Port 0: contained 2 endpoints, connecting to the output of vop.
     Port 1: contained 1 endpoint, connecting to the input of panel.
 
+Optional property for different chips:
+- clocks: from common clock binding: handle to grf_vio clock.
+
+- clock-names: from common clock binding:
+	       Required elements: "grf"
+
 For the below properties, please refer to Analogix DP binding document:
  * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt
 - phys (required)
diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 787dc51..864ef92 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -56,6 +56,7 @@ struct rockchip_dp_device {
 	struct drm_display_mode  mode;
 
 	struct clk               *pclk;
+	struct clk               *grfclk;
 	struct regmap            *grf;
 	struct reset_control     *rst;
 
@@ -151,11 +152,17 @@ static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
 
 	dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
 
-	ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
-	if (ret != 0) {
-		dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+	ret = clk_prepare_enable(dp->grfclk);
+	if (ret < 0) {
+		dev_err(dp->dev, "failed to enable grfclk %d\n", ret);
 		return;
 	}
+
+	ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
+	if (ret != 0)
+		dev_err(dp->dev, "Could not write to GRF: %d\n", ret);
+
+	clk_disable_unprepare(dp->grfclk);
 }
 
 static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder)
@@ -235,6 +242,16 @@ static int rockchip_dp_init(struct rockchip_dp_device *dp)
 		return PTR_ERR(dp->grf);
 	}
 
+	dp->grfclk = devm_clk_get(dev, "grf");
+	if (PTR_ERR(dp->grfclk) == -ENOENT) {
+		dp->grfclk = NULL;
+	} else if (PTR_ERR(dp->grfclk) == -EPROBE_DEFER) {
+		return -EPROBE_DEFER;
+	} else if (IS_ERR(dp->grfclk)) {
+		dev_err(dev, "failed to get grf clock\n");
+		return PTR_ERR(dp->grfclk);
+	}
+
 	dp->pclk = devm_clk_get(dev, "pclk");
 	if (IS_ERR(dp->pclk)) {
 		dev_err(dev, "failed to get pclk property\n");
-- 
1.9.1

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#1429450 — Re: [PATCH v4.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf

FromDoug Anderson <dianders@chromium.org>
Date2016-06-23 07:20 +0200
SubjectRe: [PATCH v4.1 1/2] drm/rockchip: analogix_dp: introduce the pclk for grf
Message-ID<rN5dv-5px-3@gated-at.bofh.it>
In reply to#1429397
Yakir,

On Wed, Jun 22, 2016 at 6:58 PM, Yakir Yang <ykk@rock-chips.com> wrote:
> For RK3399's GRF module, if we want to operate the graphic related grf
> registers, we need to enable the pclk_vio_grf which supply power for VIO
> GRF IOs, so it's better to introduce an optional grf clock in driver.
>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> ---
> Hi all,
>
> This is an external patch for analogix_dp misc cleanup thread [0]
> [0]: https://patchwork.kernel.org/patch/9175613/
>
> BR,
> - Yakir
>
> Changes in v4.1:
> - Fix compiled error, sorry.
>   "dp->cgfclk"  -->  'dp->grfclk'
>
> Changes in v4:
> - Check the the error code properly, 'EPROBE_DEFER' should be returned,
>   'ENOENT' should assign a NULL point to grfclk, other errors should be
>   regarded as failed. (Tomasz, Doug, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/351821/20/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c@249]
> - Add the document about optional 'grf' clock (Tomasz, Doug, reviewed at Google Gerrit)
>     [https://chromium-review.googlesource.com/#/c/351821/]
>
> Changes in v3:
> - Add this patch in v3
>
>  .../display/rockchip/analogix_dp-rockchip.txt      |  6 ++++++
>  drivers/gpu/drm/rockchip/analogix_dp-rockchip.c    | 23 +++++++++++++++++++---
>  2 files changed, 26 insertions(+), 3 deletions(-)

I probably would have split into two patches so the bindings was its
own patch, but I don't think it's strictly required.

In any case, this seems good to me.

Reviewed-by: Douglas Anderson <dianders@chromium.org>

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#1429891 — Re: [PATCH v3 10/10] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in

FromSean Paul <seanpaul@chromium.org>
Date2016-06-23 16:30 +0200
SubjectRe: [PATCH v3 10/10] drm/bridge: analogix_dp: fix no drm hpd event when panel plug in
Message-ID<rNdNM-2OV-17@gated-at.bofh.it>
In reply to#1421817
On Tue, Jun 14, 2016 at 7:46 AM, Yakir Yang <ykk@rock-chips.com> wrote:
> The enum value of DP_IRQ_TYPE_HP_CABLE_IN is zero, but driver only
> send drm hp event when the irq_type and the enum value is true.
>
> if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN || ...)
>         drm_helper_hpd_irq_event(dp->drm_dev);
>
> So there would no drm hpd event when cable plug in, to fix that
> just need to assign all hotplug enum with no-zero values.
>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
> Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>

Reviewed-by: Sean Paul <seanpaul@chromium.org>

> ---
> Changes in v3:
> - Add reviewed flag from Stéphane.
>     [https://chromium-review.googlesource.com/#/c/346319/15]
> - Add tested flag from Javier
>
> Changes in v2: None
>
>  drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> index f09275d..b456380 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h
> @@ -127,10 +127,10 @@ enum analog_power_block {
>  };
>
>  enum dp_irq_type {
> -       DP_IRQ_TYPE_HP_CABLE_IN,
> -       DP_IRQ_TYPE_HP_CABLE_OUT,
> -       DP_IRQ_TYPE_HP_CHANGE,
> -       DP_IRQ_TYPE_UNKNOWN,
> +       DP_IRQ_TYPE_HP_CABLE_IN  = BIT(0),
> +       DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
> +       DP_IRQ_TYPE_HP_CHANGE    = BIT(2),
> +       DP_IRQ_TYPE_UNKNOWN      = BIT(3),
>  };
>
>  struct video_info {
> --
> 1.9.1
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

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