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| Started by | Cristina Ciocan <cristina.ciocan@intel.com> |
|---|---|
| First post | 2016-06-22 13:20 +0200 |
| Last post | 2016-06-23 11:10 +0200 |
| Articles | 3 — 3 participants |
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[PATCH] pinctrl: baytrail: Fix mingled clock pins Cristina Ciocan <cristina.ciocan@intel.com> - 2016-06-22 13:20 +0200
Re: [PATCH] pinctrl: baytrail: Fix mingled clock pins Mika Westerberg <mika.westerberg@linux.intel.com> - 2016-06-22 17:40 +0200
Re: [PATCH] pinctrl: baytrail: Fix mingled clock pins Linus Walleij <linus.walleij@linaro.org> - 2016-06-23 11:10 +0200
| From | Cristina Ciocan <cristina.ciocan@intel.com> |
|---|---|
| Date | 2016-06-22 13:20 +0200 |
| Subject | [PATCH] pinctrl: baytrail: Fix mingled clock pins |
| Message-ID | <rMOml-2Gn-13@gated-at.bofh.it> |
Fix plt clock 3, 4 and 5 pins, which were not in the proper order.
Signed-off-by: Cristina Ciocan <cristina.ciocan@intel.com>
---
drivers/pinctrl/intel/pinctrl-baytrail.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 677a811..7abfd42 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -401,9 +401,9 @@ static const struct byt_simple_func_mux byt_score_sata_mux[] = {
static const unsigned int byt_score_plt_clk0_pins[] = { 96 };
static const unsigned int byt_score_plt_clk1_pins[] = { 97 };
static const unsigned int byt_score_plt_clk2_pins[] = { 98 };
-static const unsigned int byt_score_plt_clk4_pins[] = { 99 };
-static const unsigned int byt_score_plt_clk5_pins[] = { 100 };
-static const unsigned int byt_score_plt_clk3_pins[] = { 101 };
+static const unsigned int byt_score_plt_clk3_pins[] = { 99 };
+static const unsigned int byt_score_plt_clk4_pins[] = { 100 };
+static const unsigned int byt_score_plt_clk5_pins[] = { 101 };
static const struct byt_simple_func_mux byt_score_plt_clk_mux[] = {
SIMPLE_FUNC("plt_clk", 1),
};
--
1.9.1
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| From | Mika Westerberg <mika.westerberg@linux.intel.com> |
|---|---|
| Date | 2016-06-22 17:40 +0200 |
| Message-ID | <rMSpX-5fh-11@gated-at.bofh.it> |
| In reply to | #1428693 |
On Wed, Jun 22, 2016 at 02:17:19PM +0300, Cristina Ciocan wrote: > Fix plt clock 3, 4 and 5 pins, which were not in the proper order. > > Signed-off-by: Cristina Ciocan <cristina.ciocan@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2016-06-23 11:10 +0200 |
| Message-ID | <rN8O6-7LB-17@gated-at.bofh.it> |
| In reply to | #1428693 |
On Wed, Jun 22, 2016 at 1:17 PM, Cristina Ciocan <cristina.ciocan@intel.com> wrote: > Fix plt clock 3, 4 and 5 pins, which were not in the proper order. > > Signed-off-by: Cristina Ciocan <cristina.ciocan@intel.com> Patch applied for fixes with Mika's ACK. Yours, Linus Walleij
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