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[PATCH v6 0/5] Thermal: Support for hardware-tracked trip points

Started byCaesar Wang <wxt@rock-chips.com>
First post2016-06-22 11:50 +0200
Last post2016-06-22 13:30 +0200
Articles 3 — 1 participant

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Contents

  [PATCH v6 0/5] Thermal: Support for hardware-tracked trip points Caesar Wang <wxt@rock-chips.com> - 2016-06-22 11:50 +0200
    [PATCH 1/2] thermal: rockchip: fixes the period time for tsadc Caesar Wang <wxt@rock-chips.com> - 2016-06-22 12:20 +0200
      [PATCH 2/2] thermal: rockchip: fixes the exception interrupts Caesar Wang <wxt@rock-chips.com> - 2016-06-22 13:30 +0200

#1428609 — [PATCH v6 0/5] Thermal: Support for hardware-tracked trip points

FromCaesar Wang <wxt@rock-chips.com>
Date2016-06-22 11:50 +0200
Subject[PATCH v6 0/5] Thermal: Support for hardware-tracked trip points
Message-ID<rMMaS-19U-17@gated-at.bofh.it>
Thank you all for providing inputs and comments on previous versions of
this patchset.
Especially thanks to the (Mikko,Sascha,Eduardo,Javi,Steve,Rui....).

The history patches come from Mikko and Sascha.
    http://thread.gmane.org/gmane.linux.power-management.general/59451

Now, I pick them up to continue upstream.
Nevermind!

This series history patches:
v5: https://lkml.org/lkml/2016/6/6/353
v4: https://lkml.org/lkml/2016/5/27/122
v3: https://lkml.org/lkml/2016/5/24/797
v2: https://lkml.org/lkml/2016/5/3/220
v1: https://lkml.org/lkml/2016/4/24/227

This series adds support for hardware trip points. It picks up earlier
work from Mikko Perttunen. Mikko implemented hardware trip points as part
of the device tree support. It was suggested back then to move the
functionality to the thermal core instead of putting more code into the
device tree support. This series does exactly that.

This series patches rebase the conflicts with the lastest next kernel.
Note that the hardware-tracked trip points are very well tested currently.

Verified and tested on https://github.com/Caesar-github/rockchip/tree/wip/fixes-thermal-0622
That's based on the next kernel (4.7-rc4).
localhost / # cat /proc/version
Linux version 4.7.0-rc4-next-20160622-06645-g5cba085 (wxt@nb)
---
There are five pathes in this series.
thermal: Add support for hardware-tracked trip point
thermal: of: implement .set_trips for device tree thermal zones
thermal: streamline get_trend callbacks
thermal: bang-bang governor: act on lower trip boundary
thermal: rockchip: add the set_trips function

Note: the hardware-tracked trip points that the similar patches were verified
on ChromoeOs platform.
e.g.:
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.14
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.18
https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.4
---

Anyway, I take the lastest thermal change to test from next kernel,

Tested on RK3399 SoCs on https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.4
And
Tested on RK3288 SoCs with chromebook on next kernel.
localhost / # while true; do grep "" /sys/class/thermal/thermal_zone[0-1]/temp; sleep .5; done
/sys/class/thermal/thermal_zone1/temp:45454
/sys/class/thermal/thermal_zone2/temp:44090
/sys/class/thermal/thermal_zone1/temp:44545
/sys/class/thermal/thermal_zone2/temp:44545
/sys/class/thermal/thermal_zone1/temp:45454
/sys/class/thermal/thermal_zone2/temp:44545
/sys/class/thermal/thermal_zone1/temp:45000
...
Then add the loading,
localhost / # md5sum /dev/zero &
[3] 8354
..
The Set trips trigger the hardware-tracked points.

rockchip-thermal ff280000.tsadc: sensor 1 - temp: 68461, retval: 0
rockchip-thermal ff280000.tsadc: sensor 2 - temp: 64166, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 70000, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 75000
rockchip-thermal ff280000.tsadc: sensor 2 - temp: 66153, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 69230, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 70000
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 68076, retval: 0
rockchip-thermal ff280000.tsadc: sensor 2 - temp: 65384, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 69615, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 70000, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 75000
rockchip-thermal ff280000.tsadc: sensor 2 - temp: 65384, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 69615, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 70000
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 69615, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 69230, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 70833, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 75000
rockchip-thermal ff280000.tsadc: sensor 2 - temp: 66153, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 69230, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 70000
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 70416, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 75000
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 70000, retval: 0
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 69615, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 70000
rockchip-thermal ff280000.tsadc: sensor 1 - temp: 70000, retval: 0
rockchip-thermal ff280000.tsadc: rockchip_thermal_set_trips: sensor 1: low: 68000, high 75000
..
---
Anyway, the series patches are verified on rockchip platform.

Thanks someone are reviewing and testing for it.

-Caesar


Changes in v6:
- add Javi's Reviewed-by
- As Rui's comments on https://patchwork.kernel.org/patch/9157909/,
  add the "get_trip_hyst" to judge.
- fixes a check warning from the scripts.
- as the Keerthy comments on https://patchwork.kernel.org/patch/9157913/,
  change the get_trend for of_thermal.c.

Changes in v5:
- add the lock for thermal_zone_set_trips function.
- change based on next kernel.
- add the tested by Steve.

Changes in v4:
- Missing the lock added in v3.
- as the Javi comments, %s/implemnets/implements.

Changes in v3:
- as Javi comments on https://patchwork.kernel.org/patch/9001281/.
- add the lock for preventing the called from multi placce
- add the note for pre_low/high_trip.
- as the Javi comments on https://patchwork.kernel.org/patch/9001311/.
- add the select if they set the option for devicetree.
- Add the peter's ACK.

Changes in v2:
- update the sysfs-api.txt for set_trips.
- add the commit in patch[v2 2/5].
- Update the commit for patch[v2 4/5].

Caesar Wang (1):
  thermal: rockchip: add the set_trips function

Sascha Hauer (4):
  thermal: Add support for hardware-tracked trip points
  thermal: of: implement .set_trips for device tree thermal zones
  thermal: streamline get_trend callbacks
  thermal: bang-bang governor: act on lower trip boundary

 Documentation/thermal/sysfs-api.txt                |  7 +++
 drivers/thermal/gov_bang_bang.c                    |  2 +-
 drivers/thermal/of-thermal.c                       | 35 ++++++++------
 drivers/thermal/rockchip_thermal.c                 | 39 ++++++++++++++++
 drivers/thermal/thermal_core.c                     | 54 ++++++++++++++++++++++
 drivers/thermal/thermal_sysfs.c                    |  3 ++
 drivers/thermal/ti-soc-thermal/ti-thermal-common.c | 25 ++++------
 include/linux/thermal.h                            | 16 ++++++-
 8 files changed, 147 insertions(+), 34 deletions(-)

-- 
1.9.1

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#1428653 — [PATCH 1/2] thermal: rockchip: fixes the period time for tsadc

FromCaesar Wang <wxt@rock-chips.com>
Date2016-06-22 12:20 +0200
Subject[PATCH 1/2] thermal: rockchip: fixes the period time for tsadc
Message-ID<rMNqi-25n-15@gated-at.bofh.it>
In reply to#1428609
We should increase the period cycles to save power since the rk3399 has
the high frequency for tsadc clock.

Fixes commit b0d70338bca22cb14
("thermal: rockchip: Support the RK3399 SoCs in thermal driver")

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org

---

Note:
- depend on the " [v6,5/5] thermal: rockchip: add the set_trips function"
  at https://patchwork.kernel.org/patch/9192179/, otherwise will cause the merge
  conflict.

 drivers/thermal/rockchip_thermal.c | 34 ++++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 8175cdb..2d5ba97 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -211,8 +211,11 @@ struct rockchip_thermal_data {
 
 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
-#define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
-#define TSADCV2_AUTO_PERIOD_HT_TIME		50  /* msec */
+#define TSADCV2_AUTO_PERIOD_TIME		250 /* 250ms */
+#define TSADCV2_AUTO_PERIOD_HT_TIME		50  /* 50ms */
+#define TSADCV3_AUTO_PERIOD_TIME		187500 /* 250ms */
+#define TSADCV3_AUTO_PERIOD_HT_TIME		37500  /* 50ms */
+
 #define TSADCV2_USER_INTER_PD_SOC		0x340 /* 13 clocks */
 
 #define GRF_SARADC_TESTBIT			0x0e644
@@ -547,6 +550,16 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 		/* Set interleave value to workround ic time sync issue */
 		writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
 			       TSADCV2_USER_CON);
+
+		writel_relaxed(TSADCV2_AUTO_PERIOD_TIME,
+			       regs + TSADCV2_AUTO_PERIOD);
+		writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
+			       regs + TSADCV2_HIGHT_INT_DEBOUNCE);
+		writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
+			       regs + TSADCV2_AUTO_PERIOD_HT);
+		writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
+			       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
+
 	} else {
 		regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
 		mdelay(10);
@@ -555,6 +568,15 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 		regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
 		regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
 		usleep_range(90, 200); /* The spec note says at least 90 us */
+
+		writel_relaxed(TSADCV3_AUTO_PERIOD_TIME,
+			       regs + TSADCV2_AUTO_PERIOD);
+		writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
+			       regs + TSADCV2_HIGHT_INT_DEBOUNCE);
+		writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
+			       regs + TSADCV2_AUTO_PERIOD_HT);
+		writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
+			       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 	}
 
 	if (tshut_polarity == TSHUT_HIGH_ACTIVE)
@@ -563,14 +585,6 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
 	else
 		writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
 			       regs + TSADCV2_AUTO_CON);
-
-	writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
-	writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
-		       regs + TSADCV2_HIGHT_INT_DEBOUNCE);
-	writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
-		       regs + TSADCV2_AUTO_PERIOD_HT);
-	writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
-		       regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
 }
 
 static void rk_tsadcv2_irq_ack(void __iomem *regs)
-- 
1.9.1

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#1428701 — [PATCH 2/2] thermal: rockchip: fixes the exception interrupts

FromCaesar Wang <wxt@rock-chips.com>
Date2016-06-22 13:30 +0200
Subject[PATCH 2/2] thermal: rockchip: fixes the exception interrupts
Message-ID<rMOw2-2Jv-21@gated-at.bofh.it>
In reply to#1428653
The hardware-tracked trips will set the alarm interrupt value for
registers. Then when the thermal zone has no trips to be set,
That make the thermal trips callback a over range value.

The root cause is the rk_tsadcv2_temp_to_code() function to handle the
invalid temperature range is indeed incorrect, let's fix it on now.
Otherwise, the thermal alarm interrupt will be triggered all the time
on some SoCs.

Fox example:
localhost tmp # grep thermal /proc/interrupts; sleep 5;
grep thermal /proc/interrupts

23:     994830  ..    GICv3 129 Level     rockchip_thermal
23:    1003423  ..    GICv3 129 Level     rockchip_thermal

Reported-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
---

Changes in v1: None

 drivers/thermal/rockchip_thermal.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 2d5ba97..db5ecc5 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -401,13 +401,17 @@ static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 				   int temp)
 {
 	int high, low, mid;
+	u32 error = 0;
 
 	low = 0;
 	high = table.length - 1;
 	mid = (high + low) / 2;
 
-	if (temp < table.id[low].temp || temp > table.id[high].temp)
-		return 0;
+	/* Return mask code data when the temp is over table range */
+	if (temp < table.id[low].temp || temp > table.id[high].temp) {
+		error = table.data_mask;
+		goto exit;
+	}
 
 	while (low <= high) {
 		if (temp == table.id[mid].temp)
@@ -419,7 +423,9 @@ static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
 		mid = (low + high) / 2;
 	}
 
-	return 0;
+exit:
+	pr_err("Invalid the conversion, error=%d\n", error);
+	return error;
 }
 
 static int rk_tsadcv2_code_to_temp(struct chip_tsadc_table table, u32 code,
@@ -651,7 +657,11 @@ static void rk_tsadcv2_alarm_temp(struct chip_tsadc_table table,
 {
 	u32 alarm_value, int_en;
 
+	/* Make sure the value is valid */
 	alarm_value = rk_tsadcv2_temp_to_code(table, temp);
+	if (alarm_value == table.data_mask)
+		return;
+
 	writel_relaxed(alarm_value & table.data_mask,
 		       regs + TSADCV2_COMP_INT(chn));
 
@@ -665,7 +675,11 @@ static void rk_tsadcv2_tshut_temp(struct chip_tsadc_table table,
 {
 	u32 tshut_value, val;
 
+	/* Make sure the value is valid */
 	tshut_value = rk_tsadcv2_temp_to_code(table, temp);
+	if (tshut_value == table.data_mask)
+		return;
+
 	writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
 
 	/* TSHUT will be valid */
-- 
1.9.1

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