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| Started by | Chuah Kim Tatt <kim.tatt.chuah@intel.com> |
|---|---|
| First post | 2016-06-15 07:50 +0200 |
| Last post | 2016-06-16 11:40 +0200 |
| Articles | 4 — 3 participants |
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[PATCH v2 0/3] Fix DNV HSUART RX DMA timeout interrupt issue Chuah Kim Tatt <kim.tatt.chuah@intel.com> - 2016-06-15 07:50 +0200
[PATCH v2 3/3] serial: 8250_mid: Read RX buffer on RX DMA timeout for DNV Chuah Kim Tatt <kim.tatt.chuah@intel.com> - 2016-06-15 07:50 +0200
Re: [PATCH v2 0/3] Fix DNV HSUART RX DMA timeout interrupt issue Andy Shevchenko <andriy.shevchenko@linux.intel.com> - 2016-06-15 14:20 +0200
Re: [PATCH v2 0/3] Fix DNV HSUART RX DMA timeout interrupt issue Heikki Krogerus <heikki.krogerus@linux.intel.com> - 2016-06-16 11:40 +0200
| From | Chuah Kim Tatt <kim.tatt.chuah@intel.com> |
|---|---|
| Date | 2016-06-15 07:50 +0200 |
| Subject | [PATCH v2 0/3] Fix DNV HSUART RX DMA timeout interrupt issue |
| Message-ID | <rKbS9-6S6-3@gated-at.bofh.it> |
From: "Chuah, Kim Tatt" <kim.tatt.chuah@intel.com>
These patches fix a DNV HSUART DMA issue with timeout interrupts, where
RX data is stuck in buffer when RX DMA is used and the number of received
bytes is less than 4096.
These patches have been tested on Intel Denverton platform.
Changes from v1:
- Added patch "serial: 8250_dma: Export serial8250_rx_dma_flush()" to solve
build error when CONFIG_SERIAL_8250_MID is set to "m".
Chuah, Kim Tatt (3):
dmaengine: hsu: Export hsu_dma_get_status()
serial: 8250_dma: Export serial8250_rx_dma_flush()
serial: 8250_mid: Read RX buffer on RX DMA timeout for DNV
drivers/dma/hsu/hsu.c | 90 +++++++++++++++++++++++++++++---------
drivers/dma/hsu/pci.c | 11 ++++-
drivers/tty/serial/8250/8250_dma.c | 1 +
drivers/tty/serial/8250/8250_mid.c | 24 +++++++---
include/linux/dma/hsu.h | 14 ++++--
5 files changed, 109 insertions(+), 31 deletions(-)
--
1.9.1
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| From | Chuah Kim Tatt <kim.tatt.chuah@intel.com> |
|---|---|
| Date | 2016-06-15 07:50 +0200 |
| Subject | [PATCH v2 3/3] serial: 8250_mid: Read RX buffer on RX DMA timeout for DNV |
| Message-ID | <rKbSa-6S6-33@gated-at.bofh.it> |
| In reply to | #1422613 |
From: "Chuah, Kim Tatt" <kim.tatt.chuah@intel.com>
In DNV, when RX DMA is used and number of bytes received is less than
transfer size, only RX DMA timeout interrupt is sent. When this happens,
read the RX buffer.
Signed-off-by: Chuah, Kim Tatt <kim.tatt.chuah@intel.com>
---
drivers/tty/serial/8250/8250_mid.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_mid.c b/drivers/tty/serial/8250/8250_mid.c
index b218ff5..339de9c 100644
--- a/drivers/tty/serial/8250/8250_mid.c
+++ b/drivers/tty/serial/8250/8250_mid.c
@@ -96,6 +96,7 @@ static int tng_setup(struct mid8250 *mid, struct uart_port *p)
static int dnv_handle_irq(struct uart_port *p)
{
struct mid8250 *mid = p->private_data;
+ struct uart_8250_port *up = up_to_u8250p(p);
unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR);
u32 status;
int ret = IRQ_NONE;
@@ -103,9 +104,10 @@ static int dnv_handle_irq(struct uart_port *p)
if (fisr & BIT(2)) {
err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
- if (err > 0)
+ if (err > 0) {
+ serial8250_rx_dma_flush(up);
ret |= IRQ_HANDLED;
- else if (err == 0)
+ } else if (err == 0)
ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
}
if (fisr & BIT(1)) {
--
1.9.1
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| From | Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
|---|---|
| Date | 2016-06-15 14:20 +0200 |
| Message-ID | <rKhXA-2q2-9@gated-at.bofh.it> |
| In reply to | #1422613 |
On Wed, 2016-06-15 at 13:44 +0800, Chuah Kim Tatt wrote: > From: "Chuah, Kim Tatt" <kim.tatt.chuah@intel.com> > > These patches fix a DNV HSUART DMA issue with timeout interrupts, > where > RX data is stuck in buffer when RX DMA is used and the number of > received > bytes is less than 4096. > These patches have been tested on Intel Denverton platform. For entire series: Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > Changes from v1: > - Added patch "serial: 8250_dma: Export serial8250_rx_dma_flush()" > to solve > build error when CONFIG_SERIAL_8250_MID is set to "m". > > Chuah, Kim Tatt (3): > dmaengine: hsu: Export hsu_dma_get_status() > serial: 8250_dma: Export serial8250_rx_dma_flush() > serial: 8250_mid: Read RX buffer on RX DMA timeout for DNV > > drivers/dma/hsu/hsu.c | 90 > +++++++++++++++++++++++++++++--------- > drivers/dma/hsu/pci.c | 11 ++++- > drivers/tty/serial/8250/8250_dma.c | 1 + > drivers/tty/serial/8250/8250_mid.c | 24 +++++++--- > include/linux/dma/hsu.h | 14 ++++-- > 5 files changed, 109 insertions(+), 31 deletions(-) > -- Andy Shevchenko <andriy.shevchenko@linux.intel.com> Intel Finland Oy
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| From | Heikki Krogerus <heikki.krogerus@linux.intel.com> |
|---|---|
| Date | 2016-06-16 11:40 +0200 |
| Message-ID | <rKBWi-6Dj-23@gated-at.bofh.it> |
| In reply to | #1422613 |
On Wed, Jun 15, 2016 at 01:44:10PM +0800, Chuah Kim Tatt wrote: > From: "Chuah, Kim Tatt" <kim.tatt.chuah@intel.com> > > These patches fix a DNV HSUART DMA issue with timeout interrupts, where > RX data is stuck in buffer when RX DMA is used and the number of received > bytes is less than 4096. > These patches have been tested on Intel Denverton platform. For the series: Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> > Changes from v1: > - Added patch "serial: 8250_dma: Export serial8250_rx_dma_flush()" to solve > build error when CONFIG_SERIAL_8250_MID is set to "m". > > Chuah, Kim Tatt (3): > dmaengine: hsu: Export hsu_dma_get_status() > serial: 8250_dma: Export serial8250_rx_dma_flush() > serial: 8250_mid: Read RX buffer on RX DMA timeout for DNV > > drivers/dma/hsu/hsu.c | 90 +++++++++++++++++++++++++++++--------- > drivers/dma/hsu/pci.c | 11 ++++- > drivers/tty/serial/8250/8250_dma.c | 1 + > drivers/tty/serial/8250/8250_mid.c | 24 +++++++--- > include/linux/dma/hsu.h | 14 ++++-- > 5 files changed, 109 insertions(+), 31 deletions(-) > > -- > 1.9.1 Thanks, -- heikki
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