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| Started by | Aleksei Mamlin <mamlinav@gmail.com> |
|---|---|
| First post | 2016-06-14 13:30 +0200 |
| Last post | 2016-06-14 14:40 +0200 |
| Articles | 2 — 2 participants |
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[PATCH v2 1/4] ARM: dts: sun4i: Add A10 NAND controller pin definitions Aleksei Mamlin <mamlinav@gmail.com> - 2016-06-14 13:30 +0200
Re: [PATCH v2 1/4] ARM: dts: sun4i: Add A10 NAND controller pin definitions Maxime Ripard <maxime.ripard@free-electrons.com> - 2016-06-14 14:40 +0200
| From | Aleksei Mamlin <mamlinav@gmail.com> |
|---|---|
| Date | 2016-06-14 13:30 +0200 |
| Subject | [PATCH v2 1/4] ARM: dts: sun4i: Add A10 NAND controller pin definitions |
| Message-ID | <rJUHE-49V-29@gated-at.bofh.it> |
From: Boris Brezillon <boris.brezillon@free-electrons.com>
Define the NAND controller pin configs.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
---
arch/arm/boot/dts/sun4i-a10.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 6d9c7c70..e579bdd 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -1033,6 +1033,58 @@
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
};
+ nand_pins_a: nand_base0@0 {
+ allwinner,pins = "PC0", "PC1", "PC2",
+ "PC5", "PC8", "PC9", "PC10",
+ "PC11", "PC12", "PC13", "PC14",
+ "PC15", "PC16";
+ allwinner,function = "nand0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ nand_cs0_pins_a: nand_cs@0 {
+ allwinner,pins = "PC4";
+ allwinner,function = "nand0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ nand_cs1_pins_a: nand_cs@1 {
+ allwinner,pins = "PC3";
+ allwinner,function = "nand0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ nand_cs2_pins_a: nand_cs@2 {
+ allwinner,pins = "PC17";
+ allwinner,function = "nand0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ nand_cs3_pins_a: nand_cs@3 {
+ allwinner,pins = "PC18";
+ allwinner,function = "nand0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ nand_rb0_pins_a: nand_rb@0 {
+ allwinner,pins = "PC6";
+ allwinner,function = "nand0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ nand_rb1_pins_a: nand_rb@1 {
+ allwinner,pins = "PC7";
+ allwinner,function = "nand0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
ps20_pins_a: ps20@0 {
allwinner,pins = "PI20", "PI21";
allwinner,function = "ps2";
--
2.7.3
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| From | Maxime Ripard <maxime.ripard@free-electrons.com> |
|---|---|
| Date | 2016-06-14 14:40 +0200 |
| Subject | Re: [PATCH v2 1/4] ARM: dts: sun4i: Add A10 NAND controller pin definitions |
| Message-ID | <rJVNo-4Px-21@gated-at.bofh.it> |
| In reply to | #1421785 |
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Hi, On Tue, Jun 14, 2016 at 02:17:35PM +0300, Aleksei Mamlin wrote: > From: Boris Brezillon <boris.brezillon@free-electrons.com> > > Define the NAND controller pin configs. > > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> > Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com> Unfortunately, we don't have any user for it at the moment. Please re-submit it later when we'll have some :) Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
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