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| Started by | Alexandre TORGUE <alexandre.torgue@st.com> |
|---|---|
| First post | 2016-06-13 16:20 +0200 |
| Last post | 2016-06-15 17:40 +0200 |
| Articles | 2 — 2 participants |
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[PATCH] ARM: V7M: Add dsb before jumping in handler mode Alexandre TORGUE <alexandre.torgue@st.com> - 2016-06-13 16:20 +0200
Re: [PATCH] ARM: V7M: Add dsb before jumping in handler mode Vladimir Murzin <vladimir.murzin@arm.com> - 2016-06-15 17:40 +0200
| From | Alexandre TORGUE <alexandre.torgue@st.com> |
|---|---|
| Date | 2016-06-13 16:20 +0200 |
| Subject | [PATCH] ARM: V7M: Add dsb before jumping in handler mode |
| Message-ID | <rJASC-7p1-49@gated-at.bofh.it> |
According to ARM AN321 (section 4.12): "If the vector table is in writable memory such as SRAM, either relocated by VTOR or a device dependent memory remapping mechanism, then architecturally a memory barrier instruction is required after the vector table entry is updated, and if the exception is to be activated immediately" Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S index 7229d8d..2ddc435 100644 --- a/arch/arm/mm/proc-v7m.S +++ b/arch/arm/mm/proc-v7m.S @@ -104,6 +104,7 @@ __v7m_setup: badr r1, 1f ldr r5, [r12, #11 * 4] @ read the SVC vector entry str r1, [r12, #11 * 4] @ write the temporary SVC vector entry + dsb mov r6, lr @ save LR ldr sp, =init_thread_union + THREAD_START_SP cpsie i -- 1.9.1
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| From | Vladimir Murzin <vladimir.murzin@arm.com> |
|---|---|
| Date | 2016-06-15 17:40 +0200 |
| Message-ID | <rKl57-4l9-17@gated-at.bofh.it> |
| In reply to | #1420906 |
On 13/06/16 15:12, Alexandre TORGUE wrote: > According to ARM AN321 (section 4.12): > > "If the vector table is in writable memory such as SRAM, either relocated > by VTOR or a device dependent memory remapping mechanism, then > architecturally a memory barrier instruction is required after the vector > table entry is updated, and if the exception is to be activated > immediately" > > Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> > Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com> > Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com> > diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S > index 7229d8d..2ddc435 100644 > --- a/arch/arm/mm/proc-v7m.S > +++ b/arch/arm/mm/proc-v7m.S > @@ -104,6 +104,7 @@ __v7m_setup: > badr r1, 1f > ldr r5, [r12, #11 * 4] @ read the SVC vector entry > str r1, [r12, #11 * 4] @ write the temporary SVC vector entry > + dsb > mov r6, lr @ save LR > ldr sp, =init_thread_union + THREAD_START_SP > cpsie i >
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