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| Started by | Kieran Bingham <kieran@ksquared.org.uk> |
|---|---|
| First post | 2016-06-09 15:50 +0200 |
| Last post | 2016-06-13 13:40 +0200 |
| Articles | 3 — 2 participants |
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[PATCH 3/3] dt-bindings: Add Renesas R-Car FDP1 bindings Kieran Bingham <kieran@ksquared.org.uk> - 2016-06-09 15:50 +0200
Re: [PATCH 3/3] dt-bindings: Add Renesas R-Car FDP1 bindings Rob Herring <robh@kernel.org> - 2016-06-10 19:50 +0200
Re: [PATCH 3/3] dt-bindings: Add Renesas R-Car FDP1 bindings Kieran Bingham <kieran@ksquared.org.uk> - 2016-06-13 13:40 +0200
| From | Kieran Bingham <kieran@ksquared.org.uk> |
|---|---|
| Date | 2016-06-09 15:50 +0200 |
| Subject | [PATCH 3/3] dt-bindings: Add Renesas R-Car FDP1 bindings |
| Message-ID | <rI8vn-72W-1@gated-at.bofh.it> |
The FDP1 is a de-interlacing module which converts interlaced video to
progressive video. It is also capable of performing pixel format conversion
between YCbCr/YUV formats and RGB formats.
Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
---
.../devicetree/bindings/media/renesas,fdp1.txt | 34 ++++++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/renesas,fdp1.txt
diff --git a/Documentation/devicetree/bindings/media/renesas,fdp1.txt b/Documentation/devicetree/bindings/media/renesas,fdp1.txt
new file mode 100644
index 000000000000..e2da2aec5e9f
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/renesas,fdp1.txt
@@ -0,0 +1,34 @@
+Renesas R-Car Fine Display Processor (FDP1)
+-----------------------------------------------
+
+The FDP1 is a de-interlacing module which converts interlaced video to
+progressive video. It is capable of performing pixel format conversion between
+YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are supported as
+an input to the module.
+
+ - compatible: Must be one or more of the following
+
+ - "renesas,r8a7795-fdp1" for R8A7795 (R-Car H3)
+ - "renesas,r8a7796-fdp1" for R8A7796 (R-Car M3-W)
+ - "renesas,fdp1" for generic compatible
+
+ When compatible with the generic version, nodes must list the
+ SoC-specific version corresponding to the platform first, followed by the
+ family-specific and/or generic versions.
+
+ - reg: the register base and size for the device registers
+ - clocks: Reference to the functional clock
+ - renesas,fcp: Reference to the FCPF connected to the FDP1
+
+
+Device node example
+-------------------
+
+ fdp1ch1: fdp1@fe940000 {
+ compatible = "renesas,r8a7795-fdp1", "renesas,fdp1";
+ reg = <0 0xfe940000 0 0x2400>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 119>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ renesas,fcp = <&fcpf0>;
+ };
\ No newline at end of file
--
2.7.4
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| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2016-06-10 19:50 +0200 |
| Message-ID | <rIyJc-7Ck-7@gated-at.bofh.it> |
| In reply to | #1418336 |
On Thu, Jun 09, 2016 at 02:41:34PM +0100, Kieran Bingham wrote:
> The FDP1 is a de-interlacing module which converts interlaced video to
> progressive video. It is also capable of performing pixel format conversion
> between YCbCr/YUV formats and RGB formats.
>
> Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
> ---
> .../devicetree/bindings/media/renesas,fdp1.txt | 34 ++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/renesas,fdp1.txt
>
> diff --git a/Documentation/devicetree/bindings/media/renesas,fdp1.txt b/Documentation/devicetree/bindings/media/renesas,fdp1.txt
> new file mode 100644
> index 000000000000..e2da2aec5e9f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/renesas,fdp1.txt
> @@ -0,0 +1,34 @@
> +Renesas R-Car Fine Display Processor (FDP1)
> +-----------------------------------------------
> +
> +The FDP1 is a de-interlacing module which converts interlaced video to
> +progressive video. It is capable of performing pixel format conversion between
> +YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are supported as
> +an input to the module.
> +
> + - compatible: Must be one or more of the following
> +
> + - "renesas,r8a7795-fdp1" for R8A7795 (R-Car H3)
> + - "renesas,r8a7796-fdp1" for R8A7796 (R-Car M3-W)
> + - "renesas,fdp1" for generic compatible
> +
> + When compatible with the generic version, nodes must list the
> + SoC-specific version corresponding to the platform first, followed by the
> + family-specific and/or generic versions.
> +
> + - reg: the register base and size for the device registers
> + - clocks: Reference to the functional clock
> + - renesas,fcp: Reference to the FCPF connected to the FDP1
> +
> +
> +Device node example
> +-------------------
> +
> + fdp1ch1: fdp1@fe940000 {
> + compatible = "renesas,r8a7795-fdp1", "renesas,fdp1";
> + reg = <0 0xfe940000 0 0x2400>;
> + interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 119>;
> + power-domains = <&sysc R8A7795_PD_A3VP>;
Not documented.
> + renesas,fcp = <&fcpf0>;
> + };
> \ No newline at end of file
Fix this.
> --
> 2.7.4
>
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| From | Kieran Bingham <kieran@ksquared.org.uk> |
|---|---|
| Date | 2016-06-13 13:40 +0200 |
| Message-ID | <rJynL-5Ep-5@gated-at.bofh.it> |
| In reply to | #1419621 |
On 10/06/16 18:40, Rob Herring wrote:
> On Thu, Jun 09, 2016 at 02:41:34PM +0100, Kieran Bingham wrote:
>> The FDP1 is a de-interlacing module which converts interlaced video to
>> progressive video. It is also capable of performing pixel format conversion
>> between YCbCr/YUV formats and RGB formats.
>>
>> Signed-off-by: Kieran Bingham <kieran@bingham.xyz>
>> ---
>> .../devicetree/bindings/media/renesas,fdp1.txt | 34 ++++++++++++++++++++++
>> 1 file changed, 34 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/media/renesas,fdp1.txt
>>
>> diff --git a/Documentation/devicetree/bindings/media/renesas,fdp1.txt b/Documentation/devicetree/bindings/media/renesas,fdp1.txt
>> new file mode 100644
>> index 000000000000..e2da2aec5e9f
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/media/renesas,fdp1.txt
>> @@ -0,0 +1,34 @@
>> +Renesas R-Car Fine Display Processor (FDP1)
>> +-----------------------------------------------
>> +
>> +The FDP1 is a de-interlacing module which converts interlaced video to
>> +progressive video. It is capable of performing pixel format conversion between
>> +YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are supported as
>> +an input to the module.
>> +
>> + - compatible: Must be one or more of the following
>> +
>> + - "renesas,r8a7795-fdp1" for R8A7795 (R-Car H3)
>> + - "renesas,r8a7796-fdp1" for R8A7796 (R-Car M3-W)
>> + - "renesas,fdp1" for generic compatible
>> +
>> + When compatible with the generic version, nodes must list the
>> + SoC-specific version corresponding to the platform first, followed by the
>> + family-specific and/or generic versions.
>> +
>> + - reg: the register base and size for the device registers
>> + - clocks: Reference to the functional clock
>> + - renesas,fcp: Reference to the FCPF connected to the FDP1
>> +
>> +
>> +Device node example
>> +-------------------
>> +
>> + fdp1ch1: fdp1@fe940000 {
>> + compatible = "renesas,r8a7795-fdp1", "renesas,fdp1";
>> + reg = <0 0xfe940000 0 0x2400>;
>> + interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&cpg CPG_MOD 119>;
>> + power-domains = <&sysc R8A7795_PD_A3VP>;
>
> Not documented.
I'll mirror whatever the consensus is on this topic from the other patch
here.
>
>> + renesas,fcp = <&fcpf0>;
>> + };
>> \ No newline at end of file
>
> Fix this.
Ok
>> --
>> 2.7.4
>>
--
Regards
Kieran Bingham
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