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[PATCH 4.6 000/121] 4.6.2-stable review

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  [PATCH 4.6 000/121] 4.6.2-stable review Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 031/121] Input: xpad - prevent spurious input from wired Xbox 360 controllers Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 023/121] MIPS: Fix sigreturn via VDSO on microMIPS kernel Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 082/121] xen: use same main loop for counting and remapping pages Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 075/121] QE-UART: add "fsl,t1040-ucc-uart" to of_device_id Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 003/121] MIPS: math-emu: Fix jalr emulation when rd == $0 Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 072/121] mm: use phys_addr_t for reserve_bootmem_region() arguments Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 071/121] PKCS#7: fix missing break on OID_sha224 case Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 004/121] MIPS: MSA: Fix a link error on `_init_msa_upper with older GCC Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 049/121] rtlwifi: pci: use dev_kfree_skb_irq instead of kfree_skb in rtl_pci_reset_trx_ring Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:00 +0200
    [PATCH 4.6 117/121] xfs: xfs_iflush_cluster fails to abort on error Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 103/121] ext4: clean up error handling when orphan list is corrupted Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 001/121] f2fs: fix deadlock when flush inline data Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 106/121] ext4: address UBSAN warning in mb_find_order_for_block() Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 090/121] drm/i915: Discard previous atomic state on resume if connectors change Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 118/121] xfs: fix inode validity check in xfs_iflush_cluster Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 087/121] drm/amdgpu: Fix hdmi deep color support. Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 104/121] ext4: fix check of dqget() return value in ext4_ioctl_setproject() Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 102/121] ext4: fix hang when processing corrupted orphaned inode list Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 116/121] xfs: remove xfs_fs_evict_inode() Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 050/121] Revert "lpfc: Delete unnecessary checks before the function call mempool_destroy" Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 108/121] nfs: avoid race that crashes nfs_init_commit Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 109/121] PM / sleep: Handle failures in device_suspend_late() consistently Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 091/121] drm/atomic: Verify connector->funcs != NULL when clearing states Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 065/121] clk: bcm2835: pll_off should only update CM_PLL_ANARST Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 089/121] drm/fb_helper: Fix references to dev->mode_config.num_connector Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 055/121] regulator: Try to resolve regulators supplies on registration Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 113/121] gcov: disable tree-loop-im to reduce stack usage Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 088/121] drm/i915/fbdev: Fix num_connector references in intel_fb_initial_config() Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 114/121] xfs: disallow rw remount on fs with unknown ro-compat features Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 115/121] xfs: Dont wrap growfs AGFL indexes Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 120/121] drm: msm: remove unused variable Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 107/121] ext4: silence UBSAN in ext4_mb_init() Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 086/121] drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 105/121] ext4: fix oops on corrupted filesystem Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 063/121] clk: bcm2835: Fix PLL poweron Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 064/121] clk: at91: fix check of clk_register() returned value Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 084/121] drm/gma500: Fix possible out of bounds read Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 119/121] xfs: skip stale inodes in xfs_iflush_cluster Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 054/121] aacraid: Fix for KDUMP driver hang Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 046/121] rtlwifi: rtl8723be: Add antenna select module parameter Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 092/121] Bluetooth: 6lowpan: Fix memory corruption of ipv6 destination address Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 101/121] ext4: fix data exposure after a crash Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 111/121] scripts/package/Makefile: rpmbuild add support of RPMOPTS Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 112/121] mm: thp: avoid false positive VM_BUG_ON_PAGE in page_move_anon_rmap() Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:10 +0200
    [PATCH 4.6 040/121] ath10k: fix debugfs pktlog_filter write Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 007/121] MIPS: Fix siginfo.h to use strict posix types Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 035/121] ARM: dts: at91: fix typo in sama5d2 PIN_PD24 description Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 008/121] MIPS: Fix uapi include in exported asm/siginfo.h Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 027/121] affs: fix remount failure when there are no options changed Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 037/121] ARM: dts: imx35: restore existing used clock enumeration Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 010/121] MIPS: Handle highmem pages in __update_cache Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 041/121] ath10k: fix firmware assert in monitor mode Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 051/121] aacraid: Start adapter after updating number of MSIX vectors Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 057/121] mfd: intel_quark_i2c_gpio: Remove clock tree on error path Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 061/121] cpuidle: Indicate when a device has been unregistered Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 038/121] ath9k: Add a module parameter to invert LED polarity. Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 028/121] ASoC: ak4642: Enable cache usage to fix crashes on resume Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 052/121] aacraid: Relinquish CPU during timeout wait Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 014/121] MIPS: Reserve nosave data for hibernation Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 024/121] MIPS: Build microMIPS VDSO for microMIPS kernels Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 034/121] ARM: mvebu: fix GPIO config on the Linksys boards Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 047/121] rtlwifi: btcoexist: Implement antenna selection Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 025/121] MIPS: lib: Mark intrinsics notrace Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 033/121] ARM: sun7i: dt: Enable dram gate 5 (tve0 clock) for simplefb TV output Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 060/121] PM / Runtime: Fix error path in pm_runtime_force_resume() Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 043/121] ath10k: fix kernel panic, move arvifs list head init before htt init Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 036/121] ARM: dts: exynos: Add interrupt line to MAX8997 PMIC on exynos4210-trats Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 062/121] cpuidle: Fix cpuidle_state_is_coupled() argument in cpuidle_enter() Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 026/121] MIPS: VDSO: Build with `-fno-strict-aliasing Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 056/121] hwmon: (ads7828) Enable internal reference Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 006/121] MIPS: Avoid using unwind_stack() with usermode Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 042/121] ath10k: fix rx_channel during hw reconfigure Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 039/121] ath9k: Fix LED polarity for some Mini PCI AR9220 MB92 cards. Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 005/121] MIPS: Dont unwind to user mode with EVA Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 053/121] aacraid: Fix for aac_command_thread hang Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 058/121] mfd: intel-lpss: Save register context on suspend Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 044/121] ath5k: Change led pin configuration for compaq c700 laptop Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 032/121] ARM: sun4i: dt: Enable dram gate 5 (tve0 clock) for simplefb TV output Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 029/121] Input: uinput - handle compat ioctl for UI_SET_PHYS Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 012/121] MIPS: Loongson-3: Fix build error after ld-version.sh modification Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:20 +0200
    [PATCH 4.6 015/121] MIPS: Loongson-3: Reserve 32MB for RS780E integrated GPU Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 121/121] IB/hfi1: Fix hard lockup due to not using save/restore spin lock Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 002/121] MIPS64: R6: R2 emulation bugfix Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 018/121] MIPS: Force CPUs to lose FP context during mode switches Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 020/121] MIPS: Disable preemption during prctl(PR_SET_FP_MODE, ...) Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 022/121] MIPS: ptrace: Prevent writes to read-only FCSR bits Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 017/121] MIPS: Fix MSA ld_*/st_* asm macros to use PTR_ADDU Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 019/121] MIPS: Prevent "restoration" of MSA context in non-MSA kernels Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 013/121] MIPS: ath79: make bootconsole wait for both THRE and TEMT Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 016/121] MIPS: Use copy_s.fmt rather than copy_u.fmt Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    [PATCH 4.6 021/121] MIPS: ptrace: Fix FP context restoration FCSR regression Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 00:30 +0200
    Re: [PATCH 4.6 000/121] 4.6.2-stable review Guenter Roeck <linux@roeck-us.net> - 2016-06-06 18:20 +0200
      Re: [PATCH 4.6 000/121] 4.6.2-stable review Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-06 18:40 +0200
      Re: [PATCH 4.6 000/121] 4.6.2-stable review Guenter Roeck <linux@roeck-us.net> - 2016-06-07 22:10 +0200
    Re: [PATCH 4.6 000/121] 4.6.2-stable review Shuah Khan <shuahkh@osg.samsung.com> - 2016-06-06 19:30 +0200
    Re: [PATCH 4.6 000/121] 4.6.2-stable review Javier Martinez Canillas <javier@osg.samsung.com> - 2016-06-07 00:50 +0200
      Re: [PATCH 4.6 000/121] 4.6.2-stable review Mark Brown <broonie@kernel.org> - 2016-06-07 01:40 +0200
      Re: [PATCH 4.6 000/121] 4.6.2-stable review Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-07 01:40 +0200
        Re: [PATCH 4.6 000/121] 4.6.2-stable review Mark Brown <broonie@kernel.org> - 2016-06-07 01:50 +0200
        Re: [PATCH 4.6 000/121] 4.6.2-stable review Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-08 03:00 +0200
    Re: [PATCH 4.6 000/121] 4.6.2-stable review Tyler Baker <tyler.baker@linaro.org> - 2016-06-07 00:50 +0200
    Re: [PATCH 4.6 000/121] 4.6.2-stable review Guenter Roeck <linux@roeck-us.net> - 2016-06-07 15:50 +0200
      Re: [PATCH 4.6 000/121] 4.6.2-stable review Greg Kroah-Hartman <gregkh@linuxfoundation.org> - 2016-06-08 03:10 +0200
        Re: [PATCH 4.6 000/121] 4.6.2-stable review Guenter Roeck <linux@roeck-us.net> - 2016-06-08 05:20 +0200

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#1414369 — [PATCH 4.6 012/121] MIPS: Loongson-3: Fix build error after ld-version.sh modification

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Huacai Chen <chenhc@lemote.com>

commit 820880cdba0137baff6cc0e828c3c418c363ae44 upstream.

Commit d5ece1cb074b2c ("Fix ld-version.sh to handle large 3rd version
part") modifies the ld version description. This causes a build error
on Loongson-3, so fix it.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Steven J . Hill <sjhill@realitydiluted.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12890/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/loongson64/Platform |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/mips/loongson64/Platform
+++ b/arch/mips/loongson64/Platform
@@ -31,7 +31,7 @@ cflags-$(CONFIG_CPU_LOONGSON3)	+= -Wa,--
 # can't easily be used safely within the kbuild framework.
 #
 ifeq ($(call cc-ifversion, -ge, 0409, y), y)
-  ifeq ($(call ld-ifversion, -ge, 22500000, y), y)
+  ifeq ($(call ld-ifversion, -ge, 225000000, y), y)
     cflags-$(CONFIG_CPU_LOONGSON3)  += \
       $(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64)
   else

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#1414370 — [PATCH 4.6 015/121] MIPS: Loongson-3: Reserve 32MB for RS780E integrated GPU

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Huacai Chen <chenhc@lemote.com>

commit 3484de7bcbed20ecbf2b8d80671619e7059e2dd7 upstream.

Due to datasheet, reserving 0xff800000~0xffffffff (8MB below 4GB) is
not enough for RS780E integrated GPU's TOM (top of memory) registers
and MSI/MSI-x memory region, so we reserve 0xfe000000~0xffffffff (32MB
below 4GB).

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Steven J . Hill <sjhill@realitydiluted.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12889/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/loongson64/loongson-3/numa.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

--- a/arch/mips/loongson64/loongson-3/numa.c
+++ b/arch/mips/loongson64/loongson-3/numa.c
@@ -213,10 +213,10 @@ static void __init node_mem_init(unsigne
 		BOOTMEM_DEFAULT);
 
 	if (node == 0 && node_end_pfn(0) >= (0xffffffff >> PAGE_SHIFT)) {
-		/* Reserve 0xff800000~0xffffffff for RS780E integrated GPU */
+		/* Reserve 0xfe000000~0xffffffff for RS780E integrated GPU */
 		reserve_bootmem_node(NODE_DATA(node),
-				(node_addrspace_offset | 0xff800000),
-				8 << 20, BOOTMEM_DEFAULT);
+				(node_addrspace_offset | 0xfe000000),
+				32 << 20, BOOTMEM_DEFAULT);
 	}
 
 	sparse_memory_present_with_active_regions(node);

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#1414374 — [PATCH 4.6 121/121] IB/hfi1: Fix hard lockup due to not using save/restore spin lock

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Mike Marciniszyn <mike.marciniszyn@intel.com>

commit 7049de65c9e520886f06d6f9deceaaed5d93fb7c upstream.

Commit b9b06cb6feda
("IB/hfi1: Fix missing lock/unlock in verbs drain callback")
added a spin lock.

Unfortunately, the new lock code can be called from a base
level interrupt state, and an interrupt that can get stacked
will attempt to get the same lock.

Fix by using the flag save/restore spin lock variation.

Cc: stable@vger.kernel.org # 4.6+
Reviewed-by: Sebastian Sanchez <sebastian.sanchez@intel.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Doug Ledford <dledford@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 drivers/staging/rdma/hfi1/qp.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

--- a/drivers/staging/rdma/hfi1/qp.c
+++ b/drivers/staging/rdma/hfi1/qp.c
@@ -512,6 +512,7 @@ static void iowait_wakeup(struct iowait
 static void iowait_sdma_drained(struct iowait *wait)
 {
 	struct rvt_qp *qp = iowait_to_qp(wait);
+	unsigned long flags;
 
 	/*
 	 * This happens when the send engine notes
@@ -519,12 +520,12 @@ static void iowait_sdma_drained(struct i
 	 * do the flush work until that QP's
 	 * sdma work has finished.
 	 */
-	spin_lock(&qp->s_lock);
+	spin_lock_irqsave(&qp->s_lock, flags);
 	if (qp->s_flags & RVT_S_WAIT_DMA) {
 		qp->s_flags &= ~RVT_S_WAIT_DMA;
 		hfi1_schedule_send(qp);
 	}
-	spin_unlock(&qp->s_lock);
+	spin_unlock_irqrestore(&qp->s_lock, flags);
 }
 
 /**

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#1414381 — [PATCH 4.6 002/121] MIPS64: R6: R2 emulation bugfix

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>

commit 41fa29e4d8cf4150568a0fe9bb4d62229f9caed5 upstream.

Error recovery pointers for fixups was improperly set as ".word"
which is unsuitable for MIPS64.

Replaced by STR(PTR)

[ralf@linux-mips.org: Apply changes as requested in the review process.]

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Fixes: b0a668fb2038 ("MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6")
Cc: macro@linux-mips.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9911/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/kernel/mips-r2-to-r6-emul.c |  105 +++++++++++++++++-----------------
 1 file changed, 53 insertions(+), 52 deletions(-)

--- a/arch/mips/kernel/mips-r2-to-r6-emul.c
+++ b/arch/mips/kernel/mips-r2-to-r6-emul.c
@@ -28,6 +28,7 @@
 #include <asm/inst.h>
 #include <asm/mips-r2-to-r6-emul.h>
 #include <asm/local.h>
+#include <asm/mipsregs.h>
 #include <asm/ptrace.h>
 #include <asm/uaccess.h>
 
@@ -1251,10 +1252,10 @@ fpu_emul:
 			"	j	10b\n"
 			"	.previous\n"
 			"	.section	__ex_table,\"a\"\n"
-			"	.word	1b,8b\n"
-			"	.word	2b,8b\n"
-			"	.word	3b,8b\n"
-			"	.word	4b,8b\n"
+			STR(PTR) " 1b,8b\n"
+			STR(PTR) " 2b,8b\n"
+			STR(PTR) " 3b,8b\n"
+			STR(PTR) " 4b,8b\n"
 			"	.previous\n"
 			"	.set	pop\n"
 			: "+&r"(rt), "=&r"(rs),
@@ -1326,10 +1327,10 @@ fpu_emul:
 			"	j	10b\n"
 			"       .previous\n"
 			"	.section	__ex_table,\"a\"\n"
-			"	.word	1b,8b\n"
-			"	.word	2b,8b\n"
-			"	.word	3b,8b\n"
-			"	.word	4b,8b\n"
+			STR(PTR) " 1b,8b\n"
+			STR(PTR) " 2b,8b\n"
+			STR(PTR) " 3b,8b\n"
+			STR(PTR) " 4b,8b\n"
 			"	.previous\n"
 			"	.set	pop\n"
 			: "+&r"(rt), "=&r"(rs),
@@ -1397,10 +1398,10 @@ fpu_emul:
 			"	j	9b\n"
 			"	.previous\n"
 			"	.section        __ex_table,\"a\"\n"
-			"	.word	1b,8b\n"
-			"	.word	2b,8b\n"
-			"	.word	3b,8b\n"
-			"	.word	4b,8b\n"
+			STR(PTR) " 1b,8b\n"
+			STR(PTR) " 2b,8b\n"
+			STR(PTR) " 3b,8b\n"
+			STR(PTR) " 4b,8b\n"
 			"	.previous\n"
 			"	.set	pop\n"
 			: "+&r"(rt), "=&r"(rs),
@@ -1467,10 +1468,10 @@ fpu_emul:
 			"	j	9b\n"
 			"	.previous\n"
 			"	.section        __ex_table,\"a\"\n"
-			"	.word	1b,8b\n"
-			"	.word	2b,8b\n"
-			"	.word	3b,8b\n"
-			"	.word	4b,8b\n"
+			STR(PTR) " 1b,8b\n"
+			STR(PTR) " 2b,8b\n"
+			STR(PTR) " 3b,8b\n"
+			STR(PTR) " 4b,8b\n"
 			"	.previous\n"
 			"	.set	pop\n"
 			: "+&r"(rt), "=&r"(rs),
@@ -1582,14 +1583,14 @@ fpu_emul:
 			"	j	9b\n"
 			"	.previous\n"
 			"	.section        __ex_table,\"a\"\n"
-			"	.word	1b,8b\n"
-			"	.word	2b,8b\n"
-			"	.word	3b,8b\n"
-			"	.word	4b,8b\n"
-			"	.word	5b,8b\n"
-			"	.word	6b,8b\n"
-			"	.word	7b,8b\n"
-			"	.word	0b,8b\n"
+			STR(PTR) " 1b,8b\n"
+			STR(PTR) " 2b,8b\n"
+			STR(PTR) " 3b,8b\n"
+			STR(PTR) " 4b,8b\n"
+			STR(PTR) " 5b,8b\n"
+			STR(PTR) " 6b,8b\n"
+			STR(PTR) " 7b,8b\n"
+			STR(PTR) " 0b,8b\n"
 			"	.previous\n"
 			"	.set	pop\n"
 			: "+&r"(rt), "=&r"(rs),
@@ -1701,14 +1702,14 @@ fpu_emul:
 			"	j      9b\n"
 			"	.previous\n"
 			"	.section        __ex_table,\"a\"\n"
-			"	.word  1b,8b\n"
-			"	.word  2b,8b\n"
-			"	.word  3b,8b\n"
-			"	.word  4b,8b\n"
-			"	.word  5b,8b\n"
-			"	.word  6b,8b\n"
-			"	.word  7b,8b\n"
-			"	.word  0b,8b\n"
+			STR(PTR) " 1b,8b\n"
+			STR(PTR) " 2b,8b\n"
+			STR(PTR) " 3b,8b\n"
+			STR(PTR) " 4b,8b\n"
+			STR(PTR) " 5b,8b\n"
+			STR(PTR) " 6b,8b\n"
+			STR(PTR) " 7b,8b\n"
+			STR(PTR) " 0b,8b\n"
 			"	.previous\n"
 			"	.set    pop\n"
 			: "+&r"(rt), "=&r"(rs),
@@ -1820,14 +1821,14 @@ fpu_emul:
 			"	j	9b\n"
 			"	.previous\n"
 			"	.section        __ex_table,\"a\"\n"
-			"	.word	1b,8b\n"
-			"	.word	2b,8b\n"
-			"	.word	3b,8b\n"
-			"	.word	4b,8b\n"
-			"	.word	5b,8b\n"
-			"	.word	6b,8b\n"
-			"	.word	7b,8b\n"
-			"	.word	0b,8b\n"
+			STR(PTR) " 1b,8b\n"
+			STR(PTR) " 2b,8b\n"
+			STR(PTR) " 3b,8b\n"
+			STR(PTR) " 4b,8b\n"
+			STR(PTR) " 5b,8b\n"
+			STR(PTR) " 6b,8b\n"
+			STR(PTR) " 7b,8b\n"
+			STR(PTR) " 0b,8b\n"
 			"	.previous\n"
 			"	.set	pop\n"
 			: "+&r"(rt), "=&r"(rs),
@@ -1938,14 +1939,14 @@ fpu_emul:
 			"       j	9b\n"
 			"       .previous\n"
 			"       .section        __ex_table,\"a\"\n"
-			"       .word	1b,8b\n"
-			"       .word	2b,8b\n"
-			"       .word	3b,8b\n"
-			"       .word	4b,8b\n"
-			"       .word	5b,8b\n"
-			"       .word	6b,8b\n"
-			"       .word	7b,8b\n"
-			"       .word	0b,8b\n"
+			STR(PTR) " 1b,8b\n"
+			STR(PTR) " 2b,8b\n"
+			STR(PTR) " 3b,8b\n"
+			STR(PTR) " 4b,8b\n"
+			STR(PTR) " 5b,8b\n"
+			STR(PTR) " 6b,8b\n"
+			STR(PTR) " 7b,8b\n"
+			STR(PTR) " 0b,8b\n"
 			"       .previous\n"
 			"       .set	pop\n"
 			: "+&r"(rt), "=&r"(rs),
@@ -2000,7 +2001,7 @@ fpu_emul:
 			"j	2b\n"
 			".previous\n"
 			".section        __ex_table,\"a\"\n"
-			".word  1b, 3b\n"
+			STR(PTR) " 1b,3b\n"
 			".previous\n"
 			: "=&r"(res), "+&r"(err)
 			: "r"(vaddr), "i"(SIGSEGV)
@@ -2058,7 +2059,7 @@ fpu_emul:
 			"j	2b\n"
 			".previous\n"
 			".section        __ex_table,\"a\"\n"
-			".word	1b, 3b\n"
+			STR(PTR) " 1b,3b\n"
 			".previous\n"
 			: "+&r"(res), "+&r"(err)
 			: "r"(vaddr), "i"(SIGSEGV));
@@ -2119,7 +2120,7 @@ fpu_emul:
 			"j	2b\n"
 			".previous\n"
 			".section        __ex_table,\"a\"\n"
-			".word  1b, 3b\n"
+			STR(PTR) " 1b,3b\n"
 			".previous\n"
 			: "=&r"(res), "+&r"(err)
 			: "r"(vaddr), "i"(SIGSEGV)
@@ -2182,7 +2183,7 @@ fpu_emul:
 			"j	2b\n"
 			".previous\n"
 			".section        __ex_table,\"a\"\n"
-			".word	1b, 3b\n"
+			STR(PTR) " 1b,3b\n"
 			".previous\n"
 			: "+&r"(res), "+&r"(err)
 			: "r"(vaddr), "i"(SIGSEGV));

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#1414385 — [PATCH 4.6 018/121] MIPS: Force CPUs to lose FP context during mode switches

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Paul Burton <paul.burton@imgtec.com>

commit 6b8322576e9d325b65c54fbef64e4e8690ad70ce upstream.

Commit 9791554b45a2 ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options
for MIPS") added support for the PR_SET_FP_MODE prctl, which allows a
userland program to modify its FP mode at runtime. This is most notably
required if dynamic linking leads to the FP mode requirement changing at
runtime from that indicated in the initial executable's ELF header. In
order to avoid overhead in the general FP context restore code, it aimed
to have threads in the process become unable to enable the FPU during a
mode switch & have the thread calling the prctl syscall wait for all
other threads in the process to be context switched at least once. Once
that happens we can know that no thread in the process whose mode will
be switched has live FP context, and it's safe to perform the mode
switch. However in the (rare) case of modeswitches occurring in
multithreaded programs this can lead to indeterminate delays for the
thread invoking the prctl syscall, and the code monitoring for those
context switches was woefully inadequate for all but the simplest cases.

Fix this by broadcasting an IPI if other CPUs may have live FP context
for an affected thread, with a handler causing those CPUs to relinquish
their FPU ownership. Threads will then be allowed to continue running
but will stall on the wait_on_atomic_t in enable_restore_fp_context if
they attempt to use FP again whilst the mode switch is still in
progress. The end result is less fragile poking at scheduler context
switch counts & a more expedient completion of the mode switch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 9791554b45a2 ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS")
Reviewed-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13145/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/kernel/process.c |   40 +++++++++++++++++-----------------------
 1 file changed, 17 insertions(+), 23 deletions(-)

--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -580,11 +580,19 @@ int mips_get_process_fp_mode(struct task
 	return value;
 }
 
+static void prepare_for_fp_mode_switch(void *info)
+{
+	struct mm_struct *mm = info;
+
+	if (current->mm == mm)
+		lose_fpu(1);
+}
+
 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
 {
 	const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
-	unsigned long switch_count;
 	struct task_struct *t;
+	int max_users;
 
 	/* Check the value is valid */
 	if (value & ~known_bits)
@@ -610,31 +618,17 @@ int mips_set_process_fp_mode(struct task
 	smp_mb__after_atomic();
 
 	/*
-	 * If there are multiple online CPUs then wait until all threads whose
-	 * FP mode is about to change have been context switched. This approach
-	 * allows us to only worry about whether an FP mode switch is in
-	 * progress when FP is first used in a tasks time slice. Pretty much all
-	 * of the mode switch overhead can thus be confined to cases where mode
-	 * switches are actually occurring. That is, to here. However for the
-	 * thread performing the mode switch it may take a while...
+	 * If there are multiple online CPUs then force any which are running
+	 * threads in this process to lose their FPU context, which they can't
+	 * regain until fp_mode_switching is cleared later.
 	 */
 	if (num_online_cpus() > 1) {
-		spin_lock_irq(&task->sighand->siglock);
-
-		for_each_thread(task, t) {
-			if (t == current)
-				continue;
-
-			switch_count = t->nvcsw + t->nivcsw;
-
-			do {
-				spin_unlock_irq(&task->sighand->siglock);
-				cond_resched();
-				spin_lock_irq(&task->sighand->siglock);
-			} while ((t->nvcsw + t->nivcsw) == switch_count);
-		}
+		/* No need to send an IPI for the local CPU */
+		max_users = (task->mm == current->mm) ? 1 : 0;
 
-		spin_unlock_irq(&task->sighand->siglock);
+		if (atomic_read(&current->mm->mm_users) > max_users)
+			smp_call_function(prepare_for_fp_mode_switch,
+					  (void *)current->mm, 1);
 	}
 
 	/*

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#1414394 — [PATCH 4.6 020/121] MIPS: Disable preemption during prctl(PR_SET_FP_MODE, ...)

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Paul Burton <paul.burton@imgtec.com>

commit bd239f1e1429e7781096bf3884bdb1b2b1bb4f28 upstream.

Whilst a PR_SET_FP_MODE prctl is performed there are decisions made
based upon whether the task is executing on the current CPU. This may
change if we're preempted, so disable preemption to avoid such changes
for the lifetime of the mode switch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 9791554b45a2 ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS")
Reviewed-by: Maciej W. Rozycki <macro@imgtec.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13144/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/kernel/process.c |    4 ++++
 1 file changed, 4 insertions(+)

--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -609,6 +609,9 @@ int mips_set_process_fp_mode(struct task
 	if (!(value & PR_FP_MODE_FR) && cpu_has_fpu && cpu_has_mips_r6)
 		return -EOPNOTSUPP;
 
+	/* Proceed with the mode switch */
+	preempt_disable();
+
 	/* Save FP & vector context, then disable FPU & MSA */
 	if (task->signal == current->signal)
 		lose_fpu(1);
@@ -653,6 +656,7 @@ int mips_set_process_fp_mode(struct task
 
 	/* Allow threads to use FP again */
 	atomic_set(&task->mm->context.fp_mode_switching, 0);
+	preempt_enable();
 
 	return 0;
 }

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#1414396 — [PATCH 4.6 022/121] MIPS: ptrace: Prevent writes to read-only FCSR bits

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Maciej W. Rozycki <macro@imgtec.com>

commit abf378be49f38c4d3e23581d3df3fa9f1b1b11d2 upstream.

Correct the cases missed with commit 9b26616c8d9d ("MIPS: Respect the
ISA level in FCSR handling") and prevent writes to read-only FCSR bits
there.

This in particular applies to FP context initialisation where any IEEE
754-2008 bits preset by `mips_set_personality_nan' are cleared before
the relevant ptrace(2) call takes effect and the PTRACE_POKEUSR request
addressing FPC_CSR where no masking of read-only FCSR bits is done.

Remove the FCSR clearing from FP context initialisation then and unify
PTRACE_POKEUSR/FPC_CSR and PTRACE_SETFPREGS handling, by factoring out
code from `ptrace_setfpregs' and calling it from both places.

This mostly matters to soft float configurations where the emulator can
be switched this way to a mode which should not be accessible and cannot
be set with the CTC1 instruction.  With hard float configurations any
effect is transient anyway as read-only bits will retain their values at
the time the FP context is restored.

Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13239/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/kernel/ptrace.c |   28 +++++++++++++++++++---------
 1 file changed, 19 insertions(+), 9 deletions(-)

--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -57,8 +57,7 @@ static void init_fp_ctx(struct task_stru
 	/* Begin with data registers set to all 1s... */
 	memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr));
 
-	/* ...and FCSR zeroed */
-	target->thread.fpu.fcr31 = 0;
+	/* FCSR has been preset by `mips_set_personality_nan'.  */
 
 	/*
 	 * Record that the target has "used" math, such that the context
@@ -80,6 +79,22 @@ void ptrace_disable(struct task_struct *
 }
 
 /*
+ * Poke at FCSR according to its mask.  Don't set the cause bits as
+ * this is currently not handled correctly in FP context restoration
+ * and will cause an oops if a corresponding enable bit is set.
+ */
+static void ptrace_setfcr31(struct task_struct *child, u32 value)
+{
+	u32 fcr31;
+	u32 mask;
+
+	value &= ~FPU_CSR_ALL_X;
+	fcr31 = child->thread.fpu.fcr31;
+	mask = boot_cpu_data.fpu_msk31;
+	child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
+}
+
+/*
  * Read a general register set.	 We always use the 64-bit format, even
  * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
  * Registers are sign extended to fill the available space.
@@ -159,9 +174,7 @@ int ptrace_setfpregs(struct task_struct
 {
 	union fpureg *fregs;
 	u64 fpr_val;
-	u32 fcr31;
 	u32 value;
-	u32 mask;
 	int i;
 
 	if (!access_ok(VERIFY_READ, data, 33 * 8))
@@ -176,10 +189,7 @@ int ptrace_setfpregs(struct task_struct
 	}
 
 	__get_user(value, data + 64);
-	value &= ~FPU_CSR_ALL_X;
-	fcr31 = child->thread.fpu.fcr31;
-	mask = boot_cpu_data.fpu_msk31;
-	child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
+	ptrace_setfcr31(child, value);
 
 	/* FIR may not be written.  */
 
@@ -806,7 +816,7 @@ long arch_ptrace(struct task_struct *chi
 			break;
 #endif
 		case FPC_CSR:
-			child->thread.fpu.fcr31 = data & ~FPU_CSR_ALL_X;
+			ptrace_setfcr31(child, data);
 			break;
 		case DSP_BASE ... DSP_BASE + 5: {
 			dspreg_t *dregs;

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#1414397 — [PATCH 4.6 017/121] MIPS: Fix MSA ld_*/st_* asm macros to use PTR_ADDU

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: James Hogan <james.hogan@imgtec.com>

commit ea1688573426adc2587ed52d086b51c7c62eaca3 upstream.

The MSA ld_*/st_* assembler macros for when the toolchain doesn't
support MSA use addu to offset the base address. However it is a virtual
memory pointer so fix it to use PTR_ADDU which expands to daddu for
64-bit kernels.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13062/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/include/asm/asmmacro.h |   16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -393,7 +393,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	LDB_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -402,7 +402,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	LDH_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -411,7 +411,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	LDW_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -420,7 +420,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	LDD_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -429,7 +429,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	STB_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -438,7 +438,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	STH_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -447,7 +447,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	STW_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm
@@ -456,7 +456,7 @@
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
-	addu	$1, \base, \off
+	PTR_ADDU $1, \base, \off
 	.word	STD_MSA_INSN | (\wd << 6)
 	.set	pop
 	.endm

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#1414399 — [PATCH 4.6 019/121] MIPS: Prevent "restoration" of MSA context in non-MSA kernels

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Paul Burton <paul.burton@imgtec.com>

commit 6533af4d4831c421cd9aa4dce7cfc19a3514cc09 upstream.

If a kernel doesn't support MSA context (ie. CONFIG_CPU_HAS_MSA=n) then
it will only keep 64 bits per FP register in thread context, and the
calls to set_fpr64 in restore_msa_extcontext will overrun the end of the
FP register context into the FCSR & MSACSR values. GCC 6.x has become
smart enough to detect this & complain like so:

    arch/mips/kernel/signal.c: In function 'protected_restore_fp_context':
    ./arch/mips/include/asm/processor.h:114:17: error: array subscript is above array bounds [-Werror=array-bounds]
      fpr->val##width[FPR_IDX(width, idx)] = val;   \
      ~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~
    ./arch/mips/include/asm/processor.h:118:1: note: in expansion of macro 'BUILD_FPR_ACCESS'
     BUILD_FPR_ACCESS(64)

The only way to trigger this code to run would be for a program to set
up an artificial extended MSA context structure following a sigframe &
execute sigreturn. Whilst this doesn't allow a program to write to any
state that it couldn't already, it makes little sense to allow this
"restoration" of MSA context in a system that doesn't support MSA.

Fix this by killing a program with SIGSYS if it tries something as crazy
as "restoring" fake MSA context in this way, also fixing the build error
& allowing for most of restore_msa_extcontext to be optimised out of
kernels without support for MSA.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reported-by: Michal Toman <michal.toman@imgtec.com>
Fixes: bf82cb30c7e5 ("MIPS: Save MSA extended context around signals")
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Michal Toman <michal.toman@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13164/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/kernel/signal.c |    7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -195,6 +195,9 @@ static int restore_msa_extcontext(void _
 	unsigned int csr;
 	int i, err;
 
+	if (!config_enabled(CONFIG_CPU_HAS_MSA))
+		return SIGSYS;
+
 	if (size != sizeof(*msa))
 		return -EINVAL;
 
@@ -398,8 +401,8 @@ int protected_restore_fp_context(void __
 	}
 
 fp_done:
-	if (used & USED_EXTCONTEXT)
-		err |= restore_extcontext(sc_to_extcontext(sc));
+	if (!err && (used & USED_EXTCONTEXT))
+		err = restore_extcontext(sc_to_extcontext(sc));
 
 	return err ?: sig;
 }

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#1414400 — [PATCH 4.6 013/121] MIPS: ath79: make bootconsole wait for both THRE and TEMT

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Matthias Schiffer <mschiffer@universe-factory.net>

commit f5b556c94c8490d42fea79d7b4ae0ecbc291e69d upstream.

This makes the ath79 bootconsole behave the same way as the generic 8250
bootconsole.

Also waiting for TEMT (transmit buffer is empty) instead of just THRE
(transmit buffer is not full) ensures that all characters have been
transmitted before the real serial driver starts reconfiguring the serial
controller (which would sometimes result in garbage being transmitted.)
This change does not cause a visible performance loss.

In addition, this seems to fix a hang observed in certain configurations on
many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver.

A more complete follow-up patch will disable 8250 autoconfig for ath79
altogether (the serial controller is detected as a 16550A, which is not
fully compatible with the ath79 serial, and the autoconfig may lead to
undefined behavior on ath79.)

Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/ath79/early_printk.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

--- a/arch/mips/ath79/early_printk.c
+++ b/arch/mips/ath79/early_printk.c
@@ -31,13 +31,15 @@ static inline void prom_putchar_wait(voi
 	} while (1);
 }
 
+#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
+
 static void prom_putchar_ar71xx(unsigned char ch)
 {
 	void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
 
-	prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
+	prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
 	__raw_writel(ch, base + UART_TX * 4);
-	prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
+	prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
 }
 
 static void prom_putchar_ar933x(unsigned char ch)

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#1414402 — [PATCH 4.6 016/121] MIPS: Use copy_s.fmt rather than copy_u.fmt

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Paul Burton <paul.burton@imgtec.com>

commit 8a3c8b48aca8771bff3536e40aa26ffb311699d1 upstream.

In revision 1.12 of the MSA specification, the copy_u.w instruction has
been removed for MIPS32 & the copy_u.d instruction has been removed for
MIPS64. Newer toolchains (eg. Codescape SDK essentials 2015.10) will
complain about this like so:

arch/mips/kernel/r4k_fpu.S:290: Error: opcode not supported on this
processor: mips32r2 (mips32r2) `copy_u.w $1,$w26[3]'

Since we always copy to the width of a GPR, simply use copy_s instead of
copy_u to fix this.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13061/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/include/asm/asmmacro.h |   24 ++++++++++++------------
 arch/mips/kernel/r4k_fpu.S       |   10 +++++-----
 2 files changed, 17 insertions(+), 17 deletions(-)

--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -298,21 +298,21 @@
 	.set	pop
 	.endm
 
-	.macro	copy_u_w	ws, n
+	.macro	copy_s_w	ws, n
 	.set	push
 	.set	mips32r2
 	.set	fp=64
 	.set	msa
-	copy_u.w $1, $w\ws[\n]
+	copy_s.w $1, $w\ws[\n]
 	.set	pop
 	.endm
 
-	.macro	copy_u_d	ws, n
+	.macro	copy_s_d	ws, n
 	.set	push
 	.set	mips64r2
 	.set	fp=64
 	.set	msa
-	copy_u.d $1, $w\ws[\n]
+	copy_s.d $1, $w\ws[\n]
 	.set	pop
 	.endm
 
@@ -346,8 +346,8 @@
 #define STH_MSA_INSN		0x5800081f
 #define STW_MSA_INSN		0x5800082f
 #define STD_MSA_INSN		0x5800083f
-#define COPY_UW_MSA_INSN	0x58f00056
-#define COPY_UD_MSA_INSN	0x58f80056
+#define COPY_SW_MSA_INSN	0x58b00056
+#define COPY_SD_MSA_INSN	0x58b80056
 #define INSERT_W_MSA_INSN	0x59300816
 #define INSERT_D_MSA_INSN	0x59380816
 #else
@@ -361,8 +361,8 @@
 #define STH_MSA_INSN		0x78000825
 #define STW_MSA_INSN		0x78000826
 #define STD_MSA_INSN		0x78000827
-#define COPY_UW_MSA_INSN	0x78f00059
-#define COPY_UD_MSA_INSN	0x78f80059
+#define COPY_SW_MSA_INSN	0x78b00059
+#define COPY_SD_MSA_INSN	0x78b80059
 #define INSERT_W_MSA_INSN	0x79300819
 #define INSERT_D_MSA_INSN	0x79380819
 #endif
@@ -461,21 +461,21 @@
 	.set	pop
 	.endm
 
-	.macro	copy_u_w	ws, n
+	.macro	copy_s_w	ws, n
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
 	.insn
-	.word	COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
+	.word	COPY_SW_MSA_INSN | (\n << 16) | (\ws << 11)
 	.set	pop
 	.endm
 
-	.macro	copy_u_d	ws, n
+	.macro	copy_s_d	ws, n
 	.set	push
 	.set	noat
 	SET_HARDFLOAT
 	.insn
-	.word	COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
+	.word	COPY_SD_MSA_INSN | (\n << 16) | (\ws << 11)
 	.set	pop
 	.endm
 
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -244,17 +244,17 @@ LEAF(\name)
 	.set	push
 	.set	noat
 #ifdef CONFIG_64BIT
-	copy_u_d \wr, 1
+	copy_s_d \wr, 1
 	EX sd	$1, \off(\base)
 #elif defined(CONFIG_CPU_LITTLE_ENDIAN)
-	copy_u_w \wr, 2
+	copy_s_w \wr, 2
 	EX sw	$1, \off(\base)
-	copy_u_w \wr, 3
+	copy_s_w \wr, 3
 	EX sw	$1, (\off+4)(\base)
 #else /* CONFIG_CPU_BIG_ENDIAN */
-	copy_u_w \wr, 2
+	copy_s_w \wr, 2
 	EX sw	$1, (\off+4)(\base)
-	copy_u_w \wr, 3
+	copy_s_w \wr, 3
 	EX sw	$1, \off(\base)
 #endif
 	.set	pop

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#1414404 — [PATCH 4.6 021/121] MIPS: ptrace: Fix FP context restoration FCSR regression

4.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Maciej W. Rozycki <macro@imgtec.com>

commit 4249548454f7ba4581aeee26bd83f42b48a14d15 upstream.

Fix a floating-point context restoration regression introduced with
commit 9b26616c8d9d ("MIPS: Respect the ISA level in FCSR handling")
that causes a Floating Point exception and consequently a kernel oops
with hard float configurations when one or more FCSR Enable and their
corresponding Cause bits are set both at a time via a ptrace(2) call.

To do so reinstate Cause bit masking originally introduced with commit
b1442d39fac2 ("MIPS: Prevent user from setting FCSR cause bits") to
address this exact problem and then inadvertently removed from the
PTRACE_SETFPREGS request with the commit referred above.

Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13238/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/kernel/ptrace.c |    1 +
 1 file changed, 1 insertion(+)

--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -176,6 +176,7 @@ int ptrace_setfpregs(struct task_struct
 	}
 
 	__get_user(value, data + 64);
+	value &= ~FPU_CSR_ALL_X;
 	fcr31 = child->thread.fpu.fcr31;
 	mask = boot_cpu_data.fpu_msk31;
 	child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);

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#1415260

On Mon, Jun 06, 2016 at 06:55:04AM -0700, Kevin Hilman wrote:
> kernelci.org bot <bot@kernelci.org> writes:
> 
> > stable-queue boot: 73 boots: 3 failed, 68 passed with 2 offline (v4.6.1-121-g2276ff7d4bf9)
> >
> > Full Boot Summary: https://kernelci.org/boot/all/job/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
> > Full Build Summary: https://kernelci.org/build/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
> >
> > Tree: stable-queue
> > Branch: local/linux-4.6.y.queue
> > Git Describe: v4.6.1-121-g2276ff7d4bf9
> > Git Commit: 2276ff7d4bf9c438832f761ffd525cacf55362cd
> > Git URL: git://server.roeck-us.net/git/linux-stable.git
> > Tested: 28 unique boards, 9 SoC families, 16 builds out of 100
> >
> > Boot Failures Detected: https://kernelci.org/boot/?v4.6.1-121-g2276ff7d4bf9&fail
> >
> > arm64:
> >
> >     defconfig:
> >         apq8016-sbc: 1 failed lab
> >
> >     defconfig+CONFIG_RANDOMIZE_BASE=y:
> >         apq8016-sbc: 1 failed lab
> 
> Theses two are real boot regressions, bisections forthcoming.
> 
This, plus several arm builds, plus all MIPS builds are failing.
I am out of town, bisecting tonight.

Guenter

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#1415276

On Mon, Jun 06, 2016 at 09:18:53AM -0700, Guenter Roeck wrote:
> On Mon, Jun 06, 2016 at 06:55:04AM -0700, Kevin Hilman wrote:
> > kernelci.org bot <bot@kernelci.org> writes:
> > 
> > > stable-queue boot: 73 boots: 3 failed, 68 passed with 2 offline (v4.6.1-121-g2276ff7d4bf9)
> > >
> > > Full Boot Summary: https://kernelci.org/boot/all/job/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
> > > Full Build Summary: https://kernelci.org/build/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
> > >
> > > Tree: stable-queue
> > > Branch: local/linux-4.6.y.queue
> > > Git Describe: v4.6.1-121-g2276ff7d4bf9
> > > Git Commit: 2276ff7d4bf9c438832f761ffd525cacf55362cd
> > > Git URL: git://server.roeck-us.net/git/linux-stable.git
> > > Tested: 28 unique boards, 9 SoC families, 16 builds out of 100
> > >
> > > Boot Failures Detected: https://kernelci.org/boot/?v4.6.1-121-g2276ff7d4bf9&fail
> > >
> > > arm64:
> > >
> > >     defconfig:
> > >         apq8016-sbc: 1 failed lab
> > >
> > >     defconfig+CONFIG_RANDOMIZE_BASE=y:
> > >         apq8016-sbc: 1 failed lab
> > 
> > Theses two are real boot regressions, bisections forthcoming.
> > 
> This, plus several arm builds, plus all MIPS builds are failing.
> I am out of town, bisecting tonight.

There were a TON of MIPS changes in this release, it's as if those
maintainers went on a bug-fixing spree.  I wouldn't be surprised if any
of them broke things given my lack of ability to test them :(

thanks,

greg k-h

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#1416559

On Mon, Jun 06, 2016 at 09:18:53AM -0700, Guenter Roeck wrote:
> On Mon, Jun 06, 2016 at 06:55:04AM -0700, Kevin Hilman wrote:
> > kernelci.org bot <bot@kernelci.org> writes:
> > 
> > > stable-queue boot: 73 boots: 3 failed, 68 passed with 2 offline (v4.6.1-121-g2276ff7d4bf9)
> > >
> > > Full Boot Summary: https://kernelci.org/boot/all/job/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
> > > Full Build Summary: https://kernelci.org/build/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
> > >
> > > Tree: stable-queue
> > > Branch: local/linux-4.6.y.queue
> > > Git Describe: v4.6.1-121-g2276ff7d4bf9
> > > Git Commit: 2276ff7d4bf9c438832f761ffd525cacf55362cd
> > > Git URL: git://server.roeck-us.net/git/linux-stable.git
> > > Tested: 28 unique boards, 9 SoC families, 16 builds out of 100
> > >
> > > Boot Failures Detected: https://kernelci.org/boot/?v4.6.1-121-g2276ff7d4bf9&fail
> > >
> > > arm64:
> > >
> > >     defconfig:
> > >         apq8016-sbc: 1 failed lab
> > >
> > >     defconfig+CONFIG_RANDOMIZE_BASE=y:
> > >         apq8016-sbc: 1 failed lab
> > 
> > Theses two are real boot regressions, bisections forthcoming.
> > 
> This, plus several arm builds, plus all MIPS builds are failing.
> I am out of town, bisecting tonight.
> 
Followup: Reverting both 'MIPS: Sync icache & dcache in set_pte_at' and 'MIPS:
Handle highmem pages in __update_cache' fixes the mips build problem for me.
Tested in 4.4 and 4.6. I also ran a qemu test with 4.6 after reverting those
patches, which passed.

Guenter

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#1415312

On 06/05/2016 03:42 PM, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.6.2 release.
> There are 121 patches in this series, all will be posted as a response
> to this one.  If anyone has any issues with these being applied, please
> let me know.
> 
> Responses should be made by Tue Jun  7 21:43:16 UTC 2016.
> Anything received after that time might be too late.
> 
> The whole patch series can be found in one patch at:
> 	kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.6.2-rc1.gz
> and the diffstat can be found below.
> 
> thanks,
> 
> greg k-h
> 

Compiled and booted on my test system. No dmesg regressions.

thanks,
-- Shuah

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#1415528

Hello,

On 06/06/2016 06:32 PM, Tyler Baker wrote:
> On 6 June 2016 at 06:55, Kevin Hilman <khilman@baylibre.com> wrote:
>> kernelci.org bot <bot@kernelci.org> writes:
>>
>>> stable-queue boot: 73 boots: 3 failed, 68 passed with 2 offline (v4.6.1-121-g2276ff7d4bf9)
>>>
>>> Full Boot Summary: https://kernelci.org/boot/all/job/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
>>> Full Build Summary: https://kernelci.org/build/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
>>>
>>> Tree: stable-queue
>>> Branch: local/linux-4.6.y.queue
>>> Git Describe: v4.6.1-121-g2276ff7d4bf9
>>> Git Commit: 2276ff7d4bf9c438832f761ffd525cacf55362cd
>>> Git URL: git://server.roeck-us.net/git/linux-stable.git
>>> Tested: 28 unique boards, 9 SoC families, 16 builds out of 100
>>>
>>> Boot Failures Detected: https://kernelci.org/boot/?v4.6.1-121-g2276ff7d4bf9&fail
>>>
>>> arm64:
>>>
>>>     defconfig:
>>>         apq8016-sbc: 1 failed lab
>>>
>>>     defconfig+CONFIG_RANDOMIZE_BASE=y:
>>>         apq8016-sbc: 1 failed lab
>>
>> Theses two are real boot regressions, bisections forthcoming.
> 
> I have bisected[1] these two failures down to 5e3ca2b349b1
> ("regulator: Try to resolve regulators supplies on registration") and
> confirmed that reverting this patch on top of this stable queue fixes
> the boot issue.
> 
> Adding Mark B. and Javier C. to this thread for discussion.
>

I'm not familiar with the apq8016-sbc board or Qualcomm platforms in general
but this patch is known to cause deadlocks when looking up regulators that
were not registered via OF. This was an issue on at least some Nvidia boards.

So since this patch made it to stable, commit a21513742308 ("regulator: Fix
deadlock during regulator registration") [0] should also be included.

> Cheers,
> 
> Tyler
> 
> [1] http://hastebin.com/ewudewufaz.vbs
> 

[0]: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=a21513742308

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

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#1415578

[Multipart message — attachments visible in raw view] — view raw

On Mon, Jun 06, 2016 at 06:43:47PM -0400, Javier Martinez Canillas wrote:
> On 06/06/2016 06:32 PM, Tyler Baker wrote:

> > I have bisected[1] these two failures down to 5e3ca2b349b1
> > ("regulator: Try to resolve regulators supplies on registration") and
> > confirmed that reverting this patch on top of this stable queue fixes
> > the boot issue.

> I'm not familiar with the apq8016-sbc board or Qualcomm platforms in general
> but this patch is known to cause deadlocks when looking up regulators that
> were not registered via OF. This was an issue on at least some Nvidia boards.

The Qualcomm platforms are running into trouble because the qcom_smd
driver is broken and apparently nobody checks -next works for their
boards since they only noticed after -rc1 in spite of the change having
been in -next for a good few weeks.  You need at least "regulator:
qcom_smd: add list_voltage callback" and "regulator: qcom_smd: add
regulator ops for pm8941 lnldo" from my tree which I didn't send to
Linus yet since we only got them in at the end of last week.  I think
that's probably OK for v4.6 TBH, the platform is fairly incomplete
upstream and the original patch fixes issues for other systems.

> So since this patch made it to stable, commit a21513742308 ("regulator: Fix
> deadlock during regulator registration") [0] should also be included.

Please.

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#1415580

On Mon, Jun 06, 2016 at 06:43:47PM -0400, Javier Martinez Canillas wrote:
> Hello,
> 
> On 06/06/2016 06:32 PM, Tyler Baker wrote:
> > On 6 June 2016 at 06:55, Kevin Hilman <khilman@baylibre.com> wrote:
> >> kernelci.org bot <bot@kernelci.org> writes:
> >>
> >>> stable-queue boot: 73 boots: 3 failed, 68 passed with 2 offline (v4.6.1-121-g2276ff7d4bf9)
> >>>
> >>> Full Boot Summary: https://kernelci.org/boot/all/job/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
> >>> Full Build Summary: https://kernelci.org/build/stable-queue/kernel/v4.6.1-121-g2276ff7d4bf9/
> >>>
> >>> Tree: stable-queue
> >>> Branch: local/linux-4.6.y.queue
> >>> Git Describe: v4.6.1-121-g2276ff7d4bf9
> >>> Git Commit: 2276ff7d4bf9c438832f761ffd525cacf55362cd
> >>> Git URL: git://server.roeck-us.net/git/linux-stable.git
> >>> Tested: 28 unique boards, 9 SoC families, 16 builds out of 100
> >>>
> >>> Boot Failures Detected: https://kernelci.org/boot/?v4.6.1-121-g2276ff7d4bf9&fail
> >>>
> >>> arm64:
> >>>
> >>>     defconfig:
> >>>         apq8016-sbc: 1 failed lab
> >>>
> >>>     defconfig+CONFIG_RANDOMIZE_BASE=y:
> >>>         apq8016-sbc: 1 failed lab
> >>
> >> Theses two are real boot regressions, bisections forthcoming.
> > 
> > I have bisected[1] these two failures down to 5e3ca2b349b1
> > ("regulator: Try to resolve regulators supplies on registration") and
> > confirmed that reverting this patch on top of this stable queue fixes
> > the boot issue.
> > 
> > Adding Mark B. and Javier C. to this thread for discussion.
> >
> 
> I'm not familiar with the apq8016-sbc board or Qualcomm platforms in general
> but this patch is known to cause deadlocks when looking up regulators that
> were not registered via OF. This was an issue on at least some Nvidia boards.
> 
> So since this patch made it to stable, commit a21513742308 ("regulator: Fix
> deadlock during regulator registration") [0] should also be included.

Ugh.  Why wasn't that patch also marked for stable inclusion?  This was
a problem waiting to happen that could have been totally avoided :(

I'll queue it up this evening, thanks.

greg k-h

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#1415582

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On Mon, Jun 06, 2016 at 04:33:14PM -0700, Greg Kroah-Hartman wrote:
> On Mon, Jun 06, 2016 at 06:43:47PM -0400, Javier Martinez Canillas wrote:

> > I'm not familiar with the apq8016-sbc board or Qualcomm platforms in general
> > but this patch is known to cause deadlocks when looking up regulators that
> > were not registered via OF. This was an issue on at least some Nvidia boards.

> > So since this patch made it to stable, commit a21513742308 ("regulator: Fix
> > deadlock during regulator registration") [0] should also be included.

> Ugh.  Why wasn't that patch also marked for stable inclusion?  This was
> a problem waiting to happen that could have been totally avoided :(

Mostly because I forgot that the original one was at the time I applied
it.

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