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Groups > linux.kernel > #1416312 > unrolled thread
| Started by | Andrey Smirnov <andrew.smirnov@gmail.com> |
|---|---|
| First post | 2016-06-07 17:30 +0200 |
| Last post | 2016-06-07 17:40 +0200 |
| Articles | 4 — 2 participants |
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[PATCH 1/3] i.MX: system.c: Convert goto to if statement Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-07 17:30 +0200
[PATCH 3/3] i.MX: system.c: Replace magic numbers Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-07 17:30 +0200
Re: [PATCH 3/3] i.MX: system.c: Replace magic numbers Shawn Guo <shawnguo@kernel.org> - 2016-06-11 15:50 +0200
[PATCH 2/3] i.MX: system.c: Remove redundant errat 752271 code Andrey Smirnov <andrew.smirnov@gmail.com> - 2016-06-07 17:40 +0200
| From | Andrey Smirnov <andrew.smirnov@gmail.com> |
|---|---|
| Date | 2016-06-07 17:30 +0200 |
| Subject | [PATCH 1/3] i.MX: system.c: Convert goto to if statement |
| Message-ID | <rHr74-4oQ-3@gated-at.bofh.it> |
Using goto here doesn't bring any advantages and only makes the code
flow less clear. No functional changes.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/system.c | 36 +++++++++++++++++-------------------
1 file changed, 17 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c
index 105d1ce..d9f8b0e 100644
--- a/arch/arm/mach-imx/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -106,26 +106,24 @@ void __init imx_init_l2cache(void)
goto out;
}
- if (readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)
- goto skip_if_enabled;
-
- /* Configure the L2 PREFETCH and POWER registers */
- val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL);
- val |= 0x70800000;
- /*
- * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
- * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
- * But according to ARM PL310 errata: 752271
- * ID: 752271: Double linefill feature can cause data corruption
- * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
- * Workaround: The only workaround to this erratum is to disable the
- * double linefill feature. This is the default behavior.
- */
- if (cpu_is_imx6q())
- val &= ~(1 << 30 | 1 << 23);
- writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL);
+ if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
+ /* Configure the L2 PREFETCH and POWER registers */
+ val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL);
+ val |= 0x70800000;
+ /*
+ * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
+ * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
+ * But according to ARM PL310 errata: 752271
+ * ID: 752271: Double linefill feature can cause data corruption
+ * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
+ * Workaround: The only workaround to this erratum is to disable the
+ * double linefill feature. This is the default behavior.
+ */
+ if (cpu_is_imx6q())
+ val &= ~(1 << 30 | 1 << 23);
+ writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL);
+ }
-skip_if_enabled:
iounmap(l2x0_base);
of_node_put(np);
--
2.5.5
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| From | Andrey Smirnov <andrew.smirnov@gmail.com> |
|---|---|
| Date | 2016-06-07 17:30 +0200 |
| Subject | [PATCH 3/3] i.MX: system.c: Replace magic numbers |
| Message-ID | <rHr74-4oQ-17@gated-at.bofh.it> |
| In reply to | #1416312 |
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/include/asm/hardware/cache-l2x0.h | 7 +++++++
arch/arm/mach-imx/system.c | 5 ++++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 3a5ec1c..5e27162 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -61,6 +61,13 @@
#define L2X0_LINE_TAG 0xF30
#define L2X0_DEBUG_CTRL 0xF40
#define L310_PREFETCH_CTRL 0xF60
+#define L310_DOUBLE_LINEFILL_EN BIT(30)
+#define L310_INSTRUCTION_PREFETCH_EN BIT(29)
+#define L310_DATA_PREFETCH_EN BIT(28)
+#define L310_DOUBLE_LINEFILL_ON_WRAP_READ_DIS BIT(27)
+#define L310_PREFETCH_DROP_EN BIT(24)
+#define L310_INCR_DOUBLE_LINEFILL_EN BIT(23)
+#define L310_ESCLUSIVE_SEQUENCE_EN BIT(21)
#define L310_POWER_CTRL 0xF80
#define L310_DYNAMIC_CLK_GATING_EN (1 << 1)
#define L310_STNDBY_MODE_EN (1 << 0)
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c
index b153376..bd9a96b 100644
--- a/arch/arm/mach-imx/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -109,7 +109,10 @@ void __init imx_init_l2cache(void)
if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
/* Configure the L2 PREFETCH and POWER registers */
val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL);
- val |= 0x70800000;
+ val |= L310_DOUBLE_LINEFILL_EN |
+ L310_INSTRUCTION_PREFETCH_EN |
+ L310_DATA_PREFETCH_EN |
+ L310_INCR_DOUBLE_LINEFILL_EN;
writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL);
}
--
2.5.5
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| From | Shawn Guo <shawnguo@kernel.org> |
|---|---|
| Date | 2016-06-11 15:50 +0200 |
| Subject | Re: [PATCH 3/3] i.MX: system.c: Replace magic numbers |
| Message-ID | <rIRsu-3HH-17@gated-at.bofh.it> |
| In reply to | #1416317 |
On Tue, Jun 07, 2016 at 08:29:26AM -0700, Andrey Smirnov wrote:
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
> arch/arm/include/asm/hardware/cache-l2x0.h | 7 +++++++
I need Russell's ACK on this file.
Shawn
> arch/arm/mach-imx/system.c | 5 ++++-
> 2 files changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
> index 3a5ec1c..5e27162 100644
> --- a/arch/arm/include/asm/hardware/cache-l2x0.h
> +++ b/arch/arm/include/asm/hardware/cache-l2x0.h
> @@ -61,6 +61,13 @@
> #define L2X0_LINE_TAG 0xF30
> #define L2X0_DEBUG_CTRL 0xF40
> #define L310_PREFETCH_CTRL 0xF60
> +#define L310_DOUBLE_LINEFILL_EN BIT(30)
> +#define L310_INSTRUCTION_PREFETCH_EN BIT(29)
> +#define L310_DATA_PREFETCH_EN BIT(28)
> +#define L310_DOUBLE_LINEFILL_ON_WRAP_READ_DIS BIT(27)
> +#define L310_PREFETCH_DROP_EN BIT(24)
> +#define L310_INCR_DOUBLE_LINEFILL_EN BIT(23)
> +#define L310_ESCLUSIVE_SEQUENCE_EN BIT(21)
> #define L310_POWER_CTRL 0xF80
> #define L310_DYNAMIC_CLK_GATING_EN (1 << 1)
> #define L310_STNDBY_MODE_EN (1 << 0)
> diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c
> index b153376..bd9a96b 100644
> --- a/arch/arm/mach-imx/system.c
> +++ b/arch/arm/mach-imx/system.c
> @@ -109,7 +109,10 @@ void __init imx_init_l2cache(void)
> if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
> /* Configure the L2 PREFETCH and POWER registers */
> val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL);
> - val |= 0x70800000;
> + val |= L310_DOUBLE_LINEFILL_EN |
> + L310_INSTRUCTION_PREFETCH_EN |
> + L310_DATA_PREFETCH_EN |
> + L310_INCR_DOUBLE_LINEFILL_EN;
> writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL);
> }
>
> --
> 2.5.5
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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| From | Andrey Smirnov <andrew.smirnov@gmail.com> |
|---|---|
| Date | 2016-06-07 17:40 +0200 |
| Subject | [PATCH 2/3] i.MX: system.c: Remove redundant errat 752271 code |
| Message-ID | <rHrgJ-4rU-3@gated-at.bofh.it> |
| In reply to | #1416312 |
Applying a fix for ARM errata 752271 would already be taken care by a call to a 'fixup' hook as a part of l2x0_of_init() -> __l2c_init() call chain. Moreso the code in 'fixup' function would do that based on the PL310's revsion information, whereas removde code does so based on SoC version which does not work very well on i.MX6Q+ which identifies itself as i.MX6Q as well but is not affected by 752271. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> --- arch/arm/mach-imx/system.c | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index d9f8b0e..b153376 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -110,17 +110,6 @@ void __init imx_init_l2cache(void) /* Configure the L2 PREFETCH and POWER registers */ val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); val |= 0x70800000; - /* - * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 - * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 - * But according to ARM PL310 errata: 752271 - * ID: 752271: Double linefill feature can cause data corruption - * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 - * Workaround: The only workaround to this erratum is to disable the - * double linefill feature. This is the default behavior. - */ - if (cpu_is_imx6q()) - val &= ~(1 << 30 | 1 << 23); writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); } -- 2.5.5
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