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[PATCH 0/6] clk: sti: Add support for critical clocks

Started byLee Jones <lee.jones@linaro.org>
First post2016-06-07 13:30 +0200
Last post2016-06-07 17:20 +0200
Articles 5 — 2 participants

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  [PATCH 0/6] clk: sti: Add support for critical clocks Lee Jones <lee.jones@linaro.org> - 2016-06-07 13:30 +0200
    [PATCH 2/6] clk: st: clkgen-fsyn: Detect critical clocks Lee Jones <lee.jones@linaro.org> - 2016-06-07 13:30 +0200
    [PATCH 3/6] clk: st: clkgen-pll: Detect critical clocks Lee Jones <lee.jones@linaro.org> - 2016-06-07 13:30 +0200
    [PATCH 6/6] spi: st-ssc4: Remove 'no clocking' hack Lee Jones <lee.jones@linaro.org> - 2016-06-07 13:30 +0200
      Re: [PATCH 6/6] spi: st-ssc4: Remove 'no clocking' hack Mark Brown <broonie@kernel.org> - 2016-06-07 17:20 +0200

#1416047 — [PATCH 0/6] clk: sti: Add support for critical clocks

FromLee Jones <lee.jones@linaro.org>
Date2016-06-07 13:30 +0200
Subject[PATCH 0/6] clk: sti: Add support for critical clocks
Message-ID<rHnmO-229-5@gated-at.bofh.it>
Describe the platform's critical clocks in DT, then search for them
from the framework.  This set allows us to remove the clk_ignore_unused
kernel command line flag which has been required to achieve a successful
boot to prompt until this point.

This may not be the definitive list.  There may be other clocks which
need to be marked as critical, but we can add those as we go along.

Lee Jones (6):
  clk: st: clk-flexgen: Detect critical clocks
  clk: st: clkgen-fsyn: Detect critical clocks
  clk: st: clkgen-pll: Detect critical clocks
  ARM: sti: stih407-family: Supply defines for CLOCKGEN A0
  ARM: sti: stih410-clocks: Identify critical clocks
  spi: st-ssc4: Remove 'no clocking' hack

 arch/arm/boot/dts/stih410-clock.dtsi     |  9 ++++++++
 drivers/clk/st/clk-flexgen.c             |  4 +++-
 drivers/clk/st/clkgen-fsyn.c             | 10 ++++++---
 drivers/clk/st/clkgen-pll.c              | 27 +++++++++++++++---------
 drivers/spi/spi-st-ssc4.c                | 36 +++++---------------------------
 include/dt-bindings/clock/stih407-clks.h |  4 ++++
 6 files changed, 45 insertions(+), 45 deletions(-)

-- 
2.8.3

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#1416048 — [PATCH 2/6] clk: st: clkgen-fsyn: Detect critical clocks

FromLee Jones <lee.jones@linaro.org>
Date2016-06-07 13:30 +0200
Subject[PATCH 2/6] clk: st: clkgen-fsyn: Detect critical clocks
Message-ID<rHnmO-229-25@gated-at.bofh.it>
In reply to#1416047
Utilise the new Critical Clock infrastructure to mark clocks which
much not be disabled as CRITICAL.

Clocks are marked as CRITICAL using clk flags.  This patch also
ensures flags are peculated through the framework in the correct
manner.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 drivers/clk/st/clkgen-fsyn.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index dec4eaa..09afeb8 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -1027,7 +1027,7 @@ static const struct clk_ops st_quadfs_ops = {
 static struct clk * __init st_clk_register_quadfs_fsynth(
 		const char *name, const char *parent_name,
 		struct clkgen_quadfs_data *quadfs, void __iomem *reg, u32 chan,
-		spinlock_t *lock)
+		unsigned long flags, spinlock_t *lock)
 {
 	struct st_clk_quadfs_fsynth *fs;
 	struct clk *clk;
@@ -1045,7 +1045,7 @@ static struct clk * __init st_clk_register_quadfs_fsynth(
 
 	init.name = name;
 	init.ops = &st_quadfs_ops;
-	init.flags = CLK_GET_RATE_NOCACHE | CLK_IS_BASIC;
+	init.flags = flags | CLK_GET_RATE_NOCACHE | CLK_IS_BASIC;
 	init.parent_names = &parent_name;
 	init.num_parents = 1;
 
@@ -1115,6 +1115,7 @@ static void __init st_of_create_quadfs_fsynths(
 	for (fschan = 0; fschan < QUADFS_MAX_CHAN; fschan++) {
 		struct clk *clk;
 		const char *clk_name;
+		unsigned long flags = 0;
 
 		if (of_property_read_string_index(np, "clock-output-names",
 						  fschan, &clk_name)) {
@@ -1127,8 +1128,11 @@ static void __init st_of_create_quadfs_fsynths(
 		if (*clk_name == '\0')
 			continue;
 
+		of_clk_detect_critical(np, fschan, &flags);
+
 		clk = st_clk_register_quadfs_fsynth(clk_name, pll_name,
-				quadfs, reg, fschan, lock);
+						    quadfs, reg, fschan,
+						    flags, lock);
 
 		/*
 		 * If there was an error registering this clock output, clean
-- 
2.8.3

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#1416049 — [PATCH 3/6] clk: st: clkgen-pll: Detect critical clocks

FromLee Jones <lee.jones@linaro.org>
Date2016-06-07 13:30 +0200
Subject[PATCH 3/6] clk: st: clkgen-pll: Detect critical clocks
Message-ID<rHnmO-229-23@gated-at.bofh.it>
In reply to#1416047
Utilise the new Critical Clock infrastructure to mark clocks which
much not be disabled as CRITICAL.

Clocks are marked as CRITICAL using clk flags.  This patch also
ensures flags are peculated through the framework in the correct
manner.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 drivers/clk/st/clkgen-pll.c | 27 +++++++++++++++++----------
 1 file changed, 17 insertions(+), 10 deletions(-)

diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index 38f6f3a..0b5990e 100644
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -840,7 +840,7 @@ static const struct clk_ops stm_pll4600c28_ops = {
 
 static struct clk * __init clkgen_pll_register(const char *parent_name,
 				struct clkgen_pll_data	*pll_data,
-				void __iomem *reg,
+				void __iomem *reg, unsigned long pll_flags,
 				const char *clk_name, spinlock_t *lock)
 {
 	struct clkgen_pll *pll;
@@ -854,7 +854,7 @@ static struct clk * __init clkgen_pll_register(const char *parent_name,
 	init.name = clk_name;
 	init.ops = pll_data->ops;
 
-	init.flags = CLK_IS_BASIC | CLK_GET_RATE_NOCACHE;
+	init.flags = pll_flags | CLK_IS_BASIC | CLK_GET_RATE_NOCACHE;
 	init.parent_names = &parent_name;
 	init.num_parents  = 1;
 
@@ -948,7 +948,7 @@ static void __init clkgena_c65_pll_setup(struct device_node *np)
 	 */
 	clk_data->clks[0] = clkgen_pll_register(parent_name,
 			(struct clkgen_pll_data *) &st_pll1600c65_ax,
-			reg + CLKGENAx_PLL0_OFFSET, clk_name, NULL);
+			reg + CLKGENAx_PLL0_OFFSET, 0, clk_name, NULL);
 
 	if (IS_ERR(clk_data->clks[0]))
 		goto err;
@@ -977,7 +977,7 @@ static void __init clkgena_c65_pll_setup(struct device_node *np)
 	 */
 	clk_data->clks[2] = clkgen_pll_register(parent_name,
 			(struct clkgen_pll_data *) &st_pll800c65_ax,
-			reg + CLKGENAx_PLL1_OFFSET, clk_name, NULL);
+			reg + CLKGENAx_PLL1_OFFSET, 0, clk_name, NULL);
 
 	if (IS_ERR(clk_data->clks[2]))
 		goto err;
@@ -995,7 +995,7 @@ CLK_OF_DECLARE(clkgena_c65_plls,
 static struct clk * __init clkgen_odf_register(const char *parent_name,
 					       void __iomem *reg,
 					       struct clkgen_pll_data *pll_data,
-					       int odf,
+					       unsigned long pll_flags, int odf,
 					       spinlock_t *odf_lock,
 					       const char *odf_name)
 {
@@ -1004,7 +1004,7 @@ static struct clk * __init clkgen_odf_register(const char *parent_name,
 	struct clk_gate *gate;
 	struct clk_divider *div;
 
-	flags = CLK_GET_RATE_NOCACHE | CLK_SET_RATE_PARENT;
+	flags = pll_flags | CLK_GET_RATE_NOCACHE | CLK_SET_RATE_PARENT;
 
 	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
 	if (!gate)
@@ -1099,6 +1099,7 @@ static void __init clkgen_c32_pll_setup(struct device_node *np)
 	int num_odfs, odf;
 	struct clk_onecell_data *clk_data;
 	struct clkgen_pll_data	*data;
+	unsigned long pll_flags = 0;
 
 	match = of_match_node(c32_pll_of_match, np);
 	if (!match) {
@@ -1116,8 +1117,10 @@ static void __init clkgen_c32_pll_setup(struct device_node *np)
 	if (!pll_base)
 		return;
 
-	clk = clkgen_pll_register(parent_name, data, pll_base, np->name,
-				  data->lock);
+	of_clk_detect_critical(np, 0, &pll_flags);
+
+	clk = clkgen_pll_register(parent_name, data, pll_base, pll_flags,
+				  np->name, data->lock);
 	if (IS_ERR(clk))
 		return;
 
@@ -1139,12 +1142,15 @@ static void __init clkgen_c32_pll_setup(struct device_node *np)
 	for (odf = 0; odf < num_odfs; odf++) {
 		struct clk *clk;
 		const char *clk_name;
+		unsigned long odf_flags = 0;
 
 		if (of_property_read_string_index(np, "clock-output-names",
 						  odf, &clk_name))
 			return;
 
-		clk = clkgen_odf_register(pll_name, pll_base, data,
+		of_clk_detect_critical(np, odf, &odf_flags);
+
+		clk = clkgen_odf_register(pll_name, pll_base, data, odf_flags,
 				odf, &clkgena_c32_odf_lock, clk_name);
 		if (IS_ERR(clk))
 			goto err;
@@ -1206,7 +1212,8 @@ static void __init clkgengpu_c32_pll_setup(struct device_node *np)
 	/*
 	 * PLL 1200MHz output
 	 */
-	clk = clkgen_pll_register(parent_name, data, reg, clk_name, data->lock);
+	clk = clkgen_pll_register(parent_name, data, reg,
+				  0, clk_name, data->lock);
 
 	if (!IS_ERR(clk))
 		of_clk_add_provider(np, of_clk_src_simple_get, clk);
-- 
2.8.3

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#1416050 — [PATCH 6/6] spi: st-ssc4: Remove 'no clocking' hack

FromLee Jones <lee.jones@linaro.org>
Date2016-06-07 13:30 +0200
Subject[PATCH 6/6] spi: st-ssc4: Remove 'no clocking' hack
Message-ID<rHnmO-229-37@gated-at.bofh.it>
In reply to#1416047
Due to the newly upstreamed 'critical clocks' API we can now
safely handle clocking in the SPI and I2C drivers without fear
of catastrophically crippling the running platform.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 drivers/spi/spi-st-ssc4.c | 36 +++++-------------------------------
 1 file changed, 5 insertions(+), 31 deletions(-)

diff --git a/drivers/spi/spi-st-ssc4.c b/drivers/spi/spi-st-ssc4.c
index d5adf9f..a56eca0 100644
--- a/drivers/spi/spi-st-ssc4.c
+++ b/drivers/spi/spi-st-ssc4.c
@@ -68,32 +68,6 @@ struct spi_st {
 	struct completion	done;
 };
 
-static int spi_st_clk_enable(struct spi_st *spi_st)
-{
-	/*
-	 * Current platforms use one of the core clocks for SPI and I2C.
-	 * If we attempt to disable the clock, the system will hang.
-	 *
-	 * TODO: Remove this when platform supports power domains.
-	 */
-	return 0;
-
-	return clk_prepare_enable(spi_st->clk);
-}
-
-static void spi_st_clk_disable(struct spi_st *spi_st)
-{
-	/*
-	 * Current platforms use one of the core clocks for SPI and I2C.
-	 * If we attempt to disable the clock, the system will hang.
-	 *
-	 * TODO: Remove this when platform supports power domains.
-	 */
-	return;
-
-	clk_disable_unprepare(spi_st->clk);
-}
-
 /* Load the TX FIFO */
 static void ssc_write_tx_fifo(struct spi_st *spi_st)
 {
@@ -349,7 +323,7 @@ static int spi_st_probe(struct platform_device *pdev)
 		goto put_master;
 	}
 
-	ret = spi_st_clk_enable(spi_st);
+	ret = clk_prepare_enable(spi_st->clk);
 	if (ret)
 		goto put_master;
 
@@ -408,7 +382,7 @@ static int spi_st_probe(struct platform_device *pdev)
 	return 0;
 
 clk_disable:
-	spi_st_clk_disable(spi_st);
+	clk_disable_unprepare(spi_st->clk);
 put_master:
 	spi_master_put(master);
 	return ret;
@@ -419,7 +393,7 @@ static int spi_st_remove(struct platform_device *pdev)
 	struct spi_master *master = platform_get_drvdata(pdev);
 	struct spi_st *spi_st = spi_master_get_devdata(master);
 
-	spi_st_clk_disable(spi_st);
+	clk_disable_unprepare(spi_st->clk);
 
 	pinctrl_pm_select_sleep_state(&pdev->dev);
 
@@ -435,7 +409,7 @@ static int spi_st_runtime_suspend(struct device *dev)
 	writel_relaxed(0, spi_st->base + SSC_IEN);
 	pinctrl_pm_select_sleep_state(dev);
 
-	spi_st_clk_disable(spi_st);
+	clk_disable_unprepare(spi_st->clk);
 
 	return 0;
 }
@@ -446,7 +420,7 @@ static int spi_st_runtime_resume(struct device *dev)
 	struct spi_st *spi_st = spi_master_get_devdata(master);
 	int ret;
 
-	ret = spi_st_clk_enable(spi_st);
+	ret = clk_prepare_enable(spi_st->clk);
 	pinctrl_pm_select_default_state(dev);
 
 	return ret;
-- 
2.8.3

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#1416309 — Re: [PATCH 6/6] spi: st-ssc4: Remove 'no clocking' hack

FromMark Brown <broonie@kernel.org>
Date2016-06-07 17:20 +0200
SubjectRe: [PATCH 6/6] spi: st-ssc4: Remove 'no clocking' hack
Message-ID<rHqXo-4lt-59@gated-at.bofh.it>
In reply to#1416050

[Multipart message — attachments visible in raw view] — view raw

On Tue, Jun 07, 2016 at 12:19:30PM +0100, Lee Jones wrote:
> Due to the newly upstreamed 'critical clocks' API we can now
> safely handle clocking in the SPI and I2C drivers without fear
> of catastrophically crippling the running platform.

Acked-by: Mark Brown <broonie@kernel.org>

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