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[PATCH 07/10] Staging: comedi: fix BIT macro issue in das6402.c

Started byRavishankar Karkala Mallikarjunayya <ravishankarkm32@gmail.com>
First post2016-06-01 12:30 +0200
Last post2016-06-01 16:00 +0200
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  [PATCH 07/10] Staging: comedi: fix BIT macro issue in das6402.c Ravishankar Karkala Mallikarjunayya <ravishankarkm32@gmail.com> - 2016-06-01 12:30 +0200
    Re: [PATCH 07/10] Staging: comedi: fix BIT macro issue in das6402.c Ian Abbott <abbotti@mev.co.uk> - 2016-06-01 16:00 +0200

#1411068 — [PATCH 07/10] Staging: comedi: fix BIT macro issue in das6402.c

FromRavishankar Karkala Mallikarjunayya <ravishankarkm32@gmail.com>
Date2016-06-01 12:30 +0200
Subject[PATCH 07/10] Staging: comedi: fix BIT macro issue in das6402.c
Message-ID<rFbzr-7br-15@gated-at.bofh.it>
This patch Replace all occurences of (1<<x) by BIT(x) in the file das6402.c
to get rid of checkpatch.pl "CHECK" output "Prefer using the BIT macro"

Signed-off-by: Ravishankar Karkala Mallikarjunayya <ravishankarkm32@gmail.com>
---
 drivers/staging/comedi/drivers/das6402.c | 56 ++++++++++++++++----------------
 1 file changed, 28 insertions(+), 28 deletions(-)

diff --git a/drivers/staging/comedi/drivers/das6402.c b/drivers/staging/comedi/drivers/das6402.c
index 1701294..f6319b3 100644
--- a/drivers/staging/comedi/drivers/das6402.c
+++ b/drivers/staging/comedi/drivers/das6402.c
@@ -50,48 +50,48 @@
 #define DAS6402_AO_LSB_REG(x)		(0x04 + ((x) * 2))
 #define DAS6402_AO_MSB_REG(x)		(0x05 + ((x) * 2))
 #define DAS6402_STATUS_REG		0x08
-#define DAS6402_STATUS_FFNE		(1 << 0)
-#define DAS6402_STATUS_FHALF		(1 << 1)
-#define DAS6402_STATUS_FFULL		(1 << 2)
-#define DAS6402_STATUS_XINT		(1 << 3)
-#define DAS6402_STATUS_INT		(1 << 4)
-#define DAS6402_STATUS_XTRIG		(1 << 5)
-#define DAS6402_STATUS_INDGT		(1 << 6)
-#define DAS6402_STATUS_10MHZ		(1 << 7)
-#define DAS6402_STATUS_W_CLRINT		(1 << 0)
-#define DAS6402_STATUS_W_CLRXTR		(1 << 1)
-#define DAS6402_STATUS_W_CLRXIN		(1 << 2)
-#define DAS6402_STATUS_W_EXTEND		(1 << 4)
-#define DAS6402_STATUS_W_ARMED		(1 << 5)
-#define DAS6402_STATUS_W_POSTMODE	(1 << 6)
-#define DAS6402_STATUS_W_10MHZ		(1 << 7)
+#define DAS6402_STATUS_FFNE		BIT(0)
+#define DAS6402_STATUS_FHALF		BIT(1)
+#define DAS6402_STATUS_FFULL		BIT(2)
+#define DAS6402_STATUS_XINT		BIT(3)
+#define DAS6402_STATUS_INT		BIT(4)
+#define DAS6402_STATUS_XTRIG		BIT(5)
+#define DAS6402_STATUS_INDGT		BIT(6)
+#define DAS6402_STATUS_10MHZ		BIT(7)
+#define DAS6402_STATUS_W_CLRINT		BIT(0)
+#define DAS6402_STATUS_W_CLRXTR		BIT(1)
+#define DAS6402_STATUS_W_CLRXIN		BIT(2)
+#define DAS6402_STATUS_W_EXTEND		BIT(4)
+#define DAS6402_STATUS_W_ARMED		BIT(5)
+#define DAS6402_STATUS_W_POSTMODE	BIT(6)
+#define DAS6402_STATUS_W_10MHZ		BIT(7)
 #define DAS6402_CTRL_REG		0x09
 #define DAS6402_CTRL_SOFT_TRIG		(0 << 0)
-#define DAS6402_CTRL_EXT_FALL_TRIG	(1 << 0)
+#define DAS6402_CTRL_EXT_FALL_TRIG	BIT(0)
 #define DAS6402_CTRL_EXT_RISE_TRIG	(2 << 0)
 #define DAS6402_CTRL_PACER_TRIG		(3 << 0)
-#define DAS6402_CTRL_BURSTEN		(1 << 2)
-#define DAS6402_CTRL_XINTE		(1 << 3)
+#define DAS6402_CTRL_BURSTEN		BIT(2)
+#define DAS6402_CTRL_XINTE		BIT(3)
 #define DAS6402_CTRL_IRQ(x)		((x) << 4)
-#define DAS6402_CTRL_INTE		(1 << 7)
+#define DAS6402_CTRL_INTE		BIT(7)
 #define DAS6402_TRIG_REG		0x0a
-#define DAS6402_TRIG_TGEN		(1 << 0)
-#define DAS6402_TRIG_TGSEL		(1 << 1)
-#define DAS6402_TRIG_TGPOL		(1 << 2)
-#define DAS6402_TRIG_PRETRIG		(1 << 3)
+#define DAS6402_TRIG_TGEN		BIT(0)
+#define DAS6402_TRIG_TGSEL		BIT(1)
+#define DAS6402_TRIG_TGPOL		BIT(2)
+#define DAS6402_TRIG_PRETRIG		BIT(3)
 #define DAS6402_AO_RANGE(_chan, _range)	((_range) << ((_chan) ? 6 : 4))
 #define DAS6402_AO_RANGE_MASK(_chan)	(3 << ((_chan) ? 6 : 4))
 #define DAS6402_MODE_REG		0x0b
 #define DAS6402_MODE_RANGE(x)		((x) << 0)
 #define DAS6402_MODE_POLLED		(0 << 2)
-#define DAS6402_MODE_FIFONEPTY		(1 << 2)
+#define DAS6402_MODE_FIFONEPTY		BIT(2)
 #define DAS6402_MODE_FIFOHFULL		(2 << 2)
 #define DAS6402_MODE_EOB		(3 << 2)
-#define DAS6402_MODE_ENHANCED		(1 << 4)
-#define DAS6402_MODE_SE			(1 << 5)
-#define DAS6402_MODE_UNI		(1 << 6)
+#define DAS6402_MODE_ENHANCED		BIT(4)
+#define DAS6402_MODE_SE			BIT(5)
+#define DAS6402_MODE_UNI		BIT(6)
 #define DAS6402_MODE_DMA1		(0 << 7)
-#define DAS6402_MODE_DMA3		(1 << 7)
+#define DAS6402_MODE_DMA3		BIT(7)
 #define DAS6402_TIMER_BASE		0x0c
 
 static const struct comedi_lrange das6402_ai_ranges = {
-- 
1.9.1

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#1411243

FromIan Abbott <abbotti@mev.co.uk>
Date2016-06-01 16:00 +0200
Message-ID<rFeQF-Fc-5@gated-at.bofh.it>
In reply to#1411068
On 01/06/16 11:26, Ravishankar Karkala Mallikarjunayya wrote:
> This patch Replace all occurences of (1<<x) by BIT(x) in the file das6402.c
> to get rid of checkpatch.pl "CHECK" output "Prefer using the BIT macro"
>
> Signed-off-by: Ravishankar Karkala Mallikarjunayya <ravishankarkm32@gmail.com>
> ---
>   drivers/staging/comedi/drivers/das6402.c | 56 ++++++++++++++++----------------
>   1 file changed, 28 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/staging/comedi/drivers/das6402.c b/drivers/staging/comedi/drivers/das6402.c
> index 1701294..f6319b3 100644
> --- a/drivers/staging/comedi/drivers/das6402.c
> +++ b/drivers/staging/comedi/drivers/das6402.c
[snip]
>   #define DAS6402_CTRL_REG		0x09
>   #define DAS6402_CTRL_SOFT_TRIG		(0 << 0)
> -#define DAS6402_CTRL_EXT_FALL_TRIG	(1 << 0)
> +#define DAS6402_CTRL_EXT_FALL_TRIG	BIT(0)
>   #define DAS6402_CTRL_EXT_RISE_TRIG	(2 << 0)
>   #define DAS6402_CTRL_PACER_TRIG		(3 << 0)

In cases like this, where there are several values defined for a 
multi-bit field, all shifted by the same amount, the 'BIT(x)' usage 
makes the code more unreadable.  The DAS6402_CTRL_SOFT_TRIG, 
DAS6402_CTRL_EXT_FALL_TRIG, DAS6402_CTRL_EXT_RISE_TRIG, and 
DAS6402_CTRL_PACER_TRIG values should all share the same style, perhaps 
something like this:

#define DAS6402_CTRL_TRIG(x)		((x) << 0)
#define DAS6402_CTRL_SOFT_TRIG		DAS6402_CTRL_TRIG(0)
#define DAS6402_CTRL_EXT_FALL_TRIG	DAS6402_CTRL_TRIG(1)
#define DAS6402_CTRL_EXT_RISE_TRIG	DAS6402_CTRL_TRIG(2)
#define DAS6402_CTRL_PACER_TRIG		DAS6402_CTRL_TRIG(3)

[snip]
>   #define DAS6402_MODE_REG		0x0b
>   #define DAS6402_MODE_RANGE(x)		((x) << 0)
>   #define DAS6402_MODE_POLLED		(0 << 2)
> -#define DAS6402_MODE_FIFONEPTY		(1 << 2)
> +#define DAS6402_MODE_FIFONEPTY		BIT(2)
>   #define DAS6402_MODE_FIFOHFULL		(2 << 2)
>   #define DAS6402_MODE_EOB		(3 << 2)

Similarly, DAS6402_MODE_POLLED, DAS6402_MODE_FIFONEPTY, 
DAS6402_MODE_FIFOHFULL, and DAS6402_MODE_EOB are all values for the same 
multi-bit field, and should be defined in the same style, perhaps 
something like this:

#define DAS6402_MODE_BUF(x)		((x) << 2)
#define DAS6402_MODE_BUF_POLLED		DAS6402_MODE_BUF(0)
#define DAS6402_MODE_FIFONEPTY		DAS6402_MODE_BUF(1)
#define DAS6402_MODE_FIFOHFULL		DAS6402_MODE_BUF(2)
#define DAS6402_MODE_EOB		DAS6402_MODE_BUF(3)

> -#define DAS6402_MODE_ENHANCED		(1 << 4)
> -#define DAS6402_MODE_SE			(1 << 5)
> -#define DAS6402_MODE_UNI		(1 << 6)
> +#define DAS6402_MODE_ENHANCED		BIT(4)
> +#define DAS6402_MODE_SE			BIT(5)
> +#define DAS6402_MODE_UNI		BIT(6)
>   #define DAS6402_MODE_DMA1		(0 << 7)
> -#define DAS6402_MODE_DMA3		(1 << 7)
> +#define DAS6402_MODE_DMA3		BIT(7)

Similarly, DAS6402_MODE_DMA1 and DAS6402_MODE_DMA3 should be defined in 
the same style, perhaps something like this:

#define DAS6402_MODE_DMA(x)		((x) << 7)
#define DAS6402_MODE_DMA1		DAS6402_MODE_DMA(0)
#define DAS6402_MODE_DMA3		DAS6402_MODE_DMA(1)


-- 
-=( Ian Abbott @ MEV Ltd.    E-mail: <abbotti@mev.co.uk> )=-
-=(                          Web: http://www.mev.co.uk/  )=-

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