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| Started by | Michael Ellerman <mpe@ellerman.id.au> |
|---|---|
| First post | 2016-06-01 05:20 +0200 |
| Last post | 2016-06-01 05:20 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH v4 09/10] cpuidle/powernv: Add support for POWER ISA v3 idle states Michael Ellerman <mpe@ellerman.id.au> - 2016-06-01 05:20 +0200
| From | Michael Ellerman <mpe@ellerman.id.au> |
|---|---|
| Date | 2016-06-01 05:20 +0200 |
| Subject | Re: [PATCH v4 09/10] cpuidle/powernv: Add support for POWER ISA v3 idle states |
| Message-ID | <rF4Rj-2Wb-1@gated-at.bofh.it> |
On Tue, 2016-05-31 at 19:20 +0530, Shreyas B Prabhu wrote: > On 05/30/2016 07:56 PM, Daniel Lezcano wrote: > > On 05/24/2016 03:15 PM, Shreyas B. Prabhu wrote: > > > + psscr_val = kcalloc(dt_idle_states, sizeof(*psscr_val), > > > + GFP_KERNEL); > > > + rc = of_property_read_u64_array(power_mgt, > > > + "ibm,cpu-idle-state-psscr", psscr_val, dt_idle_states); > > > > [cc'ed Lorenzo and Rob ] > > > > I don't see the documentation for the binding. Wouldn't make sense to > > add the value per idle state instead of an index based array ? The binding *should* be documented here AFAIK: https://github.com/open-power/skiboot/blob/master/doc/device-tree/ibm%2Copal/power-mgt.txt cheers
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