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Groups > linux.kernel > #1410456 > unrolled thread
| Started by | "Luck, Tony" <tony.luck@intel.com> |
|---|---|
| First post | 2016-05-31 19:20 +0200 |
| Last post | 2016-06-03 10:30 +0200 |
| Articles | 4 — 2 participants |
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RE: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs. "Luck, Tony" <tony.luck@intel.com> - 2016-05-31 19:20 +0200
Re: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs. Borislav Petkov <bp@alien8.de> - 2016-05-31 20:10 +0200
RE: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs. "Luck, Tony" <tony.luck@intel.com> - 2016-05-31 20:20 +0200
Re: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs. Borislav Petkov <bp@alien8.de> - 2016-06-03 10:30 +0200
| From | "Luck, Tony" <tony.luck@intel.com> |
|---|---|
| Date | 2016-05-31 19:20 +0200 |
| Subject | RE: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs. |
| Message-ID | <rEVuG-5z8-15@gated-at.bofh.it> |
>> - m.bank = 1; >> + m.bank = mca_cfg.banks; > > There's struct cper_sec_mem_err.bank. Why aren't we copying that? Because that is DDR3/DDR4 "bank" (internal DIMM detail) as opposed to machine check "bank" (CPU microarchitecture detail). We need the latter here. -Tony
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| From | Borislav Petkov <bp@alien8.de> |
|---|---|
| Date | 2016-05-31 20:10 +0200 |
| Subject | Re: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs. |
| Message-ID | <rEWh3-653-5@gated-at.bofh.it> |
| In reply to | #1410456 |
On Tue, May 31, 2016 at 05:11:45PM +0000, Luck, Tony wrote:
> Because that is DDR3/DDR4 "bank" (internal DIMM detail) as opposed
> to machine check "bank" (CPU microarchitecture detail). We need the
> latter here.
Ok, I see.
Btw, would it have any benefit of writing a "magic" value in m.bank
to denote the error comes from APEI instead of number of banks which
differs betweem generations?
Something like
m.bank = -1;
or so?
255 banks will never happen anyway! (Famous last words ... :-)))
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
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| From | "Luck, Tony" <tony.luck@intel.com> |
|---|---|
| Date | 2016-05-31 20:20 +0200 |
| Message-ID | <rEWqK-68v-29@gated-at.bofh.it> |
| In reply to | #1410507 |
> Btw, would it have any benefit of writing a "magic" value in m.bank > to denote the error comes from APEI instead of number of banks which > differs between generations? > > Something like > > m.bank = -1; > > or so? That might be a bit more obvious than my subtle "one more than possible on this platform" magic number. > 255 banks will never happen anyway! (Famous last words ... :-))) Intel is stuck at 32 unless we come up with a new mechanism and change all the code that generates MSR numbers with "base + 4*i". There are some virtualization MSRs allocated at what would be bank32. -Tony
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| From | Borislav Petkov <bp@alien8.de> |
|---|---|
| Date | 2016-06-03 10:30 +0200 |
| Subject | Re: [PATCH] x86/mce: Do not use bank 1 for APEI generated error logs. |
| Message-ID | <rFSEr-MK-45@gated-at.bofh.it> |
| In reply to | #1410515 |
On Tue, May 31, 2016 at 06:18:42PM +0000, Luck, Tony wrote:
> Intel is stuck at 32 unless we come up with a new mechanism and change
> all the code that generates MSR numbers with "base + 4*i". There are
> some virtualization MSRs allocated at what would be bank32.
Just when I was hoping that 32 banks should be more than enough and hw
people would restrain themselves. Looks like a "natural" restraint has
presented itself ... :-))
Anyway, v2 applied, thanks.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
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