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[PATCH v2 0/4] hw rng support for NSP SoC

Started byYendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
First post2016-05-27 12:20 +0200
Last post2016-06-01 03:30 +0200
Articles 6 — 3 participants

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  [PATCH v2 0/4] hw rng support for NSP SoC Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> - 2016-05-27 12:20 +0200
    [PATCH v2 3/4] ARM: dts: nsp: Add rng device tree entry Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> - 2016-05-27 12:20 +0200
    [PATCH v2 4/4] hwrng: bcm2835: Read as much data as available Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> - 2016-05-27 12:20 +0200
    Re: [PATCH v2 0/4] hw rng support for NSP SoC Herbert Xu <herbert@gondor.apana.org.au> - 2016-05-31 12:30 +0200
      Re: [PATCH v2 0/4] hw rng support for NSP SoC Florian Fainelli <f.fainelli@gmail.com> - 2016-05-31 19:10 +0200
        Re: [PATCH v2 0/4] hw rng support for NSP SoC Herbert Xu <herbert@gondor.apana.org.au> - 2016-06-01 03:30 +0200

#1407979 — [PATCH v2 0/4] hw rng support for NSP SoC

FromYendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Date2016-05-27 12:20 +0200
Subject[PATCH v2 0/4] hw rng support for NSP SoC
Message-ID<rDn21-28H-3@gated-at.bofh.it>
This patchset contains the hw random number generator support for the
Broadcom's NSP SoC. The block is similar to the block available in
bcm2835 with different default interrupt mask value. Due to lack of
documentation, I cannot confirm the interrupt mask register details
in bcm2835. In an effort to not break the existing functionality of
bcm2835, I used a different compatible string to mask the interrupt
for NSP SoC. Please let me know. Also supported providing requested
number of random numbers instead of static size of four bytes.

The first patch contains the documentation changes and the second patch
contains the support for rng available in NSP SoC. The third patch
contains the device tree changes for NSP SoC. The fourth patch contains
the support for reading requested number of random numbers.

This patch set has been tested on NSP bcm958625HR board.
This patch set is based on v4.6.0-rc1 and is available from github
repo: https://github.com/Broadcom/cygnus-linux.git
branch: nsp-rng-v2

Changes since v1

Addressed the review comments from Eric
Added acked by Eric

Yendapally Reddy Dhananjaya Reddy (4):
  dt-bindings: rng: Northstar Plus SoC rng bindings
  hwrng: bcm2835: Support Broadcom NSP SoC rng
  ARM: dts: nsp: Add rng device tree entry
  hwrng: bcm2835: Read as much data as available

 .../devicetree/bindings/rng/brcm,bcm2835.txt       |  7 +++-
 arch/arm/boot/dts/bcm-nsp.dtsi                     |  5 +++
 drivers/char/hw_random/Kconfig                     |  2 +-
 drivers/char/hw_random/bcm2835-rng.c               | 46 +++++++++++++++++++---
 4 files changed, 52 insertions(+), 8 deletions(-)

-- 
2.1.0

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#1407980 — [PATCH v2 3/4] ARM: dts: nsp: Add rng device tree entry

FromYendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Date2016-05-27 12:20 +0200
Subject[PATCH v2 3/4] ARM: dts: nsp: Add rng device tree entry
Message-ID<rDn21-28H-17@gated-at.bofh.it>
In reply to#1407979
Add support for the random number generator to the Northstar Plus
SoC device tree.

Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
---
 arch/arm/boot/dts/bcm-nsp.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index def9e78..1ed829e 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -206,6 +206,11 @@
 			brcm,nand-has-wp;
 		};
 
+		rng: rng@33000 {
+			compatible = "brcm,bcm-nsp-rng";
+			reg = <0x33000 0x14>;
+		};
+
 		ccbtimer0: timer@34000 {
 			compatible = "arm,sp804";
 			reg = <0x34000 0x1000>;
-- 
2.1.0

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#1407981 — [PATCH v2 4/4] hwrng: bcm2835: Read as much data as available

FromYendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Date2016-05-27 12:20 +0200
Subject[PATCH v2 4/4] hwrng: bcm2835: Read as much data as available
Message-ID<rDn21-28H-19@gated-at.bofh.it>
In reply to#1407979
Read the requested number of data from the fifo

Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
---
 drivers/char/hw_random/bcm2835-rng.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/char/hw_random/bcm2835-rng.c b/drivers/char/hw_random/bcm2835-rng.c
index b1e8b78..75ca820 100644
--- a/drivers/char/hw_random/bcm2835-rng.c
+++ b/drivers/char/hw_random/bcm2835-rng.c
@@ -43,6 +43,8 @@ static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max,
 			       bool wait)
 {
 	void __iomem *rng_base = (void __iomem *)rng->priv;
+	u32 max_words = max / sizeof(u32);
+	u32 num_words, count;
 
 	while ((__raw_readl(rng_base + RNG_STATUS) >> 24) == 0) {
 		if (!wait)
@@ -50,8 +52,14 @@ static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max,
 		cpu_relax();
 	}
 
-	*(u32 *)buf = __raw_readl(rng_base + RNG_DATA);
-	return sizeof(u32);
+	num_words = readl(rng_base + RNG_STATUS) >> 24;
+	if (num_words > max_words)
+		num_words = max_words;
+
+	for (count = 0; count < num_words; count++)
+		((u32 *)buf)[count] = readl(rng_base + RNG_DATA);
+
+	return num_words * sizeof(u32);
 }
 
 static struct hwrng bcm2835_rng_ops = {
-- 
2.1.0

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#1410088

FromHerbert Xu <herbert@gondor.apana.org.au>
Date2016-05-31 12:30 +0200
Message-ID<rEP5U-1qK-13@gated-at.bofh.it>
In reply to#1407979
On Fri, May 27, 2016 at 06:10:37AM -0400, Yendapally Reddy Dhananjaya Reddy wrote:
> This patchset contains the hw random number generator support for the
> Broadcom's NSP SoC. The block is similar to the block available in
> bcm2835 with different default interrupt mask value. Due to lack of
> documentation, I cannot confirm the interrupt mask register details
> in bcm2835. In an effort to not break the existing functionality of
> bcm2835, I used a different compatible string to mask the interrupt
> for NSP SoC. Please let me know. Also supported providing requested
> number of random numbers instead of static size of four bytes.
> 
> The first patch contains the documentation changes and the second patch
> contains the support for rng available in NSP SoC. The third patch
> contains the device tree changes for NSP SoC. The fourth patch contains
> the support for reading requested number of random numbers.
> 
> This patch set has been tested on NSP bcm958625HR board.
> This patch set is based on v4.6.0-rc1 and is available from github
> repo: https://github.com/Broadcom/cygnus-linux.git
> branch: nsp-rng-v2
> 
> Changes since v1

All applied.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

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#1410450

FromFlorian Fainelli <f.fainelli@gmail.com>
Date2016-05-31 19:10 +0200
Message-ID<rEVl1-5uA-51@gated-at.bofh.it>
In reply to#1410088
On 05/31/2016 03:19 AM, Herbert Xu wrote:
> On Fri, May 27, 2016 at 06:10:37AM -0400, Yendapally Reddy Dhananjaya Reddy wrote:
>> This patchset contains the hw random number generator support for the
>> Broadcom's NSP SoC. The block is similar to the block available in
>> bcm2835 with different default interrupt mask value. Due to lack of
>> documentation, I cannot confirm the interrupt mask register details
>> in bcm2835. In an effort to not break the existing functionality of
>> bcm2835, I used a different compatible string to mask the interrupt
>> for NSP SoC. Please let me know. Also supported providing requested
>> number of random numbers instead of static size of four bytes.
>>
>> The first patch contains the documentation changes and the second patch
>> contains the support for rng available in NSP SoC. The third patch
>> contains the device tree changes for NSP SoC. The fourth patch contains
>> the support for reading requested number of random numbers.
>>
>> This patch set has been tested on NSP bcm958625HR board.
>> This patch set is based on v4.6.0-rc1 and is available from github
>> repo: https://github.com/Broadcom/cygnus-linux.git
>> branch: nsp-rng-v2
>>
>> Changes since v1
> 
> All applied.

FYI, ARM Device Tree patches usually go via ARM SoC pull requests, so it
is best if this is planned in advance. Can you make sure you document
that there could be a merge conflict in your pull request to Linus?

Thanks
-- 
Florian

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#1410723

FromHerbert Xu <herbert@gondor.apana.org.au>
Date2016-06-01 03:30 +0200
Message-ID<rF38S-1Jh-9@gated-at.bofh.it>
In reply to#1410450
On Tue, May 31, 2016 at 10:09:39AM -0700, Florian Fainelli wrote:
>
> FYI, ARM Device Tree patches usually go via ARM SoC pull requests, so it
> is best if this is planned in advance. Can you make sure you document
> that there could be a merge conflict in your pull request to Linus?

Sure I can do that.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

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