Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]

Groups > linux.kernel > #1407608 > unrolled thread

[RFC 1/5] usb: chipidea: Add support for Tegra20/30/114/124

Back to article view | Back to linux.kernel

This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by below is the oldest one visible, not the original post.

Contents

  [RFC 1/5] usb: chipidea: Add support for Tegra20/30/114/124 Thierry Reding <thierry.reding@gmail.com> - 2016-05-26 17:50 +0200
    Re: [RFC 1/5] usb: chipidea: Add support for Tegra20/30/114/124 Stephen Warren <swarren@wwwdotorg.org> - 2016-05-26 23:20 +0200
      Re: [RFC 1/5] usb: chipidea: Add support for Tegra20/30/114/124 Stephen Warren <swarren@wwwdotorg.org> - 2016-05-26 23:30 +0200

#1407608 — [RFC 1/5] usb: chipidea: Add support for Tegra20/30/114/124

From: Thierry Reding <treding@nvidia.com>

All of these Tegra SoC generations have a ChipIdea UDC IP block that can
be used for device mode communication with a host. Implement rudimentary
support that doesn't allow switching between host and device modes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 drivers/usb/chipidea/Makefile        |   1 +
 drivers/usb/chipidea/ci_hdrc_tegra.c | 109 +++++++++++++++++++++++++++++++++++
 2 files changed, 110 insertions(+)
 create mode 100644 drivers/usb/chipidea/ci_hdrc_tegra.c

diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 518e445476c3..3532df6561d9 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -10,6 +10,7 @@ ci_hdrc-$(CONFIG_USB_OTG_FSM)		+= otg_fsm.o
 obj-$(CONFIG_USB_CHIPIDEA)	+= ci_hdrc_usb2.o
 obj-$(CONFIG_USB_CHIPIDEA)	+= ci_hdrc_msm.o
 obj-$(CONFIG_USB_CHIPIDEA)	+= ci_hdrc_zevio.o
+obj-$(CONFIG_USB_CHIPIDEA)	+= ci_hdrc_tegra.o
 
 obj-$(CONFIG_USB_CHIPIDEA_PCI)	+= ci_hdrc_pci.o
 
diff --git a/drivers/usb/chipidea/ci_hdrc_tegra.c b/drivers/usb/chipidea/ci_hdrc_tegra.c
new file mode 100644
index 000000000000..d3cd68441856
--- /dev/null
+++ b/drivers/usb/chipidea/ci_hdrc_tegra.c
@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2016, NVIDIA Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+#include <linux/usb/chipidea.h>
+
+#include "ci.h"
+
+struct tegra_udc {
+	struct ci_hdrc_platform_data data;
+	struct platform_device *dev;
+
+	struct usb_phy *phy;
+	struct clk *clk;
+};
+
+static const struct of_device_id tegra_udc_of_match[] = {
+	{ .compatible = "nvidia,tegra20-udc" },
+	{ .compatible = "nvidia,tegra30-udc" },
+	{ .compatible = "nvidia,tegra114-udc" },
+	{ .compatible = "nvidia,tegra124-udc" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, tegra_udc_of_match);
+
+static int tegra_udc_probe(struct platform_device *pdev)
+{
+	struct tegra_udc *udc;
+	int err;
+
+	udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
+	if (!udc)
+		return -ENOMEM;
+
+	udc->phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
+	if (IS_ERR(udc->phy)) {
+		err = PTR_ERR(udc->phy);
+		dev_err(&pdev->dev, "failed to get PHY: %d\n", err);
+		return err;
+	}
+
+	udc->clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(udc->clk)) {
+		err = PTR_ERR(udc->clk);
+		dev_err(&pdev->dev, "failed to get clock: %d\n", err);
+		return err;
+	}
+
+	err = clk_prepare_enable(udc->clk);
+	if (err < 0) {
+		dev_err(&pdev->dev, "failed to enable clock: %d\n", err);
+		return err;
+	}
+
+	/* setup and register ChipIdea HDRC device */
+	udc->data.name = "tegra-udc";
+	udc->data.capoffset = DEF_CAPOFFSET;
+	udc->data.flags = 0;
+	udc->data.usb_phy = udc->phy;
+
+	udc->dev = ci_hdrc_add_device(&pdev->dev, pdev->resource,
+				      pdev->num_resources, &udc->data);
+	if (IS_ERR(udc->dev)) {
+		err = PTR_ERR(udc->dev);
+		dev_err(&pdev->dev, "failed to add HDRC device: %d\n", err);
+		goto disable_clock;
+	}
+
+	platform_set_drvdata(pdev, udc);
+
+	return 0;
+
+disable_clock:
+	clk_disable_unprepare(udc->clk);
+	return err;
+}
+
+static int tegra_udc_remove(struct platform_device *pdev)
+{
+	struct tegra_udc *udc = platform_get_drvdata(pdev);
+
+	clk_disable_unprepare(udc->clk);
+
+	return 0;
+}
+
+static struct platform_driver tegra_udc_driver = {
+	.driver = {
+		.name = "tegra-udc",
+		.of_match_table = tegra_udc_of_match,
+	},
+	.probe = tegra_udc_probe,
+	.remove = tegra_udc_remove,
+};
+module_platform_driver(tegra_udc_driver);
+
+MODULE_DESCRIPTION("NVIDIA Tegra USB device mode driver");
+MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
+MODULE_ALIAS("platform:tegra-udc");
+MODULE_LICENSE("GPL v2");
-- 
2.8.3

[toc] | [next] | [standalone]

#1407721

On 05/26/2016 09:40 AM, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> All of these Tegra SoC generations have a ChipIdea UDC IP block that can
> be used for device mode communication with a host. Implement rudimentary
> support that doesn't allow switching between host and device modes.

Are you sure this is correct for Tegra20? I ask because for the /host/ 
mode driver, there's a "has_hostpc" flag which is set to false for 
Tegra20 and true for all other SoCs. In the U-Boot device mode driver 
(if not in the kernel driver; I didn't check), there's a concept of "has 
hostpc" too. I might expect that flag to be set the same way for both 
drivers. That said, I /think/ the host and device HW are unrelated, so 
it's possible has_hostpc might be set differently for them. 
Unfortunately, we haven't enabled the device mode driver for any Tegra20 
system in U-Boot so I can't tell whether we should enable has_hostpc for 
Tegra20's device mode driver.

Still, if this code works then I guess it's likely correct...

[toc] | [prev] | [next] | [standalone]

#1407727

On 05/26/2016 03:17 PM, Stephen Warren wrote:
> On 05/26/2016 09:40 AM, Thierry Reding wrote:
>> From: Thierry Reding <treding@nvidia.com>
>>
>> All of these Tegra SoC generations have a ChipIdea UDC IP block that can
>> be used for device mode communication with a host. Implement rudimentary
>> support that doesn't allow switching between host and device modes.
>
> Are you sure this is correct for Tegra20? I ask because for the /host/
> mode driver, there's a "has_hostpc" flag which is set to false for
> Tegra20 and true for all other SoCs. In the U-Boot device mode driver
> (if not in the kernel driver; I didn't check), there's a concept of "has
> hostpc" too. I might expect that flag to be set the same way for both
> drivers. That said, I /think/ the host and device HW are unrelated, so
> it's possible has_hostpc might be set differently for them.
> Unfortunately, we haven't enabled the device mode driver for any Tegra20
> system in U-Boot so I can't tell whether we should enable has_hostpc for
> Tegra20's device mode driver.
>
> Still, if this code works then I guess it's likely correct...

On the other hand, it looks like the kernel device mode driver might 
auto-detect this; in core.c:hw_device_init(), I see:

         reg = hw_read(ci, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
                 __ffs(HCCPARAMS_LEN);
         ci->hw_bank.lpm  = reg;

... and in host.c:host_start(), I see:

	ehci->has_hostpc = ci->hw_bank.lpm;

[toc] | [prev] | [standalone]

Back to top | Article view | linux.kernel

csiph-web